IPP50R250CP CoolMOSTM Power Transistor Product Summary Features • Lowest figure-of-merit R ON x Qg • Ultra low gate charge V DS @Tjmax 550 V R DS(on),max 0.250 Ω 27 nC Q g,typ • Extreme dv/dt rated • High peak current capability • Pb-free lead plating; RoHS compliant • Quailfied according to JEDEC1) for target applications PG-TO220 CoolMOS CP is designed for: • Hard & soft switching SMPS topologies • CCM PFC for ATX, Notebook adapter, PDP and LCD TV • PWM Stages for ATX, Notebook adapter, PDP and LCD TV Type Package Marking IPP50R250CP PG-TO220 5R250P Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C 13 T C=100 °C 9 Pulsed drain current2) I D,pulse T C=25 °C 31 Avalanche energy, single pulse E AS I D=5.2 A, V DD=50 V 345 Avalanche energy, repetitive t AR2),3) E AR I D=5.2 A, V DD=50 V 0.52 Avalanche current, repetitive t AR2),3) I AR MOSFET dv /dt ruggedness dv /dt Gate source voltage V GS Power dissipation P tot Operating and storage temperature T j, T stg Mounting torque Rev. 2.0 Unit A mJ 5.2 A V DS=0...400 V 50 V/ns static ±20 V AC (f>1 Hz) ±30 T C=25 °C 114 W -55 ... 150 °C M3 and M3.5 screws page 1 60 Ncm 2007-11-06 IPP50R250CP Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous diode forward current IS Diode pulse current 2) I S,pulse Reverse diode dv /dt 4) dv /dt Parameter Symbol Conditions Value Unit 7.8 T C=25 °C A 31 15 V/ns Values Unit min. typ. max. - - 1.1 Thermal characteristics Thermal resistance, junction - case R thJC Thermal resistance, junction ambient R thJA leaded - - 62 Soldering temperature, wavesoldering only allowed at leads T sold 1.6 mm (0.063 in.) from case for 10 s - - 260 °C V K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=250 µA 500 - - Gate threshold voltage V GS(th) V DS=V GS, I D=0.52 mA 2.5 3 3.5 Zero gate voltage drain current I DSS V DS=500 V, V GS=0 V, T j=25 °C - - 1 V DS=500 V, V GS=0 V, T j=150 °C - 10 - µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=7.8 A, T j=25 °C - 0.22 0.25 Ω V GS=10 V, I D=7.8 A, T j=150 °C - 0.54 - f =1 MHz, open drain - 2.2 - Gate resistance Rev. 2.0 RG page 2 Ω 2007-11-06 IPP50R250CP Parameter Values Symbol Conditions Unit min. typ. max. - 1420 - - 63 - - 60 - Dynamic characteristics Input capacitance C iss Output capacitance C oss Effective output capacitance, energy related5) C o(er) Effective output capacitance, time related6) C o(tr) - 130 - Turn-on delay time t d(on) - 35 - Rise time tr - 14 - Turn-off delay time t d(off) - 80 - Fall time tf - 11 - Gate to source charge Q gs - 6 - Gate to drain charge Q gd - 9 - Gate charge total Qg - 27 36 Gate plateau voltage V plateau - 5.2 - V - 0.9 1.2 V - 300 - ns - 3.1 - µC - 23 - A V GS=0 V, V DS=100 V, f =1 MHz pF V GS=0 V, V DS=0 V to 400 V V DD=400 V, V GS=10 V, I D=7.8 A, R G= 23.1Ω ns Gate Charge Characteristics V DD=400 V, I D=7.8 A, V GS=0 to 10 V nC Reverse Diode Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr Peak reverse recovery current I rrm V GS=0 V, I F=7.8 A, T j=25 °C V R=400 V, I F=I S, di F/dt =100 A/µs 1) J-STD20 and JESD22 2) Pulse width t p limited by T j,max 3) Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 4) I SD≤I D, di /dt ≤200A/µs, V DClink=400V, V peak<V (BR)DSS, T j<T jmax, identical low and high side switch 5) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. 6) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Rev. 2.0 page 3 2007-11-06 IPP50R250CP 1 Power dissipation 2 Safe operating area P tot=f(T C) I D=f(V DS); T C=25 °C; D =0 parameter: t p 102 125 1 µs limited by on-state resistance 100 10 µs 101 100 µs 1 ms I D [A] P tot [W] 75 DC 50 10 ms 100 25 10-1 0 0 25 50 75 100 125 150 100 175 101 T C [°C] 102 103 V DS [V] 3 Max. transient thermal impedance 4 Typ. output characteristics Z(thJC)=f(tp); I D=f(V DS); T j=25 °C parameter: D=t p/T parameter: V GS 101 35 20 V 10 V 30 8V 25 100 7V 6V 20 I D [A] Z thJC [K/W] 0.5 0.2 15 0.1 5.5 V 0.05 10-1 10 0.02 0.01 5V single pulse 5 4.5 V 10 -2 10-5 0 10-4 10-3 10-2 10-1 t p [s] Rev. 2.0 0 5 10 15 20 V DS [V] page 4 2007-11-06 IPP50R250CP 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D=f(V DS); T j=150 °C R DS(on)=f(I D); T j=150 °C parameter: V GS parameter: V GS 1.5 25 20 V 10 V 10 V 8V 20 6V 7V 1.2 6.5 V 7V I D [A] R DS(on) [Ω] 5.5 V 15 10 0.9 6V 5V 5.5 V 0.6 4.5 V 5 0.3 0 0 5 10 15 0 20 10 20 V DS [V] 30 40 I D [A] 7 Drain-source on-state resistance 8 Typ. transfer characteristics R DS(on)=f(T j); I D=7.8 A; V GS=10 V I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 50 0.7 25 °C 45 0.6 40 35 30 I D [A] R DS(on) [Ω] 0.5 0.4 150 °C 25 20 0.3 15 98 % typ 10 0.2 5 0.1 0 -60 -20 20 60 100 140 180 T j [°C] Rev. 2.0 0 2 4 6 8 10 V GS [V] page 5 2007-11-06 IPP50R250CP 9 Typ. gate charge 10 Forward characteristics of reverse diode V GS=f(Q gate); I D=7.8 A pulsed I F=f(V SD) parameter: V DD parameter: T j 102 10 25 °C, 98% 8 100 V 150 °C, 98% 101 150 °C 25 °C I F [A] V GS [V] 6 400 V 4 100 2 10-1 0 0 5 10 15 20 25 0 30 0.5 1 Q gate [nC] 1.5 11 Avalanche energy 12 Drain-source breakdown voltage E AS=f(T j); I D=5.2 A; V DD=50 V V BR(DSS)=f(T j); I D=0.25 mA 580 350 560 300 540 V BR(DSS) [V] 250 E AS [mJ] 200 150 520 500 480 100 460 50 440 0 25 75 125 175 -60 -20 20 60 100 140 180 T j [°C] T j [°C] Rev. 2.0 2 V SD [V] page 6 2007-11-06 IPP50R250CP 13 Typ. capacitances 14 Typ. Coss stored energy C =f(V DS); V GS=0 V; f =1 MHz E oss= f(V DS) 7 104 6 Ciss 5 E oss [µJ] C [pF] 103 Coss 10 2 3 2 101 Crss 1 100 0 0 100 200 300 400 500 V DS [V] Rev. 2.0 4 0 100 200 300 400 500 V DS [V] page 7 2007-11-06 IPP50R250CP Definition of diode switching characteristics Rev. 2.0 page 8 2007-11-06 IPP50R250CP PG-TO220-3-1/PG-TO220-3-21: Outline Rev. 2.0 page 9 2007-11-06 IPP50R250CP Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.0 page 10 2007-11-06