INFINEON TLE4946-1L

Da ta Sh e et , V 1 .1 , Oct o be r 20 0 5
TLE4946H
TLE4946-1L
High Precision Bipolar Hall-Effect Latch
Sen s ors
Edition 2005-10
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
© Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values
stated herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation warranties of noninfringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
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TLE4946H
TLE4946-1L
Revision History:
2005-10
Previous Version:
1.0
V 1.1
Page
Subjects (major changes since last revision)
6
Figure 1 Correction of dimensions for package PG-SSO-3-2
14
Figure 6 Correction of dimensions
16
Figure 10 Correction of dimensions
11
Table 7 New entry: Magnetic Offset for TLE4946-1L
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Template: mc_a5_ds_tmplt.fm / 4 / 2004-09-15
TLE4946H
TLE4946-1L
1
1.1
1.2
1.3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
2.1
2.2
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Field Direction Definion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6
Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
7.1
7.2
7.3
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Distance between Chip and Package Surface . . . . . . . . . . . . . . . . . . . . .
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Footprint for SC59 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Sheet
4
5
5
5
6
13
13
14
15
15
V 1.1, 2005-10
High Precision Bipolar Hall-Effect Latch
1
Overview
1.1
Features
•
•
•
•
•
•
•
•
•
•
•
•
2.7 V to 24 V supply voltage operation
Operation from unregulated power supply
High sensitivity and high stability of the magnetic
switching points
High resistance to mechanical stress by
Active Error Compensation
Reverse battery protection (– 18 V)
Superior temperature stability
Peak temperatures up to 195°C without damage
Low jitter (typ. 1 µs)
High ESD performance (± 6 kV HBM)
Digital output signal
SMD package SC59 (SOT23 compatible) (TLE4946H))
Leaded package PG-SSO-3-2 - (TLE4946-1L)
1.2
TLE4946H
TLE4946-1L
SC59
SC59
PG-SSO-3-2
Functional Description
The TLE4946H and the TLE4946-1L are integrated circuit Hall-effect sensors designed
specifically for highly accurate applications.
Precise magnetic switching points and high temperature stability are achieved by active
compensation circuits and chopper techniques on chip.
Type
Package
TLE4946H
SC59
TLE4946-1L
PG-SSO-3-2
Data Sheet
5
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Overview
1.3
Pin Configuration (top view)
Center of
Sensitive Area
2.08 ± 0.1
3
1.35
0.8
1
1.5
± 0.15
2
± 0.15
1 2 3
PG-SSO-3-2
SC59
Figure 1
Pin Definition and Center of Sensitive Area
Table 1
Pin Definitions and Functions SC59
Pin No.
Symbol
Function
1
VS
Supply voltage
2
Q
Output
3
GND
Ground
Table 2
Pin Definitions and Functions PG-SSO-3-2
Pin No.
Symbol
Function
1
VS
Supply voltage
2
GND
Ground
3
Q
Output
Data Sheet
± 0.1
6
V 1.1, 2005-10
TLE4946H
TLE4946-1L
General
2
General
2.1
Block Diagram
VS
Voltage Regulator
reverse polarity protected
Bias and
Compensation
Circuits
Oscillator
and
Sequencer
Q
Ref
Amplifier
Chopped
Hall Probe
Figure 2
2.2
Low
Pass
Filter
Comparator
with
Hysteresis
GND
Block Diagram
Circuit Description
The chopped Hall IC Switch comprises a Hall probe, bias generator, compensation
circuits, oscillator, and output transistor.
The bias generator provides currents for the Hall probe and the active circuits.
Compensation circuits stabilize the temperature behavior and reduce technology
variations.
The Active Error Compensation rejects offsets in signal stages and the influence of
mechanical stress to the Hall probe caused by molding and soldering processes and
other thermal stresses in the package.
This chopper technique together with the threshold generator and the comparator
ensure high accurate magnetic switching points.
Data Sheet
7
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Maximum Ratings
3
Maximum Ratings
Table 3
Absolute Maximum Ratings
Tj = – 40°C to 150°C
Parameter
Symbol
Limit Values
Unit
min.
max.
VS
– 18
– 18
– 18
18
24
26
V
Supply current
IS
through
protection device
– 50
+ 50
mA
Output voltage
VQ
– 0.7
– 0.7
18
26
V
Continuous
output current
IQ
– 50
+ 50
mA
Junction
temperature
Tj
–
–
–
–
155
165
175
195
°C
Storage
temperature
TS
– 40
150
°C
Magnetic flux
density
B
–
unlimited
mT
Supply voltage
Conditions
for 1 h, Rs ≥ 200 Ω
for 5 min, Rs ≥ 200 Ω
for 5 min @ 1.2 kΩ pull up
for 2000 h (not additive)
for 1000 h (not additive)
for 168 h (not additive)
for 3 x 1 h (additive)
Note: Stresses above those listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 4
Parameter
ESD voltage
ESD Protection 1)
Symbol
VESD
Limit Values
min.
max.
–
±6
Unit
Notes
kV
HBM, R = 1.5 kΩ,
C = 100 pF
TA = 25°C
1) Human Body Model (HBM) tests according to: EOS/ESD Association Standard S5.1-1993 and
Mil. Std. 883D method 3015.7
Data Sheet
8
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Operating Range
4
Operating Range
Table 5
Operating Range
Parameter
Supply voltage
Output voltage
Junction
temperature
Output current
Data Sheet
Symbol
Limit Values
Unit
min.
typ.
max.
VS
VQ
Tj
2.7
–
18
V
– 0.7
–
18
V
– 40
–
150
°C
IQ
0
–
20
mA
9
Conditions
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Electrical and Magnetic Parameters
5
Electrical and Magnetic Parameters
Electrical Characteristics 1).
Table 6
Parameter
Symbol
Limit Values
Unit
Conditions
6
mA
0.2
1
mA
0.3
0.6
V
VS = 2.7 V ... 18 V
VS = – 18 V
IQ = 20 mA
–
0.05
10
µA
for VQ = 18 V
tf
tr
–
0.02
1
µs
RL = 1.2 kΩ; CL = 50 pF
–
0.4
1
µs
fOSC
fSW
–
320
–
0
–
15
td
tQJ
–
13
–
µs
–
1
–
µsRMS Typical value for square
wave signal 1 kHz
–
13
–
µs
VS ≥ 2.7 V
–
100
–
K/W
SC59
–
–
190
min.
typ.
max.
IS
ISR
VQSAT
2
4
0
–
Output leakage
current
IQLEAK
Output fall time
Supply current
Reverse current
Output saturation
voltage
Output rise time
Chopper frequency
Switching
frequency
Delay time 3)
Output jitter
4)
Power-on time 5)
tPON
Thermal resistance RthJA
6)
see: Figure 3 “Timing
Definition” on Page 12
kHz
2)
kHz
PG-SSO-3-2
1) over operating range, unless otherwise specified. Typical values correspond to VS =12 V and TA = 25°C
2) To operate the sensor at the max. switching frequency, the value of the magnetic signal amplitude must be
1.4 times higher than for static fields.
This is due to the - 3 dB corner frequency of the low pass filter in the signal path.
3) Systematic delay between magnetic threshold reached and output switching
4) Jitter is the unpredictable deviation of the output switching delay
5) Time from applying VS ≥ 2.7 V to the sensor until the output state is valid
6) Thermal resistance from junction to ambient
Calculation of the ambient temperature (SC59 example)
e.g. for VS = 12.0 V, IStyp = 4 mA, VQSATtyp = 0.3 V and IQ = 20 mA :
Power Dissipation: PDIS = 54.0 mW.
In TA = Tj – (RthJA × PDIS) = 175°C – (100 K / W × 0.054 W)
Resulting max. ambient temperature: TA = 169.6°C
Data Sheet
10
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Electrical and Magnetic Parameters
Table 7
Magnetic Characteristics TLE4946H 1)
Parameter
Operate point
Release point
Hysteresis
Magnetic Offset
Symbol Tj [°C]
BOP
BRP
BHYS
BOFF
Temperature
TC
compensation of
magn. thresholds
Repeatability of
magnetic
thresholds 3)
Limit Values
min.
typ.
max.
– 40
25
150
11.8
11.0
6.1
15.8
14.0
9.6
19.2
17.0
13.7
– 40
25
150
11.3
11.0
10.5
15.4
15.0
14.3
19.5
19.0
18.1
– 40
25
150
– 19.2 – 15.8
– 17.0 – 14.0
– 13.7 – 9.6
– 40
25
150
– 19.5 – 15.4 – 11.3
– 19.0 – 15.0 – 11.0
– 18.1 – 14.3 – 10.5
– 40
25
150
–
22.0
–
–
28.0
–
–
34.0
–
– 40
25
150
–
22.0
–
–
30.0
–
–
38.0
–
– 40
25
150
–
– 3.0
–
–
–
–
–
3.0
–
– 40
25
150
–
– 2.0
–
–
–
–
–
2.0
–
–
–
- 2000 –
-
-
- 350
-
–
20
–
BREP
– 11.8
– 11.0
– 6.1
Unit
Notes
mT
TLE4946H
TLE4946-1L
mT
TLE4946H
TLE4946-1L
mT
TLE4946H
TLE4946-1L
mT
TLE4946H
2)
TLE4946-1L
2)
ppm/°C TLE4946H
TLE4946-1L
µTRMS
Typ. value for
∆B / ∆t
> 12 mT/ms
1) over operating range, unless otherwise specified. Typical values correspond to VS = 12 V.
2) BOFF = (BOP + BRP) / 2
3) BREP is equivalent to the noise constant
Note: Typical characteristics specify mean values expected over the production spread.
Data Sheet
11
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Timing Diagram
Field Direction Definion
Positive magnetic fields related with south pole of magnet to the branded side of
package.
6
Timing Diagram
BOP
Applied
Magnetic
Field
B RP
td
VQ
td
tf
tr
90%
10%
Figure 3
Data Sheet
Timing Definition
12
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
Package Information
7.1
Package Marking
46
ym
7
Year (y) = 0...9
Month (m) = 1...9,
O - October
N - November
D - December
AEA03643
46 1
Marking TLE4946H
yww S
Figure 4
Year (y) = 0 ... 9
Calendar Week (ww) = 01 ... 52
AEP03644
Figure 5
Data Sheet
Marking TLE4946-1L
13
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
7.2
Distance between Chip and Package Surface
d
Branded Side
d: Distance chip to upper side of IC
SC59: 0.545 ±0.05 mm
AEA03244
Figure 6
Distance Chip SC59 to Upper Side of IC
d
Branded Side
Hall-Probe
d : Distance chip to upper side of IC
PG-SSO-3-2 : 0.57 ±0.08 mm
AEA02510-1
Figure 7
Data Sheet
Distance Chip PG-SSO-3-2 to Upper Side of IC
14
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
7.3
Package Outlines
1.1 ±0.1
3 ±0.1
0.1
3x0.4 +0.05
-0.1
0.2
+0.1
1.6 +0.15
-0.3
2.8 +0.2
-0.1
0.45 ±0.15
0.1 M
3
2
0.1 M
0.95
0.95
(0.55)
GPS09473
1
0.15 MAX.
+0.1
0.15 -0.0
5
0˚...8˚ MAX.
GPS09473
Figure 8
SC59
PCB Footprint for SC59
The following picture shows a recommendation for the PCB layout.
n
0.8
1.4 min
0.9
1.6
1.3
0.9
1.4 min
0.8
1.2
0.8
1.2
0.8
Reflow Soldering
Figure 9
Data Sheet
Wave Soldering
Footprint SC59 (SOT23 compatible)
15
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Package Information
0.8 ±0.1 x 45˚
7˚
2 A
1.52 ±0.05
1 MAX.1)
7˚
0.35 ±0.1 x 45˚
3 ±0.06
0.2
3.29 ±0.08
4.06 ±0.08
1.9 MAX.
(0.25)
0.15 MAX.
4.16 ±0.05
(0.79)
0.6 MAX.
0.2 +0.1
0.4 ±0.05
1.27±0.25
1
2
3
1.27±0.25
1-1
6 ±0.5
18 ±0.5
23.8 ±0.5
9 +0.75
-0.5
38 MAX.
12.7 ±1
A
Adhesive
Tape
Tape
6.35 ±0.4
1) No solder function area
Figure 10
4 ±0.3
12.7 ±0.3
Total tolerance at 10 pitches ±1
0.39 ±0.1
GPO05358
PG-SSO-3-2
Note: You can find all of our packages, sorts of packing and
others in our Infineon Internet Page “Products”:
http://www.infineon.com/products.
Data Sheet
0.25 -0.15
16
Dimensions in mm
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Notes
Data Sheet
17
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Notes
Data Sheet
18
V 1.1, 2005-10
TLE4946H
TLE4946-1L
Notes
Data Sheet
19
V 1.1, 2005-10
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Published by Infineon Technologies AG