Circuit Note CN-0148 Devices Connected/Referenced Circuit Designs Using Analog Devices Products Apply these product pairings quickly and with confidence. For more information and/or support call 1-800-AnalogD (1-800-262-5643) or visit www.analog.com/circuit. AD7606 8-Channel DAS with 16-Bit, Bipolar, Simultaneous Sampling ADC AD7606-6 6-Channel DAS with 16-Bit, Bipolar, Simultaneous Sampling ADC AD7606-4 4-Channel DAS with 16-Bit, Bipolar, Simultaneous Sampling ADC ADR421 Precision, Low Noise XFET® Voltage Reference Layout Considerations for an Expandable Multichannel Simultaneous Sampling Data Acquisition System (DAS) Based on the AD7606 16-Bit, 8-Channel DAS CIRCUIT FUNCTION AND BENEFITS In power line measurement and protection systems, there is a requirement to simultaneously sample large numbers of current and voltage channels of multiphase power distribution and transmission networks. In these applications, the channel count can vary from as few as six channels to greater than 64 channels. The AD7606 8-channel data acquisition system (DAS) with 16-bit bipolar simultaneously sampling SAR ADCs with onchip overvoltage protection greatly simplifies signal conditioning circuitry and reduces the overall parts count, board real estate, and cost of the measurement and protection board. Even with its high level of integration, each AD7606 requires only nine low value ceramic decoupling capacitors. In measurement and protection systems, simultaneous sampling capability is needed to maintain the phase information between the current and voltage channels on multiphase power line networks. The wide dynamic range capability of the AD7606 makes it ideal for capturing both under voltage/current and over voltage/current conditions. The input voltage range is pin-programmable for either ±5 V or ±10 V. This circuit note describes details of the recommended PC board layout for applications using multiple AD7606 devices. The layout is optimized for channel-to-channel matching and part-to-part matching and will help reduce the complexity of calibration routines in high channel count systems. The circuit provides the ability to use the AD7606 2.5 V internal reference when channel-to-channel matching is important or an external ADR421 precision high accuracy (B grade: ±1 mV max), low drift (B grade: 3 ppm/°C max), low noise (1.75 µV p-p, typical, 0.1 Hz to 10 Hz) reference for high channel applications that require excellent absolute accuracy. The low noise and the stability and accuracy characteristics of the ADR421 make it ideal for high precision conversion applications. The combination of the two devices yields a level of integration, channel density, and accuracy that is unsurpassed in the industry. CIRCUIT DESCRIPTION The AD7606 is an integrated, 8-channel data acquisition system with input amplifiers; overvoltage protection; second-order analog antialiasing filters; analog multiplexer; 16-bit, 200 kSPS SAR ADC; and a digital filter—all included on-chip. The circuit shown in Figure 1 consists of two AD7606 devices configurable with the ability to use either the internal 2.5 V reference or an external 2.5 V ADR421 reference. When the REF SELECT pin is connected to a logic high, the internal reference is selected. When the REF SELECT pin is connected to a logic low, the external reference is selected. The power supply requirements are as follows: AVCC = 5 V, VDRIVE = 2.3 V to 5 V (depending on external logic interface requirements). This circuit note describes the layout and performance of an evaluation board that contains two AD7606’s, making a 16-channel data acquisition system. Complete 16-channel DAS PC board documentation is available at www.analog.com/CN0148_PCB_Documentation. Symmetrical layout around the analog input channels and device decoupling is important for good channel-to-channel matching and part-to part matching. Data is shown to support the matching performance obtainable with the 16-channel ADC shown in Figure 1. Dual AD7606 Board Layout for 16-Channel DAS In a system that contains multiple AD7606 devices, a symmetrical layout between the AD7606 devices is important to ensure good device-to-device performance matching. Figure 2 shows a layout with two AD7606 devices. Rev. 0 Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. 10µF 100nF + AVCC VOUT AGND +VIN ADR421 100nF + Rev. 0 | Page 2 of 6 + + V1 V1GND V2 V2GND V3 V3GND V4 V4GND V5 V5GND V6 V6GND V7 V7GND V8 V8GND REFGND REFCAPB REFCAPA REGCAP2 VDRIVE DB0 TO DB15 AVCC1 REGCAP2 100nF AGND VDRIVE DB0 TO DB15 AVCC1 AVCC AGND REF SELECT STBY RANGE PAR/SER SEL VDRIVE VDRIVE VDRIVE SEE TEXT RESET OS 2 OS 1 OS 0 CS1 RD CONVST PARALLEL DB[15:0] INTERFACE VDRIVE VDRIVE 2DECOUPLING CS1 OS 2 OS 1 OS 0 RESET DB[15:0] BUSY CONVST CS RD CONVST CS RD BUSY ANALOG SUPPLY RESET VOLTAGE 5V OS 2 AVCC OS 1 OS 0 VDRIVE VDRIVE SEE TEXT DIGITAL SUPPLY VOLTAGE 2.5V PARALLEL INTERFACE DB[15:0] 100nF 100nF STBY RANGE PAR/SER SEL REF SELECT CONVST A, CONVST B CS RD BUSY AD7606 RESET U2 OS 2 OS 1 OS 0 1µF REFIN/REFOUT 10µF REFIN/REFOUT V1 V1GND V2 V2GND V3 V3GND V4 V4GND V5 V5GND V6 V6GND V7 V7GND V8 V8GND REFGND REFCAPB REFCAPA 100nF CONVST A, CONVST B CS RD BUSY AD7606 RESET U1 OS 2 OS 1 OS 0 1µF AVCC SHOWN ON THE AVCC PIN APPLIES TO EACH AVCC PIN (PIN 1, PIN 37, PIN 38, PIN 48). DECOUPLING CAPACITOR CAN BE SHARED BETWEEN AV CC PIN 37 AND PIN 38. SHOWN ON THE REGCAP PIN APPLIES TO EACH REGCAP PIN (PIN 36, PIN 39). 1DECOUPLING EIGHT ANALOG INPUTS V1 TO V8 10µF REFIN/REFOUT EIGHT ANALOG INPUTS V1 TO V8 10µF + REFIN/REFOUT 10µF REFIN/REFOUT CONVERTER EVALUATION & DEVELOPMENT BOARD EVAL-CED1Z FPGA POWER SUPPLY CIRCUITRY CN-0148 Circuit Note Figure 1. 16-Channel, 16-Bit Data Acquisition System Using Two AD7606 8-Channel DAS (Simplified Schematic, All Connections Not Shown. See Text for Specific Connections Between Devices Corresponding to Channel-to-Channel and Part-to-Part Matching Tests) 08906-001 96 WAY BOARD CONNECTOR Circuit Note CN-0148 The AV CC supply plane runs to the right of both devices. The VDRIVE supply track runs to the left of the two AD7606 devices. The ADR421 reference chip is positioned between both AD7606 devices, and the reference voltage track runs upward to Pin 42 of U2 and downward to Pin 42 of U1. A solid ground plane is used. These symmetrical layout principles can be applied to a system that contains more than two AD7606 devices. The AD7606 devices can be placed in a north-south direction with the reference voltage located midway between the AD7606 devices and the reference track running in the north-south direction, similar to Figure 2. The decoupling capacitors for the REFIN/REFOUT pin and the REFCAPA and REFCAPB pins are critical performance capacitors and should be placed as close as possible to their respective AD7606 pins; where possible, they should be placed on the same side of the board as the AD7606 device. Figure 3 shows the recommended decoupling on the top layer of the AD7606 board. The four ceramic capacitors shown are the decoupling caps for the REFIN/REFOUT pin, REGCAP pins, and REFCAPA and REFCAPB pins. These capacitors are placed in a north-south direction to get as close to their respective pins as possible. PIN 1 Good decoupling is also important to lower the supply impedance presented to the AD7606 and to reduce the magnitude of the supply spikes seen by the AD7606 devices. The decoupling capacitors should be placed close to, ideally right up against, these pins and their corresponding ground pins. 08906-003 REFCAPA/B REGCAP Figure 3. Top Layer Decoupling Showing Capacitors on the Two REGCAP Pins, REFIN/REFOUT Pin, and REFCAPA/B Pins. ADR421 AD7606 08906-004 AVCC 08906-002 REFCAPA/B REFIN/REFOUT REGCAP REGCAP U1 U1 AVCC AVCC VDRIVE AVCC REFCAPA/B REFIN/REFOUT REGCAP REFERENCE REGCAP VDRIVE U2 U2 REFIN/REFOUT AD7606 REGCAP AVCC Figure 2. PCB Layout for 16-Channel DAS Using Two AD7606’s Rev. 0 | Page 3 of 6 Figure 4. Bottom Layer Decoupling Showing Capacitors on the Four AVCC Pins and the VDRIVE Pin. CN-0148 Circuit Note Using the AD7606 Internal Reference as the System Reference Figure 4 shows bottom layer decoupling. Bottom layer decoupling is for the four AVCC pins and the VDRIVE pin. Multiple vias are used to connect the pins to their respective decoupling capacitors. Symmetrical layout of the decoupling capacitors around the AD7606 devices will help with part-topart performance matching. Multiple vias are used to connect capacitor pads and pin pads to ground and supply planes and the reference track. Channel-to-Channel Matching for 16-Channel System In high channel count systems good channel-to-channel and part-to-part performance matching will help to greatly simplify calibration routines. Symmetrical layout of the AD7606 devices, the analog input channels, and the decoupling capacitors will aid performance matching between multiple devices. The use of a common system reference will further enhance matching performance in the system. Figure 5 shows the circuit configuration used to measure channel-to-channel matching between the 16 channels on the board when all inputs are grounded. There is a maximum histogram spread of 7 codes with each channel histogram centered on code 0, as shown in Figure 6. REFIN/REFOUT 10µF 1kΩ REF SELECT The AD7606 has an internal 2.5 V reference that is internally amplified to provide the AD7606 ADC with an approximate 4.5 V buffered reference. In high channel count applications where channel-to-channel and part-to-part matching performance is critical, the internal reference of one AD7606 can be used to provide the reference to the second AD7606 device. For this configuration, U1 is configured to operate with the internal reference enabled, as shown in Figure 7. The AD7606 U2 device is configured to operate in the external reference mode. The 2.5 V reference available at the REFIN/RFOUT pin of U1 is routed to the REFIN/REFOUT pin of U2. A 10 µF decoupling capacitor is placed on the REFIN/REFOUT pins of the AD7606 devices. On both AD7606 U1 and U2, the REFCAPA and REFCAPB pins are shorted together and decoupled to GND using a 10 µF ceramic capacitor. Both AD7606 devices are operating at a sampling rate of 200 kSPS, and a 7.5 V dc signal is applied to V1 and V2 of U1, as shown in Figure 7. The histogram of codes is recorded and shown in Figure 8. The difference in the mean output code was 1.2 codes between channels on the same device. All 16 channels on the board are converting at 200 kSPS. AD7606 U1 V1 V2 V3 AVCC 1kΩ REF SELECT AD7606 GND REFIN/REFOUT 100nF 10µF 1kΩ V2 V3 AVCC ADR421 REF SELECT VIN AD7606 U2 V8 VOUT GND V1 10µF 100nF V2 V3 REFIN/REFOUT 100nF 10µF 1kΩ REF SELECT AD7606 U2 08906-005 V8 V1 7.5V V8 VOUT V1 V2 V3 Figure 5. Simplified Diagram of Circuit Used to Test Channel-to-Channel Matching in a 16-Channel System Using Two AD7606’s, All Inputs Grounded, Using External ADR421 Reference V8 08906-007 VIN REFIN/REFOUT VDRIVE U1 ADR421 10µF 100nF 10µF Figure 6. Histogram of Circuit Shown in Figure 5 Showing Channel-toChannel Matching in 16-Channel System Using External ADR421 Reference. Rev. 0 | Page 4 of 6 08906-008 08906-006 Figure 7. Simplified Diagram of Circuit Used to Test Channel-to-Channel Matching in One AD7606 Using Internal U1 Reference Figure 8. Histogram of Circuit Shown in Figure 7 Circuit Note CN-0148 The 7.5 V signal was applied to V1 of U1 and V1 of U2; all 16 channels on the board are operating at 200 kSPS, as shown in the simplified configuration circuit of Figure 9. The histogram of codes is recorded in Figure 10. The difference in the mean output code was 1.4 codes between V1 channels on different devices. 10µF The value for the actual ideal code will vary over temperature depending on the temperature coefficient specification of the system reference. In applications where absolute accuracy is important or in applications that wish to avoid complex temperature calibration routines for absolute accuracy and channel matching, a tight tolerance low drift 2.5 V reference like the ADR421 should be used as the system reference for the AD7606 devices. REFIN/REFOUT VDRIVE 1kΩ REF SELECT A dc voltage of 7.5 V is applied to the input of U1 (V1 and V2), shown in the circuit of Figure 11, using the external reference. The histogram of codes of the two channels on U1 is recorded in Figure 12. The difference in the mean of the histogram of codes for both channels is 0.9 LSB. AD7606 U1 V1 7.5V V2 V3 AVCC ADR421 VIN V8 VOUT REFIN/REFOUT 100nF 10µF 10µF 100nF REFIN/REFOUT 10µF GND 1kΩ 1kΩ REF SELECT AD7606 REF SELECT U1 AD7606 U2 V1 V2 V3 AVCC V2 V3 ADR421 VIN 08906-009 V8 V1 7.5V Figure 9. Simplified Diagram of Circuit Used to Test Part-to-Part Matching Between Two AD7606’s, Internal U1 Reference Used as System Reference V8 VOUT GND 10µF 100nF REFIN/REFOUT 100nF 10µF 1kΩ REF SELECT AD7606 U2 V1 V8 08906-011 V2 V3 08906-010 Figure 11. Simplified Diagram of Circuit Used to Test Channel-to-Channel Matching in One AD7607 Using External Reference Figure 10. Histogram of Circuit Shown in Figure 9 08906-012 When using the internal reference of one AD7606 as the system reference, the above plots indicate that the channel-to-channel matching is very good between channels on a single device and between channels on multiple AD7606 devices. Absolute Accuracy When absolute accuracy of the ADC conversion result, in addition to channel-to-channel and part-to-part matching, is critical, an external tight tolerance low drift reference should be used as the system reference. In this circuit, the ADR421 2.5 V reference is used as the system reference. The ADC output code will be influenced by the reference voltage applied to the AD7606 device: Actual Ideal Code = VIN V × 215 × REF 10 V 2. 5 V Figure 12. Histogram of Circuit Shown in Figure 11 The 7.5 V dc is applied to V1 channels on U1 and U2 AD7606 devices in the circuit of Figure 13 to test part-to-part matching using the external reference. The histogram of codes of the two V1 channels for two AD7606 devices is shown in Figure 14. All 16 channels on the board are running at 200 kSPS throughput rate. The difference in the histogram mean between the V1 channels on U1 and U2 is 0.6 LSB. Rev. 0 | Page 5 of 6 CN-0148 Circuit Note COMMON VARIATIONS REFIN/REFOUT 10µF 1kΩ The AD7606 is an 8-channel DAS. Also available are the AD7606-6 (6-channel DAS) and AD7606-4 (4-channel DAS). The AD7607 is a 14-bit version of the AD7606. Alternate voltage references can be chosen using the Voltage Reference Selection and Evaluation Tool. REF SELECT AD7606 U1 V1 7.5V V2 V3 AVCC ADR421 VIN GND MT-021 Tutorial, Successive Approximation ADCs. Analog Devices. REFIN/REFOUT 100nF 10µF 10µF 100nF LEARN MORE V8 VOUT 1kΩ REF SELECT MT-031 Tutorial, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND". Analog Devices. AD7606 U2 MT-101 Tutorial, Decoupling Techniques. Analog Devices. V1 V8 08906-013 V2 V3 Figure 13. Simplified Diagram of Circuit Used to Test Part-to-Part Matching Between Two AD7606’s Using External Reference Voltage Reference Selection and Evaluation Tool. Analog Devices. Data Sheets and Evaluation Boards 16-Channel DAS PC Board Documentation AD7606 Data Sheet AD7606 Evaluation Board AD7606-4 Data Sheet AD7606-4 Evaluation Board AD7606-6 Data Sheet 08906-014 AD7606-6 Evaluation Board Figure 14. Histogram of the Circuit Shown in Figure 13 The histograms indicate that, with the ADR421 external system reference, the matching between the mean of the histograms on one AD7606 device and between multiple AD7606 devices is less than 1 LSB. ADR421 Data Sheet EVAL-CED1Z Converter Evaluation and Development Board REVISION HISTORY 6/10—Revision 0: Initial Version Conclusions This layout ensures good channel-to-channel matching using a single AD7606 and also good part-to-part matching between multiple AD7606’s on the same PC board. Symmetrical layout around the AD7606 devices and, in particular, the decoupling capacitors will aid with channel-to-channel and part-to-part matching. Good channel-to-channel and part-to-part matching will mean less complex calibration routines in high channel count systems. (Continued from first page) Circuits from the Lab circuits are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may use the Circuits from the Lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the Circuits from the Lab circuits. Information furnished by Analog Devices is believed to be accurate and reliable. However, "Circuits from the Lab" are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any Circuits from the Lab circuits at any time without notice but is under no obligation to do so. ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CN08906-0-6/10(0) Rev. 0 | Page 6 of 6