EVAL-SSM3515Z User Guide UG-580 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the SSM3515 25 W, Filterless, Class-D, Digital Input Audio Amplifier FEATURES EVALUATION BOARD TOP VIEW AND BOTTOM VIEW Filterless digital input, mono Class-D amplifier Operates from a single 4.5 V to 17 V supply 25 W output power, 16 V supply and 4 Ω load at 1% THD + N 107 dB A-weighted signal-to-noise ratio 93.3% efficiency into 8 Ω load at 12 V I2C control with up to 4 pin-selectable slots/addresses Digital interface supports sample rates from 8 kHz to 192 kHz Flexible digital and analog gain adjustment Flexible supply monitoring AGC function Short-circuit and thermal protection, thermal warning EVALUATION KIT CONTENTS EVAL-SSM3515Z evaluation board EVAL-ADUSB2EBZ USB interface board (USBi) User GUI with SigmaStudio software (download from product page) 11691-001 DOCUMENTS NEEDED SSM3515 data sheet EVAL-SSM3515Z user guide Figure 1. EVAL-SSM3515Z Evaluation Board Top View GENERAL DESCRIPTION This user guide describes how to configure and use the EVALSSM3515Z evaluation board. When using the evaluation board, consult this user guide in conjunction with the SSM3515 data sheet, which provides specifications, internal block diagrams, and application guidance for the amplifier IC. The EVAL-SSM3515Z evaluation board includes a complete circuit for driving a loudspeaker. Figure 1 shows the top view of the evaluation board, and Figure 2 shows the bottom view of the evaluation board. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. A | Page 1 of 19 11691-002 The EVAL-SSM3515Z is an evaluation board for quick evaluation of the SSM3515. The board uses a single supply from 4.5 V to 17 V. The board includes 3.3 V and 1.8 V regulators. The on-board digital SPDIF optical input generates the serial digital signal to the SSM3515. The board provides register control using USBi with SigmaStudio™-based GUI or the Total Phase Aardvark™ I2C/SPI Host Adapter. The application circuit requires a minimum of external components and can operate from a single 4.5 V to 17 V supply. It is capable of delivering 8 W of continuous output power into an 8 Ω load, and 15 W into an 4 Ω load from a 12 V power supply. The board can deliver 25 W into a 4 Ω load from a 16 V power supply, all with <1% total harmonic distortion + noise (THD + N); however, output powers above 20 W are not continuous due to the thermal limit. Figure 2. EVAL-SSM3515Z Evaluation Board Bottom View UG-580 EVAL-SSM3515Z User Guide TABLE OF CONTENTS Features .............................................................................................. 1 I2C Control Port.............................................................................4 Evaluation Kit Contents ................................................................... 1 Output Configuration ...................................................................5 Documents Needed .......................................................................... 1 Edge Mode......................................................................................5 General Description ......................................................................... 1 Component Selection ...................................................................5 Evaluation Board Top View and Bottom View................................. 1 Getting Started ...................................................................................6 Revision History ............................................................................... 2 USBi and SigmaStudio Install ......................................................6 Evaluation Board Hardware Overview .......................................... 3 Evaluation Board Startup .............................................................6 Setting Up the Hardware ................................................................. 4 I2C Writes for Board Startup ..................................................... 10 Power Supply Configuration ....................................................... 4 Evaluation Board Schematics and Artwork ................................ 11 Regulator Enable ........................................................................... 4 Ordering Information .................................................................... 18 Digital Audio Input ...................................................................... 4 Bill of Materials ........................................................................... 18 Input Configuration ..................................................................... 4 REVISION HISTORY 9/15—Rev. 0 to Rev. A Change to Figure 1 ........................................................................... 1 Change to Figure 12 ....................................................................... 13 Change to Figure 13 ....................................................................... 14 Change to Figure 19 ....................................................................... 17 6/15—Revision 0: Initial Version Rev. A | Page 2 of 19 EVAL-SSM3515Z User Guide UG-580 EVALUATION BOARD HARDWARE OVERVIEW The evaluation board includes all the hardware required for quick evaluation of the SSM3515. The board needs an external, high current, low noise power supply with 4.5 V to 17 V and 5 A current capability. The board needs either an optical SPDIF or serial I2S/TDM-compatible audio source. The board provides the 10-pin header for connecting an external I2C control device, such as the USBi (included with the kit) or Aardvark I2C/SPI controller via USB to control the internal registers. The loudspeaker with 4 Ω to 8 Ω impedance can be connected directly for listening. Rev. A | Page 3 of 19 UG-580 EVAL-SSM3515Z User Guide SETTING UP THE HARDWARE POWER SUPPLY CONFIGURATION The PVDD and GND binding posts are used to power the board. Take care to connect the dc power with correct polarity and voltage. Reverse polarity or overvoltage can damage the board permanently. The supply voltages range is from 4.5 V to 17 V; higher voltages can damage the amplifier. Alternately, the P3 2-pin, 0.1 inch header can be used to connect the external supply. When inserted, JP2 turns on the power-on LED. U1 is a 3.3 V regulator included to power up the on-board SPDIF receiver. JP1 provides the input to the 3.3 V regulator. If the onboard SPDIF receiver is used, JP1 must be inserted. The U2 regulator is included as an option to provide the 1.8 V (DVDD) power to the SSM3515 and other on-board supporting circuits. Alternately, the external 1.8 V source can be connected via the IOVDD binding post. Use P1 to select the external vs. internal 1.8 V source. REGULATOR ENABLE In addition to the 4.5 V to 17 V power supply, a voltage must be present to activate the integrated voltage regulators on the SSM3515. The SSM3515 amplifier has an internal regulator to provide a clean internal 5 V (AVDD) rail, as well as an internally generated 1.8 V (DVDD) rail. When the REGEN pin is pulled high, by connecting the top two pins of J9 (REG_EN to PVDD), the internal DVDD regulator is enabled. If the REGEN pin is pulled low, the regulators are disabled and the 1.8 V DVDD must be present for the SSM3515 to function. DIGITAL AUDIO INPUT M1 and J1 on the evaluation board provide the SPDIF optical or coaxial input connectors. The S1 switch selects the desired source. The U3 IC receives the SPDIF signal and generates the serial digital output suitable for the SSM3515. The default format is set as I2S, 2-channel with 32 bits/channel. The serial outputs are level shifted to 1.8 V using U6, U7, and U8 before feeding to the SSM3515. Alternatively, a suitable I2S/TDMcompatible source such as a DSP serial port or Audio Precision digital serial port can be connected at P2. The P12 header selects either the SPDIF or external source. INPUT CONFIGURATION There are several ways to source audio to the SSM3515 on the evaluation board. The evaluation board can accept direct I2S/TDM data or it can convert from 2-channel SPDIF/optical digital audio data to I2S using an on-board digital audio receiver (CS8416-CZZ). To make a connection from either the on-board audio receiver circuitry or the P2 external digital audio header to the SSM3515 device pins, jumpers must be inserted across all three rows of H2. In some use cases, such as high speed clocking of data, remove the jumpers across H2 to reduce stub length and minimize parasitics. In this case, source digital audio data on the H1 header block. When using an I2S or TDM source, such as from Audio Precision, it is recommended to source the input audio signals directly to the FSYNC, BCLK, and SDATAI pins of the P2 header block. When connecting multiple SSM3515 evaluation boards on the same digital audio bus in a daisy-chain configuration, note that the P5 header port has the same direct connections to the SSM3515 pins. To route the externally sourced I2S or TDM data to the SSM3515 pins, insert jumpers across SDATAI_EXT, FSYNC_EXT, and BCLK_EXT on the P12 header block. If the user does not have a direct I2S or TDM source, the onboard digital audio receiver can accept SPDIF data from a digital audio source, such as the digital audio output of a compact disk player. In this case, select either optical or SPDIF on the S1 switch to properly connect the desired input to the digital audio receiver. To route the on-board converted SPDIF-to-I2S data to the SSM3515 pins, insert jumpers across SDATAI_INT, FSYNC_INT, and BCLK_INT on the P12 header block. Note that the audio performance is limited to that of the on-board digital audio receiver (CS8416-CZZ). I2C CONTROL PORT The SSM3515 supports I2C control with the state of the ADDR pin (J11 and J4) determining the I2C device address. Inserting a jumper across J4 shorts across a 47 kΩ resistor. Removing the jumper across J4 inserts the resistor in the signal path for pullup or pull-down operation. A jumper inserted across the top two pins of J11 pulls the ADDR pin to a high state (IOVDD), whereas inserting a jumper across the bottom two pins of J11 pulls the ADDR pin to a low state (GND). To set the ADDR pin to open condition, insert a jumper across J4 and do not insert jumpers on J11. Table 1. ADDR Pin Configuration I2C Address 0x14 TDM Slot 1 J11 (ADDR) GND J4 Open 0x15 0x16 2 3 Open IOVDD Short Open 0x17 4 IOVDD IOVDD N/A1 N/A1 GND Short 1 Configuration ADDR pin connected through 47 kΩ to GND ADDR pin unconnected ADDR pin connected through 47 kΩ to IOVDD ADDR pin directly connected to IOVDD Not an option N/A means not applicable. The SK1 10-pin header connects the USBi (provided with the kit) for I2C control of the device. Rev. A | Page 4 of 19 EVAL-SSM3515Z User Guide UG-580 OUTPUT CONFIGURATION EDGE MODE The OUT− and OUT+ output terminals connectors provide convenient attachment points for speakers or other load devices with standard banana connectors. In addition, 2-pin, 0.100 inch headers are provided. J7 is inserted before the EMI filtering portion, and J8 is inserted after the EMI filtering portion. Because the SSM3515 does not typically require any external audio band LC output filtering due to a low noise modulation scheme, a low cost, high performance common-mode, chokebased filter can optionally be inserted on the evaluation board for EMI suppression. To reduce the radiated emissions from the SSM3515 amplifier, an edge rate control mode is available. To enable the reduced EMI mode, send an I2C control register write to activate Bit D4 of Register 0x01. The efficiency is slightly reduced when low EMI mode is enabled. To return to the ordinary (fast edge) operating mode, write a 0 to Bit D4 of Register 0x01. For optimal performance measurement, remove this filtering by inserting 0 Ω links or a thick wire short across B1 and B2. In this case, leave the C39 to C41 filter capacitors unpopulated. Common-Mode Choke Coil—L5 To safeguard against system radiated emission failure, especially if the speaker cable length exceeds 20 cm, it may be necessary to include an output filter. The recommended filter uses a common-mode choke, L5 in the output path, plus capacitors, C39 to C41, to couple the output terminals to ground. A schematic of this configuration is shown in Figure 10, with recommended values for the filter components given. The recommended common-mode chokes are listed in Table 2. COMPONENT SELECTION Selecting the proper components is the key to achieving the performance required at the cost budgeted. The L5 common-mode choke coil is a necessary component for filtering out the EMI caused at the switching output nodes when the length of the speaker wire is greater than 20 cm. Recommended components are shown in Table 2. Output Shunt Capacitors There are three output shunt capacitors, C39 to C41, that work with the L1 common-mode chokes coil. Use small size (0603 or 0402), multilayer ceramic capacitors made of X7R or C0G (NP0) materials. The recommended value is 220 pF. Output Ferrite Beads Alternatively, a carefully selected pair of ferrite beads can be used in place of the common-mode choke to save space. Take care with the component selection to avoid degradation of THD + N or signal-to-noise ratio (SNR) as a result of the nonlinear performance of the ferrite beads. A summary of the recommended ferrite beads is shown in Table 3. If ferrite beads are preferred for EMI filtering at the output nodes, choose only the selected ferrite beads in Table 3 to avoid excessive noise induced by the nonlinear behavior of ferrite beads. For the best THD and SNR performance as specified in the SSM3515 data sheet, remove the output filters and insert a short across L1 and L2. Table 2. Recommended Common-Mode Chokes Part No.1 DLW5BTN251SQ2 DLW5BTN101SQ2 1 Manufacturer Murata Manufacturing Co. Murata Manufacturing Co. Z (Ω at 100 MHz) 250 100 IMAX (mA) 5000 6000 DCR (Ω) 0.014 0.009 Size (mm) 5.0 × 5.0 × 2.35 5.0 × 5.0 × 2.35 Z (Ω at 100 MHz) 100 180 300 IMAX (mA) 4000 3400 3100 DCR (Ω) 0.014 0.020 0.024 Size (mm) 2.0 × 1.6 × 0.9 2.0 × 1.6 × 0.9 2.0 × 1.6 × 0.9 Contact Murata Manufacturing Co. for further options. Table 3. Recommended Output Ferrite Beads Part No. NFZ2MSM101SN10 NFZ2MSM181SN10 NFZ2MSM301SN10 Manufacturer Murata Manufacturing Co. Murata Manufacturing Co. Murata Manufacturing Co. Rev. A | Page 5 of 19 UG-580 EVAL-SSM3515Z User Guide GETTING STARTED USBi AND SigmaStudio INSTALL To use USBi and SigmaStudio-based GUI, follow these steps: 1. 2. 3. 4. 5. 6. Download the SigmaStudio software suitable for your PC from the SigmaStudio page at www.analog.com/SigmaStudio. Open the downloaded .zip file. For 64-bit operating systems, double click SigmaStudioRel3.11-x64.exe. For 32-bit operating systems, doubleclick SigmaStudio-Rel3.11-x86.exe. Follow the installation steps as prompted and install the USBi driver as the final step. The SStudio.exe file is installed by default to the folder Program Files\Analog Devices\SigmaStudio3.11. Double click SStudio.exe. If the window shown in Figure 3 appears, the SigmaStudio software has been installed. Proceed to evaluation board startup. EVALUATION BOARD STARTUP To start up the evaluation board using single supply, follow these steps: 2. 3. Ensure that the output filter is installed or 0 Ω links are in place to connect the output terminals to the IC. Place a jumper between the upper two pins of J9 (REG_EN to PVDD) to enable the on-chip 1.8 V regulator. a. In the bottom right corner, place a jumper across the bottom pins of J11, and open J4 (ADDR pull-down to GND) to select the device I2C address of 0x28, or 0x14 if using the Aardvark adapter. Select the digital audio source for the SDATAI, FSYNC, and BCLK pins of the SSM3515. If using the SPDIF source, 11691-103 1. select the _INT signal paths on P12. If sourcing via the Audio Precision I2S/TDM output, select the _EXT signal paths on P12 and connect digital audio signals via the Audio Precision connection to P2. Note that P5 allows multiple evaluation boards to be daisy-chained to the same signal bus. 4. Insert jumpers across all three rows of H2 to establish direct connection of the digital audio signal lines to the inputs of the SSM3515. For special use cases, to minimize stub length, remove the jumpers across H2 and source digital audio signals directly to the ports of H1. 5. If using the on-board SPDIF-to-I2S converter instead of the external digital audio port for Audio Precision, insert jumpers across JP1 and the bottom two terminals of P1 (IOVDD to 1V8) to power the level translators for digital audio signals. 6. Connect a USBi or Total Phase Aardvark USB-to-I2C adapter to SK1. 7. Connect a suitable 4 Ω to 8 Ω speaker to the left and right banana jacks. 8. Connect a power supply to the PVDD and GND binding posts. Turn on the power supply. 9. If using the Total Phase Aardvark USB-to-I2C adapter, use Device Address 0x14 and write the appropriate I2C commands to activate the SSM3515. Setting SPWDN (Bit D0 of Register 0x00) to 0 activates the device. 10. If using SigmaStudio, ensure that the USBi is connected to the USB port on the PC and that the 10-pin header is connected at SK1. Figure 3. SigmaStudio GUI Start Window Rev. A | Page 6 of 19 UG-580 11. In the SigmaStudio window, under the File menu, click New Project (see Figure 3). 12. From the Tree Toolbox, under Processors (ICs/DSPs), drag the SSM3515 block to the schematic page; and from under Communication Channel, drag the USBi block onto the schematic page. Using the mouse, connect the two as shown in Figure 5. 13. If the I2C communication failure message appears, as shown in Figure 4, the board is not set up correctly. a. If the yellow light on USBi flickers, disconnect and try reconnecting the USB connector from the USBi board. b. Check if the SCL/SDA signal lines at J2-2 and J3-2 are pulled to high. c. Check the 1.8 V IOVDD on P1-2. If the error persists, further debug for I2C is required before proceeding further. 11691-105 EVAL-SSM3515Z User Guide Figure 4. I2C Communication Failure Message PROCESSERS (ICs/DSPs) COMMUNICATION CHANNEL 11691-104 IC1 TAB Figure 5. New Project Setup Rev. A | Page 7 of 19 UG-580 EVAL-SSM3515Z User Guide 17. If using the Audio Precision PSIA, the digital serial signals must be made available at Header P2. 18. Click the Chip/DAC Control tab in the GUI (see Figure 6). This tab provides the power-up, mute, volume control, and gain settings. 19. Next, select the desired analog gain under Amp Analog Gain Selection. 11691-106 14. Click the IC 1 tab to bring up the register control screen for the SSM3515 (see Figure 5). 15. Under Master Software Powerdown, select Normal Operation (see Figure 6). 16. If using the on-board SPDIF-to-I2S circuitry, press the S2 button to reset the SPDIF receiver. After reset, the BCLK, FSYNC, and SDATAI signals are available at Header H2. Figure 6. Chip/DAC Control Tab Rev. A | Page 8 of 19 EVAL-SSM3515Z User Guide UG-580 21. Click the Chip/DAC Control tab in the GUI (see Figure 6). Under Master Software Powerdown, select Normal Operation to power up the chip. 22. The Fault/Status tab provides the settings for faults and status (see Figure 8). Click Read Status. If no faults exist, all indicators are green. 11691-107 20. In the SAI/Limiter Control tab, under SAI Control 1, select Stereo Mode (see Figure 7). If clock and data signals are present, the SSM3515 switching outputs are available at Connector J8 and audio can be heard from the connected speaker. 11691-108 Figure 7. Serial Audio Interface and Limiter Control Tab Figure 8. Fault/Status Tab Rev. A | Page 9 of 19 UG-580 EVAL-SSM3515Z User Guide To start up the board, only Register 0x00 needs to be written. Set the SPWDN bit to 0 (that is, set Register 0x00 to 0x80). If the BCLK, FSYNC, and SDATA are present with required supply voltages, writing to this register wakes up the board from power-down. For I2C details, see the SSM3515 data sheet. Typical I2C writes are 3 bytes, with the first byte containing the START BIT IC ADDRESS (7 BITS) R/W = 0 ACK BY SLAVE device address, followed by the register address, followed by register data. Figure 9 shows a typical I2C single-word write sequence. The default 7-bit device address set on the board is 0x14. If set differently from the default value, use that address for the IC address bits. Set the subaddress as 0x00 and Data Byte 1 as 0x80. Following the I2C write, the device pulls the SDA line low during the acknowledge bit period. SUBADDRESS (8 BITS) ACK BY SLAVE Figure 9. Single-Word I2C Write Format Rev. A | Page 10 of 19 DATA BYTE 1 (8 BITS) STOP BIT 11691-109 I2C WRITES FOR BOARD STARTUP EVAL-SSM3515Z User Guide UG-580 EVALUATION BOARD SCHEMATICS AND ARTWORK POWER SUPPLY PVDD 111-2223-001 GND 111-2223-001 P4 1 1 IOVDD_EXT 1 PVDD GND C1 470UF U1 LDO EXTERNAL POWER GND P23 1 2 IODVDD 111-2223-001 2 1 1 2 P3 EXT_LDO JP1 EXT_LDO 2 1 69157-102HLF R36 LDO_POWER 2.2 GND C4 0.01UF JP2 2 1 69157-102HLF C3 1UF LT1761ES5-3.3#PBF 1 IN 3 5 SHDN_N OUT 4 BYP GND D1 3V3_REG C5 1UF 2 P N C6 10UF IOVDD HEADER P1 1 2 3 GBC03SAAN 1V8_REG IOVDD GND A SML-DSP1210SIC-TR (RED) C U2 LT1761ES5-1.8#PBF R1 1K 3 4 P N C7 10UF C8 1UF IN SHDN_N OUT 5 BYP GND 2 C9 0.01UF C10 P 1UF N C11 10UF GND Figure 10. Evaluation Board Power Supply Section Rev. A | Page 11 of 19 TP2 TP3 TP4 TP5 TP6 TP7 11691-003 1 P7 C21 0.1UF DNI R22 10K DNI J1 CTP-021-A-S-Y C18 0.1UF 1 3V3_REG GND GND 2 4 GND 2 3 4 1 12.288MEGHZ 3 U5 DNI R21 750 GND 2 PLR135/T9 10K R20 33 DNI R23 1 3 8416_OMCK EG1218 S1 2 P GND C12 10UF C13 0.1UF L4 600OHM 6 23 21 VA VD VL L3 600OHM U3 GND IOVDD R46 4.75K GND C32 1UF CS8416_RST FSM6JSMA GND R18 R15 R13 GND C15 0.1UF 33 R17 33 47K REPLACE WITH O-OHM CS8416_VL C14 0.1UF 1 8 FILT RXP3 2 14 NV_RERR RXP2 3 15 C16 10000PF AUDIO_N RXP1 4 16 96KHZ RXP0 17 5 RCBL 18 RXN R2 CS8416_RST 9 U C17 10000PF CS8416_VL 19 RST_N C 47K 10 20 47K R3 RXSEL1 TX 24 11 R4 47K RXSEL0 RMCK 12 26 R5 47K TXSEL1 SDOUT 13 27 47K R6 TXSEL0 OSCLK 28 8416_OMCK 25 OLRCK OMCK S2 AGND DGND 7 1 N1 N3 3 22 CS8416-CZZ 2 N2 N4 4 N L2 600OHM 2 1 2 1 M1 3 VCC 1 VOUT L1 600OHM SPDIF_IN 2 1 REPLACE WITH O-OHM DNI 2 1 3V3_REG R7 47K 33 1 R14 47K CS8416_VL 47K 47K 33 SDATA_SPDIF 1 TP11 BCLK_SPDIF LRCLK_SPDIF R16 MCLK_SPDIF C19 0.022UF 1000PF TP1 R9 47K R11 47K C20 3.01K CS8416_VL R12 R10 R8 R19 47K GND 1 2 3 GBC03SAAN P6 11691-004 Rev. A | Page 12 of 19 2 Figure 11. Evaluation Board Digital Input Converter Section 1 UG-580 EVAL-SSM3515Z User Guide EVAL-SSM3515Z User Guide UG-580 INPUT EXTERNAL DATA INPUT HEADER EXTERNAL SERIAL DATA INPUT P2 I2S BCLK/TDM FSYNC I2S LRC/TDM BCLK/PDMCLK 1 2 3 4 5 6 7 8 9 10 C22 DNI R28 SDATA_EXT 50 68PF BCLK_EXT R26 0 R25 0 R24 0 DNI GND LRCLK_EXT SSM3515 DIGITAL DATA INPUT SELECTOR MCLK_EXT GND P12 3MN2510-6002RB 1 2 3 4 5 6 7 8 9 10 11 12 BCLK_OUT FSYNC_OUT DIGITAL DATA FROM SPDIF C24 1V8_REG 3V3_REG SDATAI_OUT C25 TSW-106-08-G-D 0.1UF 0.1UF U6 1 VCC1 5 VCC GND SDATA_SPDIF 2 A GND R30 4 33 GND Y 3 FXLP34P5X EXTERNAL DATA INPUT HEADER C26 R39 C30 1V8_REG 3V3_REG GND DNI C27 A Y R37 GND R31 4 P5 R38 50 SDATAI_BD2 BCLK_BD2 0 0 LRCLK_BD2 33 EXTERNAL SDATAO CONNECTION I2S BCLK/TDM FSYNC I2S LRC/TDM BCLK/PDMCLK GND 3MN2510-6002RB FXLP34P5X 3 1 2 3 4 5 6 7 8 9 10 DNI GND 2 68PF R33 U7 1 VCC1 5 VCC GND LRCLK_SPDIF GND 0.1UF 0.1UF 0 C28 1V8_REG 3V3_REG GND C29 0.1UF 0.1UF A Y R32 4 33 SSM3515 TDM STUB ISOLATOR GND H2 FXLP34P5X BCLK FSYNC SDATAI GND 1 3 5 2 4 6 BCLK_OUT FSYNC_OUT SDATAI_OUT TSW-103-08-G-D PLACE VERY CLOSE TO SSM3515 11691-005 2 3 BCLK_SPDIF GND U8 1 VCC1 5 VCC GND Figure 12. Evaluation Board Digital Input Routing/Level Shifting Section Rev. A | Page 13 of 19 GND H1 2 4 6 TSW-103-08-G-D PLACE CLOSE TO SSM3515 1 3 5 TDM HEADER R27 R29 0 R42 TP_SDATAI TP8 TP_FSYNC GND C23 33PF R43 53.6 FSYNC GND C31 33PF R44 53.6 BCLK GND TP_BCLK GND GBC03SAAN J11 GBC03SAAN J9 J2 1 2 3 GND IOVDD GND PVDD Rev. A | Page 14 of 19 GND IOVDD 47K R45 R34 2.2K Figure 13. Evaluation Board Amplifier Configuration Section 5V0DD_USB R35 2.2K 1 2 3 GND SCK SDA REGEN ADDR BCLK FSYNC SDATAI IOVDD GND GND GND SSM3515 GBC03SAAN GND J3 SDA SCK ADDR REG_EN SDATAI FSYNC BCLK 2.2UF GND C34 OUTP BSTP BSTN OUTN C35 0.1UF BSTN OUT_N BSTP OUT_P GND C38 C37 GND C36 1UF 0.22UF 0.22UF GND R40 100K GND 1 2 3 4 5 6 7 8 9 10 3MN2510-6002RB SK1 USBI/AARDVARK SDA 5V0DD_USB SCK 2 B2 2 180OHM 0-OHM SHORT 1 AARDVARK/BEAGLE I2C CONNECTOR 1 2 J7 1 180OHM B1 0-OHM SHORT 4 GBC03SAAN 1 2 J4 1 2 3 1 2 3 C42 0.1UF C33 10UF IOVDD C40 1000PF GND C39 1000PF C41 1000PF OUT+ OUT- 1 2 J8 1 GND C2 33PF R41 53.6 0 SDATAI 0 GND TP9 ACTIVE PROBE TEST POINTS HOLE SIZE MUST BE 40 MILS DISTANCE 0.2" OR 0.3" APART PVDD PVDD IOVDD 1 2 VREG VREG TP10 GND 250OHMS 1 VSS 2 L5 H9 OUT– OUT+ UG-580 EVAL-SSM3515Z User Guide 1 3 11691-006 AVSS D2 E1 BCLK E2 BSTP E4 BSTN A4 VREG18 REG_EN FSYNC OUTP A1 VREG IO D1 IOVDD IO D3 OUTP OUT D4 OUTP OUT B3 OUTN OUT B4 OUTN OUT SDATA BCLK OUTN BSTP BSTN AVSS VSS SSM3515 IO IO IO Figure 14. Evaluation Board Device Pinout Rev. A | Page 15 of 19 11691-007 OUT FSYNC SDATAI SCL A3 OUT C2 VREG50 VSS IN REG_EN ADDR E3 IN C1 SDA VSS IN SCK PVDD PVDD IN B1 B2 C4 C3 IN SDA ADDR A2 IN U10 PVDD AVSS IN IO UG-580 IO EVAL-SSM3515Z User Guide EVAL-SSM3515Z User Guide Figure 15. Evaluation Board Top Layer Copper 11691-010 11691-008 UG-580 Figure 16. Evaluation Board Second Layer Copper 11691-011 11691-009 Figure 17. Evaluation Board Third Layer Copper Figure 18. Evaluation Board Bottom Layer Copper Rev. A | Page 16 of 19 UG-580 11691-012 11691-013 EVAL-SSM3515Z User Guide Figure 19. Evaluation Board Top Silkscreen Figure 20. Evaluation Board Bottom Silkscreen Rev. A | Page 17 of 19 UG-580 EVAL-SSM3515Z User Guide ORDERING INFORMATION BILL OF MATERIALS Table 4. Qty 1 5 3 1 11 2 1 1 3 1 1 1 1 1 1 1 Reference Designator C1 C3, C5, C8, C10, C36 C6, C7, C11 C12 C13 to C15, C18, C21, C24 to C29 C16, C17 C19 C2, C23, C31 C20 C33 C34 C35, C42 C37, C38 C4, C9 D1 GND, OUT+, OUT−, PVDD, IODVDD H1, H2 H9, J4, J7, J8, P3, P4, P23 J1 J2, J3, J9, P1, P6, J11 P7, JP1, JP2 M1 P12 P2, P5, SK1 R1 R2 to R6, R8 to R14, R19, R45 R15 to R18, R23, R30 to R32 R20, R22 R21 R24 to R27, R29, R33, R37, R39, R42 R34, R35 R36 R40 R41, R43, R44 R7 S1 S2 U1 U2 U3 U5 3 U6 to U8 2 1 3 1 1 1 2 2 2 1 5 2 7 1 6 3 1 1 3 1 14 8 2 1 9 Description Capacitor, electrolytic, 470 µF, 35 V Capacitor, ceramic, X5R, 0603, 1 µF, 16 V Capacitor, tantalum, 10 µF, 10 V Capacitor, electrolytic, 10 µF, 16 V Capacitor, ceramic, X7R, 0805, 0.1 µF, 50 V Supplier Nichicon Murata AVX United Chemi-Con Murata Part No. UKA1V471MPD1TD GRM188R61C105KA93D TAJA106K010RNJ MV16VC10RMD55TP GRM21BR71H104KA01L Capacitor, ceramic, X7R, 0805, 1000 pF, 250 V Capacitor, ceramic, X7R, 0805, 0.022 µF, 50 V Capacitor, ceramic, NPO, 0603, 33 pF, 50 V Capacitor, ceramic, COG, 0805, 1000 pF, 50 V Capacitor, ceramic, 0805, 10 µF, 16 V Capacitor, ceramic, X7R, 0603, 2.2 µF, 10 V Capacitor, ceramic, X8R, 0603, 0.1 µF, 25 V Capacitor, ceramic, X7R, 0603, 0.22 µF, 50 V Capacitor, ceramic, X7R, 0603, 0.01 µF, 50 V LED, wtr clr, 1210, SMD (red) Connector, PCB, banana jack uninsulated STD (Version 2 footprint) Connector, PCB, berg header double STR male 6P Connector, PCB, header, assy, breakaway st Connector, PCB, jack mt, right angle, yellow Connector, PCB, wire to board, header Connector, PCB, berg jumper st male 2P, 1X M000385 MOD photolink fiber optic receiver Connector, PCB, berg header, st male 12P Connector, PCB, low profile straight thru hole, 2500 series Resistor, precision thick film chip, R0603 Resistor, film, SMD, 0805, 47 kΩ AVX Murata Phycomp (Yageo) Murata Murata Murata TDK Murata Phycomp (Yageo) Lumex Johnson 0805PC103KAT1A GRM216R71H223KA01D CC0603JRNPO9BN330 GRM2165C1H102JA01D GRM21BR61C106KE15L GRM188R71A225KE15D C1608X8R1E104K GCM188R71H224KA64D 2238 586 15636 SML-DSP1210SIC-TR 108-0740-001 SAMTEC Tyco Electronics Connect-Tech Molex FCI Everlight SAMTEC 3M Panasonic Yageo-Phycomp TSW-103-08-G-D 9-146285-0-02 CTP-021-A-S-Y 22-03-2031 69157-102HLF PLR135/T9 TSW-106-08-G-D N2510-6002RB ERJ-3EKF1001V 9C08052A4702FKHFT Resistor, film, SMD, 0603, 33 Ω Multicomp MC 0.063W 0603 1% 33R. Resistor, precision thick film chip, R0805, 10 kΩ Resistor, precision thick film chip, R0805, 750 Ω Resistor, film, SMD, 0603, 0 Ω Panasonic Panasonic Multicomp ERJ-6ENF1002V ERJ-6ENF7500V MC0603WG00000T5E-TC Resistor, precision thick film chip, R0603, 2.2 kΩ Resistor, thick film chip, R0603, 2.2 Ω Resistor, precision thick film chip, R0805, 100 kΩ Resistor, precision thick film chip, R0603, 53.6 Ω Resistor, precision thick film chip, R0805, 3.01 kΩ Switch slide SPDT Switch tact 6 mm gullwing SMD IC, low noise, LDO micropower regulator, 3.3 V IC, linear low noise, LDO micropower regulator, 1.8 V IC, CMOS, 192 kHz, digital audio receiver, CS8416-C22 Crystal, SMD, 12.288 MHz Panasonic Panasonic Panasonic Panasonic Panasonic E-Switch Tyco Electronics Linear Technology Linear Technology Cirrus Logic Abracon IC, 1-bit translator, FXLP34P5X Fairchild ERJ-3EKF2201V ERJ-3RQF2R2V ERJ-6ENF1003V ERJ-3EKF53R6V ERJ-6ENF3011V EG1218 FSM6JSMA LT1761ES5-3.3#PBF LT1761ES5-1.8#PBF CS8416-CZZ ABM3B-12.288MHZ10-1-U-T FXLP34P5X Rev. A | Page 18 of 19 EVAL-SSM3515Z User Guide Qty NF1 NF1 NF1 NF1 2 4 1 Reference Designator C22, C30 R28, R38 L5 C39 to C41 B1, B2 L1 to L4 UG-580 Description Capacitor, ceramic, NP0, R0603 Resistor, high frequency, SMD, chip, 0603 Inductor, common-mode choke, DLW5BTN251SQ2L Capacitor, ceramic, X7R, 0603 Ferrite bead, low noise Ferrite bead, 500 mA, 600 Ω Supplier Phycomp (Yageo) Vishay Murata AVX Murata Steward Part No. 2238 867 15689 FC0603E50R0BST1 DLW5BTN251SQ2L 06032C102JAT2A NFZ2MSM181 HZ0805E601R-00 NF means not fitted. I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. 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