CT1553 Ap Note (3/03)

The Future in Microelectronics
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C I RC UI T TE C HN O L OG Y
APPLICATION NOTE #117
CT1553-1 Error Rate Analysis
APPLICATION NOTE #117
1
Preliminary 3/03
MIL-STD-1553 Data Bus
CT1553-1 Error Rate Analysis
CT3231
Transmitter /
Receiver
ACT15530
Manchester
Manchester
Encoder
Encoder -- Decoder
Decoder
Serial
Data
Transformer
15-1021
(X-1247)
CT1342
12 MHz
Oscillator
Figure 1
System Configuration of Analysis
EQUIVALENT NOISE GAIN:
This is a synopsis of the theory and summary of the
calculations based on an ACT CT1553-1 Remote
Terminal Unit.
Input Noise BW = 1 kHz to 4 MHz (per MIL-STD-1553B)
Filter Noise BW = 2.086 MHz
Noise Gain = Noise Density x Noise Bandwidth
1
- ×
= ----------------------2.086MHz = 1.442 =
2
4MHz
The unit contains:
• Interface transformer
• CT3231 Driver/Receiver Hybrid Microcircuit
• ACT15530 Encoder/Decoder
• 12MHz Crystal Controlled Hybrid Oscillator
• Additional logic to present parallel Receive,
Transmit Data and Subsystem Handshaking
signals
.721 Gain in RMS Value of Noise Voltage through the filter.
1553B RECEIVER PERFORMANCE SPECS
Stub Coupled . . . . . . . . . . . 140mV RMS Gaussian Noise,
1.05 VPK Signal;
No Response < 0. 1V;
Response > 0.43V;
S
Signal = 1.05 = 7.5 : 1
=
N
Noise
.140
Direct Coupled . . . . . . . . . . 200mVrms Gaussian Noise,
1.5 Vpk Signal;
No Response <0.14V;
Response > 0.60V;
S
Signal = 1.5 = 7.5 : 1
=
N
Noise
.2
Spec (MIL STD 1553B)
requires WER = 10-7
The object of the analysis is to calculate error rates
that can be expected from this module design.
The analysis takes into consideration the actual filter
in the CT3231, the various possible threshold settings
that could be used as well as the algorithm of the
ACT15530. It assumes that the transformer has the
bandwidth, and proper inductance not to introduce any
major errors.
ACT15530 SAMPLING – GENERAL
EFFECT OF CT3231 FILTER:
The ACT15530 samples the signals that have been
quantized by the two threshold comparators in the
CT3231 hybrid receiver section.
Type — 3-Pole Butterworth
Cutoff Frequency (3db point) — 2MHz
Equivalent Noise Bandwidth — for a 3-Pole Butterworth,
the noise bandwidth is
1.043 x fc. For the CT3231,
NBW = 1.043 x 2 MHz = 2.086
APPLICATION NOTE #117
Sampling of 1MHz bi-phase data with a higher
frequency clock (12MHz) results in two cases to be
analyzed for Bit-error contribution.
2
Preliminary 3/03
CASE A. The receiver can miss a half bit if the
amplitude of the noise during sample times reduces the
resultant signal to a value below the threshold settings.
bit calculation is performed. Some subtleties on this
point are introduced later which considers data
patterns.
CASE B. Noise occurring near the signal zero
crossover intervals can result in an effective widening of
the signal half bit giving rise to a condition termed as
"extra half bit." If the widening can add enough pulse
width, the sampling circuits will interpret the quantized
signal as two half bits instead of one.
True error is then the average over all phase
relationships of the two clocks since the BER is
measured over time periods far in excess of any single
phase relationship. True error rate is the average of all
pattern sequences since the data patterns are
generated in a random matter.
Both conditions must be considered to arrive at an
optimum setting of the threshold comparators.
For narrow band filter systems-noise is bandlimited to
the filter bandwidth-there is a relationship between
successive samples as they are not independent
(correlation)-noise signal moves from sample to sample
with less freedom than in pure independent statistical
sense, relationship is defined by correlation coefficient
derived from impulse response of the filter. Correlation
analysis results in a slightly more pessimistic prediction
of BER.
Example: If the threshold settings are low, missed
bits become unlikely, but the probability of extra half bits
increases. Higher threshold settings decrease the
probability of extra half bits but increases the probability
of missing a half bit.
Curves of the two functions have been generated and
the threshold set at the point which produces the best
combined performances.
Detailed BER / WER Computations
ACT15530 Sampling Algorithm
Vn (RMS)
(Half Bit Detection)
P2
Requires a sample positive (>pos. thresh.) and the
next two samples non-negative (not below negative
threshold) for a positive half bit success. If either the
second or third sample is negative (<neg. thresh.) then
the positive sample is erased and logic searches for
another positive sample set or a negative half bit by
looking for the next 2 consecutive samples.
P
O
O
1
O
O
O
O
O
O
+Vth
0V
Phase I
Phase II
O
O
O
N
O
O
O
S0
S1
S0
S2
S4
S3
S1
S2
S3
S5
S4
S6
S5
–Vth
Figure 3
(Specific Sampling Points)
P1, P2, P3 are sample points
S1, S2, S3 are sample times
Vn = RMS value of noise
(+ Positive threshold)
2
1
X
P3
P1
S/N ratio must be computed for each sample point
or it is the value of noise required to
i
O
O
S/N = P1 – (+Vth) drive the signal below the Positive
Threshold. (For a 1st positive sample)
Vn
(- Negative threshold)
i+1 i+2
Half Bit
P1 – (–Vth)
Vn
Figure 2
is the value of noise required to drive a
positive signal below the negative
threshold.
Sample Points for a Successful Positive Half Bit
Probability of a good half bit
7
PS
Bit ⁄ 2
≡ ∑ PS
Vth
i
–Vth
i=1
PS
i
Vrms
1σ
Si
Vrms
1σ
Figure 4
= ( P i • P i + 1 • P i + 2 )3 + ( P i • X i + 1 • X i + 2 ) 1 + ( P i • P i + 1 • X i + 2 )2 =
Displayed against the normal curve, it takes N1σ or
N1. Vrms noise voltage to cause a nonpositive sample
or 1st sample miss. (Used in 1st sample point
calculation). N2σ is the value of noise required to drive
the positive signal below the negative threshold. (Used
for 2nd and 3rd sample point calculations).
Prob. of Sucess.
Probability then must be calculated for all sample
points for a half bit and then take the set of sample
points over all phases of the sampling clocks with
respect to the signal waveform. Since the probability of
a good bit requires two half bit detections a second half
APPLICATION NOTE #117
N1σ
N2σ
3
Preliminary 3/03
Useful Tables
For Missed Bit Computations
Since the samples close to the zero crossing have
low probability of being good, it is sufficient to analyze
only the samples occurring near the high amplitude
section of the signal.
Phase I
Vth
A reasonable estimate can be achieved by
investigating several phases and selecting the most
significant phases of maximum distance and averaging
the two.
100
130
160
190
N4
N4
N4
N4
P2
P2
P2
P2
N3
N3
N3
N3
N4
N4
N4
N4



∴
N3
N3
N3
N3
Sample Points



PSUCCESS
P2
P2
P2
P2
S/N 1 (100mV)
3.94
6.49
7.50
6.49
3.94
S/N2 (140mV)
5.51
9.09
10.05
9.09
5.51
S/N 2 (100mV)
0.714
0.928
1.143
1.36
S/N1 (140mV)
1
1.3
1.6
1.9
S/N 1 (100mV)
S0
1.94
2.71
S1
5.30
7.42
S2
7.24
10.14
S3
7.24
10.14
S4
5.3
7.42
S5
1.94
2.71
S6
*All voltages and calculations are referred to the Stub
coupled mode of operation. For direct coupled equivalents,
multiply all voltages by 1.40.
Examination of three sample points S2, S3 and S4
for being positive, non-negative (Refer to Figure 3).
S4
S/N1 (140mV)
Phase II
Two computations are performed-missed bit and
extra half bit. Calculations are performed for various
values of threshold voltages and for a receiver with no
filter and filter (discussed previously).
S3
With Filter
S0
S1
S2
S3
S4
S5
S6
Since the sampling times are transitions of the local
oscillator they are asynchronous times with respect to
the incoming signal. Therefore, the sampling must be
averaged over all possible phases of the two
frequencies (incoming signal and local oscillator).
S2
Without Filter
All sample cases that result in
misses, can be expressed as
Pmiss1= P2 (N3N4+N3N4
+N3N4+N3N4) = P2 (1)
Sample Calculation
Phase I
S/N1
S/N2 (190 mV)
Pmiss2= P2 (N3N4+N3N4
+N3N4) ≈ = N3+N4
Pmiss
PS2
9.09
-1.90
7.19
NS3
10.05
+1.90
11.95
NS4
9.09
+1.90
10.99
(0.3 x 10-12)
(0)
(0)
(From Table of Nσ Normal Distribution Curve)
Pmiss = P2+N3+N4
This says that the probability of a miss is controlled by S2 = P2 which
means the 1st sample below the positive threshold, or one of the
next two samples being negative (below negative threshold).
PS3
10.05
-1.90
8.15
NS4
9.09
+1.90
10.99
NS5
5.51
+1.90
7.41
(0)
(0)
(0.68 x 10-13)
PS2
10.14
-1.90
8.24
NS3
10.14
+1.90
12.04
NS4
7.42
+1.90
9.32
(0.12 x 10-15)
(0)
(0)
P = Probability of S below positive threshold
N = Probability of S above negative threshold
It can be readily seen by examination of Figure 3, those sample
points that limit error rate performance. A similar type analysis is
performed for extra half bit conditions and is just stated here with the
results presented in tabular form along with missed bit calculations.
Phase II
Calculations (Based on Sinusoidal Waveform)
*Voltage
(Phase I)
S0
S1
S2
S3
S4
S5
S6
0
0.551
0.909
1.05
0.909
0.551
0
*Voltage
(Phase II)
0.271
0.742
1.014
1.014
0.742
0.271
Avg 1/2 BER



Sample
3.0 x 10-13
Most significant
.68 x 10-13
.0012 x 10-13
3.68 x 10-13
1.84 x 10-13 = 1/2 BER
VS ± Vth = S / N (effective)
VN
VS ± VTH = S / N1 ± S / N2
VN VN
APPLICATION NOTE #117
Average number of times this 1/2 Bit Waveform appears is
once per Bit. Average number of times this 1/2 BIT
Waveform appears per word = 17 times.
WER =17 x 1.84 x 10-13 = 3.128 x 10-12 = 0.3 x 10-11
4
Preliminary 3/03
Summary of Calculations (Missed Bit) WER vs Vth
100 mV Vn (Filtered)
0.3 x 10-12
x 10-15
Vth = 190mV BER/2 . . .
0.12
Avg WER . . . . . . . . . 0.3 x 10-11
Vth = 160mV
Vth = 130mV
Vth = 100mV
0.319
x 10-13
0.3 x 10-14
0.274 x 10-15
0.68
0.44 x 10-11
x 10-16
0.22
0.34 x 10-9
0.52 x 10-11
0.4 x 10-10
140 mV Vn (Unfiltered)
Vth = 190mV
0.169 x 10-6
Vth = 160mV
0.58 x 10-7
Vth = 130mV
0.189 x 10-7
Vth = 100mV
0.33 x 10-8
0.18 x 10-8
0.5 x 10-6
0.53 x 10-9
0.49 x 10-6
0.28 x 10-9
0.16 x 10-6
x 10-9
0.53
0.3 x 10-7
0.57
Vth
No Filter
Vn = 140mV
2MHz Filter
Vn = 100mV
190
0.5 x 10-6
0.3 x 10-11
160
0.49 x 10-6
0.55 x 10-11
130
0.16
x 10-6
0.44 x 10-11
100
0.3 x 10-7
x 10-13
0.95 x 10-7
0.62 x 10-12
0.55 x 10-11
0.16 x 10-17
Summary (Missed Bit)
x 10-7
0.34 x 10-9
Summary (Extra Half Bit)
190
160
0.2 x 10-6
0.8 x 10-7
0.16 x 10-12
0.5 x 10-14
130
0.4 x 10-7
0.6 x 10-11
100
0.4 x 10-7
0.32 x 10-13
Summary – Total WER
(Average of Missed Bit and extra Half Bit)
0.17 x 10-6
190
0.35 x 10-6
0.15 x 10-11
x 10-6
160
130
0.28 x 10-6
0.1 x 10-6
0.27 x 10-11
0.5 x 10-11
100
0.35 x 10-7
0.17 x 10-9
0.48
0.21 x 10-5
As the threshold level increases above 190mV
the WER starts to decrease rapidly. Since the
threshold voltage will drift a maximum of ±40mV
over the temperature extremes of the CT3231, an
initial setting point must be selected so that over
temperature the unit will not go below 100mV * or
go much above 190mV. Aeroflex sets the
threshold at approximately 160mV nominal.
* To meet no response below 0.1 Volt.
APPLICATION NOTE #117
5
Preliminary 3/03
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