Product Specification PE4210 SPDT UltraCMOS™ RF Switch DC - 3000 MHz Product Description The PE4210 UltraCMOS™ RF Switch is designed to cover a broad range of applications from near DC to 3000 MHz. This single-supply switch integrates on-board CMOS control logic driven by a simple, single-pin CMOS or TTL compatible control input. Using a nominal +3-volt power supply, a typical input 1 dB compression point of +14 dBm can be achieved. The PE4210 also exhibits input-output isolation of better than 35 dB at 1000 MHz and is offered in a small 8-lead MSOP package. Features • Single 3-volt power supply • Low Insertion loss: 0.30 dB at 1000 MHz, 0.45 dB at 2000 MHz • High isolation of 35 dB at 1000 MHz, 25 dB at 2000 MHz • Typical input 1 dB compression point of +14.5 dBm • Single-pin CMOS or TTL logic control The PE4210 UltraCMOS™ RF Switch is manufactured in Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. • Packaged in a small 8-lead MSOP Figure 1. Functional Diagram Figure 2. Package Type 8-lead MSOP RFC RF1 RF2 CMOS Control Driver CTRL Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω) Parameter Conditions Operating Frequency1 Minimum Typical DC 0.30 0.45 Maximum Units 3000 MHz 0.40 0.60 dB dB Insertion Loss 1000 MHz 2000 MHz Isolation – RFC to RF1/RF2 1000 MHz 2000 MHz 34.5 24.5 35.5 25 dB dB Isolation – RF1 to RF2 1000 MHz 2000 MHz 36.5 25.5 37.5 26.5 dB dB Return Loss 1000 MHz 2000 MHz 22.5 15 24.5 16 dB dB ‘ON’ Switching Time CTRL to 0.1 dB final value, 2 GHz 200 ns ‘OFF’ Switching Time CTRL to 25 dB isolation, 2 GHz 90 ns 2.5 mVpp 2 Video Feedthrough Input 1 dB Compression 2000 MHz 13 14.5 dBm Input IP3 2000 MHz, 5 dBm 30 33.5 dBm Notes: 1. Device linearity will begin to degrade below 10 MHz. 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. Document No. 70-0037-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 PE4210 Product Specification Figure 3. Pin Configuration (Top View) 1 VDD 8 Table 4. Absolute Maximum Ratings Symbol RF1 VDD CTRL 2 7 VI GND 4210 GND 3 TST 6 GND TOP RFC 4 5 RF2 PIN VESD Table 2. Pin Descriptions Pin No. Pin Name 1 VDD 2 CTRL Description Nominal 3 V supply connection. A bypass capacitor (100 pF) to the ground plane should be placed as close as possible to the pin CMOS or TTL logic level: High = RFC to RF1 signal path 4 RFC Low = RFC to RF2 signal path Ground connection. Traces should be physically short and connected to ground plane for best performance. Common RF port for switch (Note 1) 5 RF2 RF2 port (Note 1) 6 GND 7 GND Ground connection. Traces should be physically short and connected to ground plane for best performance. Ground connection. Traces should be physically short and connected to ground plane for best performance. 8 RF1 3 GND RF1 port (Note 1) Note 1: All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Parameter/Conditions Parameter Min Typ Max Units VDD Power Supply Voltage IDD Power Supply Current 2.7 3.0 3.3 V -0.3 4.0 V Voltage on any input -0.3 VDD + 0.3 V -65 150 °C -40 85 °C 18 dBm Storage temperature range Operating temperature range Input power (50 Ω) ESD Voltage (Human Body Model) 200 V Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating in Table 4. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOS™ devices are immune to latch-up. Signal Path CTRL = CMOS or TTL High RFC to RF1 CTRL = CMOS or TTL Low RFC to RF2 Control Logic 250 (VDD = 3V, VCNTL = 3) 500 0.7x VDD nA V 0.3x VDD ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 7 Units Table 5. Control Logic Truth Table Table 3. DC Electrical Specifications Control Voltage Low Max Power Supply Voltage Control Voltage Control Voltage High Min V The control logic input pin (CTRL) is typically driven by a 3-volt CMOS logic level signal, and has a threshold of 50% of VDD. For flexibility to support systems that have 5-volt control logic drivers, the control logic input has been designed to handle a 5-volt logic HIGH signal. (A minimal current will be sourced out of the VDD pin when the control logic input voltage level exceeds VDD.) Document No. 70-0037-05 │ UltraCMOS™ RFIC Solutions PE4210 Product Specification Evaluation Kit The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4210 SPDT switch. The RF common port is connected through a 50 Ω transmission line to the top left SMA connector, J1. Port 1 and Port 2 are connected through 50 Ω transmission lines to the top two SMA connectors on the right side of the board, J3 and J4. A through transmission line connects SMA connectors J6 and J8. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. Figure 4. Evaluation Board Layout Peregrine specification 101/0037 The board is constructed of a two metal layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide model with a trace width of 0.030”, trace gaps of 0.007”, dielectric thickness of 0.028”, metal thickness of 0.0014” and εr of 4.4. Note that the predominate mode for these transmission lines is coplanar waveguide with a ground plane. J2 provides a means for controlling DC and digital inputs to the device. Starting from the lower left pin, the second pin to the right (J2-3) is connected to the device CTRL input. The fourth pin to the right (J2-7) is connected to the device VDD input. A decoupling capacitor (100 pF) is provided on both CTRL and VDD traces. It is the responsibility of the customer to determine proper supply decoupling for their design application. Removing these components from the evaluation board has not been shown to degrade RF performance. Figure 5. Evaluation Board Schematic Peregrine specification 102/0035 Document No. 70-0037-05 │ www.psemi.com ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 7 PE4210 Product Specification Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted) Figure 7. Input 1 dB Compression Point & IIP3 Figure 6. Insertion Loss – RFC to RF1 0 IIP3 -40 C -40 C 40 40 -0.25 IIP3 (dBm) Insertion Loss (dB) 30 85 C -0.75 30 85 C 20 20 -1 1dB Compression 25 C 10 -1.5 0 500 1000 1500 2000 2500 0 500 3000 10 -40 C -1.25 1000 1500 Frequency (MHz) 1 dB Compression Point (dBm) 25 C 25 C -0.5 0 2500 2000 Frequency (MHz) Figure 9. Isolation – RFC to RF1 Figure 8. Insertion Loss – RFC to RF2 T = 25 °C 0 0 -40 C -20 25 C -0.5 85 C Isolation (dB) Insertion Loss (dB) -0.25 -0.75 -40 -60 -1 -80 -1.25 -1.5 -100 0 500 1000 1500 2000 2500 Frequency (MHz) ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 7 3000 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Document No. 70-0037-05 │ UltraCMOS™ RFIC Solutions PE4210 Product Specification Typical Performance Data @ 25 °C Figure 10. Isolation – RFC to RF2 Figure 11. Isolation – RF1 to RF2, RF2 to RF1 0 0 -20 -20 -40 Isolation (dB) Isolation (dB) RF2 -60 -40 -60 RF1 -80 -80 -100 -100 0 500 1000 1500 2000 2500 3000 0 500 Frequency (MHz) 1500 2000 2500 3000 2500 3000 Frequency (MHz) Figure 12. Return Loss – RFC to RF1, RF2 Figure 13. Return Loss – RF1, RF2 0 0 -10 -10 Return Loss (dB) Return Loss (dB) 1000 -20 -30 RF2 -20 RF1 -30 -40 -40 0 500 1000 1500 2000 Frequency (MHz) Document No. 70-0037-05 │ www.psemi.com 2500 3000 0 500 1000 1500 2000 Frequency (MHz) ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 7 PE4210 Product Specification Figure 14. Package Drawing 8-lead MSOP TOP VIEW 0.65BSC .525BSC 7 8 6 5 2.45±0.10 2X 3.00±0.10 0.51±0.13 -B- 0.51±0.13 1 2 3 4 .25 A B C -C- 2.95±0.10 0.86±0.08 2.95±0.10 1.10 MAX -A0.10 +0.07 0.33 -0.08 A 0.08 3.00±0.10 0.10±0.05 4.90±0.15 A B C 3.00±0.10 FRONT VIEW SIDE VIEW Table 6. Ordering Information Order Code Part Marking Description Package Shipping Method 4210-21 4210 PE4210-08MSOP-50A 8-lead MSOP 50 units / Tube 4210-22 4210 PE4210-08MSOP-2000C 8-lead MSOP 2000 units / T&R 4210-00 PE4210-EK PE4210-08MSOP-EK Evaluation Kit 1 / Box 4210-51 4210 PE4210G-08MSOP-50A Green 8-lead MSOP 50 units / Tube 4210-52 4210 PE4210G-08MSOP-2000C Green 8-lead MSOP 2000 units / T&R ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 7 Document No. 70-0037-05 │ UltraCMOS™ RFIC Solutions PE4210 Product Specification Sales Offices The Americas North Asia Pacific Peregrine Semiconductor Corp. Peregrine Semiconductor K.K. 9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Commercial Products: Bâtiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and Defense Products: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 South Asia Pacific Peregrine Semiconductor 28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0037-05 │ www.psemi.com The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp. ©2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 7