Digital-to-Analog Converter ICs Solutions Bulletin, Volume 10, Issue 1

YOUR SEMICONDUCTOR SOLUTIONS RESOURCE
Volume 10, Issue 1
DIGITAL-TO-ANALOG
CONVERTER ICs
Contents
Current Output DACs Provide Unmatched
Combination of Speed and Accuracy . . 1
Precision DACs Offer Up to 60 V
Output Range . . . . . . . . . . . . . . . . . . . . 2
ADI Provides High Quality Clocking
Signals for High Speed DAC
Applications . . . . . . . . . . . . . . . . . . . . . 3
DDS-Based QDUC Modulator IC
Eliminates Imbalance Errors . . . . . . . . . 4
Improve Power Efficiency in Noise
Sensitive, High Speed Data Converter
Applications . . . . . . . . . . . . . . . . . . . . . 5
Tested Circuits from the Lab Design
Resource . . . . . . . . . . . . . . . . . . . . . . . 5
Precision 16-Bit DAC Significantly
Improves Quality of Test and
Measurement Equipment . . . . . . . . . . . 6
Transmit DAC with Expanded Processing
Functionality Eases Digital Interface
Task . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Digital Variable Resistors Save Space
in Tiny 3 mm × 3 mm LFCSP (SON)
Package . . . . . . . . . . . . . . . . . . . . . . . . 8
When Time Domain Performance Is Critical, Current Output
DACs Provide an Unmatched Combination of Speed, Accuracy,
Low Power, and Integration
In arbitrary waveform generation, instrumentation, and medical applications where positioning an
analog signal to an exact value within the shortest interval is critical, the demand is for integrating
more channels and functionality in the same board space. To achieve this higher level of integration
and smaller package sizes, high speed current output DACs are tasked with not only delivering
high accuracy and fast settling time specifications but also providing more functionality on
lower power consumption.
Solution To achieve fast digital-to-analog conversion, current output DACs are the solution of choice for
mixed-signal board designers. This DAC architecture minimizes the output resistance, allowing
faster settling time. Led by communications requirements, current DACs have achieved the required
high update rates without compromising static accuracy.
The AD9726 is a true 16-bit
accurate current output DAC
with a maximum update rate
of 400 MSPS, combining a
single or double data rate LVDS
data interface with a factory
calibrated 20 mA differential
current output for improved
INL and DNL performance.
The AD9726 operates from
2.5 V and 3.3 V power supplies.
AD9726 DAC Output Rise TIme
90.0%
Rise Time = 484.6ps
10.0%
VERTICAL = 40mV/DIV
HORIZONTAL = 2.0ns/DIV
R L = 25
The dual AD9117 features
two 14-bit accurate current
output DACs operating up
to 125 MSPS update rate, integrating a double data rate CMOS digital interface with internally
calibrated 20 mA differential current outputs. The AD9117 can operate with supplies between
1.8 V and 3.3 V.
Maximum
Power
Settling Rise/
Part
Resolution
Update Rate Consumption Time Fall Time
Number
(Bits)
(MSPS)
(mW)
(ns)
(ps)
Visit our new website for
data sheets, samples,
and additional
resources.
www.analog.com/V10DACs
AD9726
16
400
575
10.5
500
AD9117
14
125
220
11.5
270
Package
Price
($U.S.)
80-lead,
35.37
14 mm × 14 mm
40-lead,
9.50
6 mm × 6 mm
Precision DACs Offer Up to 60 V Output Range
Designers of high voltage systems typically utilize low voltage DACs coupled with a discrete amplifier solution to attain the high
voltage output drive capability required in applications such as high voltage test equipment, programmable voltage/current sources,
precision HV biasing, and receiver bias in optical communications. This approach involves multiple elements: time spent for layout
and interface considerations, additional component count, added costs, and increased power consumption.
Solution ADI’s newest family of high voltage DACs addresses these
concerns with the introduction of the AD5501 (single) and
AD5504 (quad) devices, which integrate a 12-bit DAC, an
on-chip high voltage output amplifier, and a precision reference.
In addition, a temperature sensor with alarm function and power
saving features are also incorporated on chip. The AD5501/
AD5504 provide a pin-selectable 0 V to 30 V or 0 V to 60 V
output range, and the on-chip output amplifiers allow an output
swing within the range of AGND of +0.5 V and VDD of –0.5 V. The
low power, high speed serial interface with readback capability
can handle clock speeds up to 30 MHz. The AD5501/AD5504
operate over a wide temperature range of −40°C to +105°C
and are available in a 16-lead TSSOP package.
VDD
VLOGIC
1713k
REF (+)
12-BIT
DAC
SYNC
SDO
OUTPUT
BUFFER
POWER-DOWN
CONTROL LOGIC
SCLK
SDI
VFB
122.36k
DAC
REGISTER
VOUT
RESISTOR
NETWORK
INPUT
CONTROL
LOGIC
TEMPERATURE
SENSOR
ALARM
CLR
AD550x Features
AD5501
PRECISION
REFERENCE
POWER-ON
RESET
R_SEL
DGND
AGND
Applications
•Resolution: 12-bits
• HV test equipment
•Output range: 30 V, 40 V, or 60 V
• Programmable voltage
and current sources
•Integrated precision reference
• Precision HV biasing
• Receiver bias in optical
communications
• Transducer, servo,
HV LED drivers
• Avalanche photodiodes
• HV regulators
• Piezoelectric cells
•SPI interface with readback
Number of
Channels
Resolution
(Bits)
INL
(LSB)
Max
Outputs (V)
Temperature
Range (°C)
Package
Price
($U.S.)
AD5501
1
12
1
30, 60
–40 to +105
16-lead TSSOP
4.58
AD5504
4
12
1
30, 60
–40 to +105
16-lead TSSOP
8.12
Part Number
Webinar Series
Understanding Sampled Data Systems at
www.analog.com/webinars.
Circuit Design Shortcut
Complementary components for AD5501/AD5504
high voltage output DACs:
• ADSP-BF531 DSP
• ADCLK846 clock buffer for low clock jitter
2
For data sheets, samples, and additional resources, visit www.analog.com/V10DACs
ADI Provides High Quality Clocking Signals for High Speed DAC Applications
The clock signals provided to high speed, high performance DACs
are often one of the primary limiting factors for the performance
achieved by that DAC. In order to achieve their rated performance
specifications, high speed data converters require a fast rising,
low jitter sampling clock. In large complex systems where there
are many digital chips requiring clock signals as a reference, it
can be a significant challenge to maintain a good low noise/low
jitter clock signal throughout the entirety of the clock tree.
Functional Block Diagram
LVPECL
ADCLK954
Q0
Q0
Q1
Q1
Solution Analog Devices has developed a broad portfolio of clock buffers
that have been designed to help designers solve this clock
integrity challenge. With a clock buffer inserted between the
converter and the system clock tree, jitter figures on the order of
75 fs for LVPECL fanout buffers and extremely low skew on the
order of 9 ps (picoseconds) can be obtained. These buffer ICs
also provide up to 12 channels of low jitter clock fanout.
The ideal clock signal for a data converter features not only
low phase noise/jitter but also very sharp rise and fall edges.
As clocking speeds continue to increase, the challenge to achieve
a high quality square wave clock signal grows along with that
speed. When a very sharp edge for just one or two DACs is
needed, the ADCLK905, ADCLK907, ADCLK914, and ADCLK925
clock buffers can provide very fast edges with extremely little
impact on the noise of the clock signal when located in close
proximity to the converter.
Per the table below, ADI has a portfolio of low jitter clock
buffer products ranging from one to 24 outputs and various
logic families.
Q2
Q2
VREF0
Q3
REFERENCE
Q3
Q4
VT0
Q4
CLK0
CLK0
Q5
VT1
Q5
CLK1
Q6
CLK1
Q6
Q7
IN_SEL
VREF1
Q7
Q8
REFERENCE
Q8
Q9
Q9
Circuit Design Shortcut
Q10
Q10
Complementary components for clock buffers:
Q11
• AD9549 clock generator for system clock
Q11
• AD9789 14-bit, 2.4 GSPS transmit DAC
• AD9268 dual channel, 16-bit, 125 MSPS Rx ADC
Part Number
ADCLK905
ADCLK907
ADCLK925
ADCLK914
ADCLK846
ADCLK854
ADCLK946
ADCLK954
ADCLK948
ADCLK950
Number of References
Number of Outputs
Maximum Output (MHz)
Jitter (ps)
Price ($U.S.)
1
2
1
1
1
2
1
2
2
2
1 ECL
2 ECL
2 ECL
1 HVDS
6 LVDS/12 CMOS
12 LVDS/24 CMOS
6 LVPECL
12 LVPECL
8 LVPECL
10 LVPECL
7500
7500
7500
7500
1200/250
1200/250
4800
4800
4800
4800
0.06
0.06
0.06
0.11
0.1
0.1
0.075
0.075
0.075
0.075
5.60
6.75
5.95
6.95
4.75
5.95
6.25
6.95
6.50
6.58
For data sheets, samples, and additional resources, visit www.analog.com/V10DACs
3
2.4 GSPS, DDS-Based QDUC Modulator IC Eliminates Imbalance Errors Common to
Dual DAC Transmit Paths in Wireless Transmit Infrastructure Applications
Dual DAC direct-conversion schemes are a common approach to upconversion in base station and point-to-point microwave
transmit signal chains. However, this approach can introduce quadrature phase and amplitude imbalance issues into the signal
chain as a result of mismatching in the separate I and Q DAC functions.
Solution AD9789 QDUC Application in Transmit Path
FDATA = 150MHz (MAX)
While this device contains additional DSP
processing to support four DOCSIS channels
for CMTS applications, it also features a
single-carrier, wideband mode of operation that
Applications
supports signal reconstruction bandwidths up
• Broadband communications systems
to 100 MHz (1 dB BW @ 2.4 GSPS). Due to the
• CMTS/DVB
AD9789’s single DAC QDUC architecture, the
anomalies such as I/Q phase and amplitude imbalance issues are avoided.
×16
RFDAC
CLOCK DIVIDER/
DISTRIBUTION
I
Q
I/Q 16-BIT
INTERFACE
ADDITIONAL RF
UPCONVERSION/
PROCESSING
INTERPOLATION/
TUNABLE BPF
2N INTERPOLATION
1 TO 32×
AD9789 QDUC
IF/RF
DC TO 2.8GHz
1 TO 2× FRAC
RESAMPLER
DDS-based quadrature modulators are an
effective solution in these architectures
because they utilize a single DAC function
and inherently avoid the imbalance problems
noted above. ADI’s AD9789 quadrature digital
upconverter (QDUC) integrates a high speed
2.4 GSPS DDS core, a high performance 14-bit
DAC, digital filters, and other DSP functions
onto a single chip.
FPGA
FCLK =
2.4GHz (MAX)
ADF4350
PLL/VCO
Pricing
• Cellular infrastructure
AD9789
$53.10
• Point-to-point wireless
The AD9789 also features a patented mix-mode super-Nyquist function that allows signal reconstruction in the second and third
Nyquist zone, hence enabling IF/RF frequencies up to 2.8 GHz when clocked at 2.4 GSPS. The AD9789 supports either a 16-bit I/Q
interleaved LVDS or dual port CMOS data interface with its digital interpolation filters configurable for 16× to 512× interpolation.
The QAM encoder supports constellation sizes of 16, 32, 64, 128, and 256 with SRRC filter coefficients for all standards. Power
consumption of 1.25 W @ 2.4 GSPS is achievable with only 16× interpolation. The device is available in a 164-ball CSP-BGA package.
The DDS-based modulation approach provides excellent dynamic performance and modulation accuracy while reducing cost, power,
and board space—all important considerations in wireless communication systems.
AD9789 Features
•Excellent IF/RF dynamic range
• Two-tone IMD: 74 dBc @ 316 MHz; 66 dBc @ 850 MHz
• NSD: –166.5 dBm/Hz @ 316 MHz (POUT = –15.5 dBm)
Webinar Series
Understanding Sampled Data Systems at
www.analog.com/webinars.
• NSD: –166.5 dBm/Hz @ 850 MHz (POUT = –18.5 dBm)
• 1st adj. single-carrier W-CDMA ACLR @ 2.1 GHz:
–68 dBc
• 2nd adj. single-carrier W-CDMA ACLR @ 2.1 GHz:
–70.4 dBc
• 3rd adj. single-carrier W-CDMA ACLR @ 2.1 GHz:
–72.7 dBc
Circuit Design Shortcut
Complementary components for AD9789 QDUCs:
• AD9549 clock generator for system clock
• ADCLK914 high speed clock buffer for jitter
reduction and fanout
•On-chip and bypassable: 4 QAM encoders with SRRC filters,
16× to 512× interpolation, rate converters and modulators
•Flexible data interface: 4-, 8-, 16-, or 32-bits wide with parity
•Direct-to-RF synthesis support with f S mix-mode
•Built-in, self test (BIST) supports input connectivity check,
internal random data generator
4
For data sheets, samples, and additional resources, visit www.analog.com/V10DACs
Improve Power Efficiency in Noise Sensitive, High Speed Data Converter Applications
by Using Switching Power Supplies
Linear LDOs do provide great noise performance for sensitive high speed converter designs, but power efficiency suffers—as much as
70% of the total power efficiency in a multiconverter system can be lost in the supply section. Switching dc-to-dc converters achieve
high efficiencies but previously weren’t adequate because they typically exhibited high noise levels, which translated to ADC spurs
and SNR degradation.
Solution ADI’s new generation of lower noise dc-to-dc converters, such as the ADP2114 dual output switching power supply, have forever
changed the picture. In the application study below, using the AD9268, 16-bit, 125 MSPS ADC, the ADP2114 provides the power
for the converter’s 1.8 V AVDD and DRVDD rails. As can be seen in the chart, changing to this switching supply increases the
application’s overall efficiency from 50% with the LDO, up to 85% with the switching supply. There was practically no degradation in
ac performance between the two power sources. In this single converter case, the 35% improvement in efficiency results in a power
savings of 640 mW. Whether in a high speed DAC or ADC application, this dramatic power savings translates into a greener system
with many related cost savings.
AD9268 ADC Case Study
(FS = 125 MSPS)
Linear Voltage Regulator Supplies
ADP2114 Switching Voltage
Regulator Supplies
Input voltage/current
3.6 V/0.433 mA (1.5588 W)
3.6 V/0.255 mA (0.918 W)
Output voltage/current
1.8 V/0.433 mA (0.7794 W)
1.8 V/0.433 mA (0.7794 W)
Overall efficiency
AC performance with 70 MHz AIN
50%
85%
SNR = 78.5/SFDR (dBc) = 91.0
SNR = 78.4/SFDR (dBc) = 90.8
Webinar Series
Designing with Switching Regulators in High Speed
ADC Applications at www.analog.com/webinars.
Tested Circuits from the Lab Design Resource Provides
Faster Time to Market and Lowers Risks
Analog Devices’ Circuits from the Lab™ is a new design assistance resource that provides design
engineers with tested circuit solutions for many common applications. Each circuit has been built
and tested in the lab and can be easily integrated into designs, resulting in reduced design risk and
faster time to market.
Featured Circuits from the Lab
CN-0021 Circuit Note, Interfacing the ADL5375 I/Q Modulator to the AD9779A Dual Channel, 1 GSPS High Speed DAC
The ADL5375 and the AD9779A are well matched devices because they have the
same bias levels and similarly high signal-to-noise ratios (SNR). The matched bias
levels of 500 mV allow for a “glueless” interface—there is no requirement for a
level shifting network that would add noise and insertion loss along with extra
components.
Access this complete circuit note at www.analog.com/CN-0021.
CN-0009 Circuit Note, 4 mA to 20 mA Process Control Loop Using the AD5662 DAC
This circuit provides a low power current transmitter with 16-bit resolution and
monotonicity, which is powered directly from the 4 mA to 20 mA control loop
power supply and consumes less than 4 mA.
Access this complete circuit note at www.analog.com/CN-0009.
For data sheets, samples, and additional resources, visit www.analog.com/V10DACs
5
New Precision 16-Bit DAC Significantly Improves Quality and Repeatability of Sensitive
Test and Measurement Equipment
In a host of ATE and high end instrumentation applications, product developers and system architects require solutions to the growing
demand for precise and repeatable electrical test and materials characterization systems, while simultaneously reducing system test costs.
Solution Analog Devices, leveraging its leadership position in data converter technology, delivers the AD5541A family of single channel high
performance DACs. These products provide the fundamental building block required in precision source applications by delivering
full 16-bit resolution and accuracy, low noise performance (10 nV/√Hz), low drift (0.05 ppm/°C), and low glitch impulse (0.5 nV/sec)
coupled with fast DAC refresh rates (1 μs).
Enabled by ADI’s proprietary iCMOS® industrial manufacturing process technology, the AD5541A family operates from single supply
voltages of 2.7 V to 5.5 V. The output can be configured for a unipolar or bipolar range using the integrated internal feedback resistor
and can be asynchronously set to zero-/midscale using the CLEAR pin during power-up/down or system fault conditions. A VLOGIC pin
provides increased interface flexibility and allows connections to 1.8 V to 5.5 V logic interfaces, as well as an LDAC pin, which allows
synchronous DAC update in multichannel systems. The flexible
VDD
serial interface is SPI-, QSPI-, and MICROWIRE-compatible.
10
The AD5512A is a pin-compatible, 12-bit device.
RFB
AD5542A-1
All devices in the AD5541A family are specified over the
extended industrial temperature range –40°C to +125°C.
Devices are housed in 3 mm × 3 mm LFCSP, MSOP, and
TSSOP packaging.
AD5541A Features
•16-bit resolution and accuracy
•Low noise: 10 nv/√Hz
•Low glitch: 0.5 nV/sec
8 RFB
RINV
7
VREF
1
16-BIT DAC
16-BIT DAC LATCH
CS
2
CLR
5
SCLK
3
DIN
4
6 VOUT
CONTROL
LOGIC
SERIAL INPUT REGISTER
9
•Low drift: 0.05 ppm/°C
GND
•Configuration: bipolar or unipolar
Applications
•Functionality: CLEAR and LDAC
• Automatic test equipment
• Data acquisition systems
• Communication equipment
•Compatibility: 1.8 V logic
• Precision source-measure
instruments
• Medical/aerospace
instrumentation
• Industrial control
•Packaging: TSSOP, MSOP, and 3 mm × 3 mm LFCSP
Part Number
AD5541A
AD5541A-1
AD5542A
AD5542A-1
AD5512A
Configuration
LDAC, VLOGIC functionality
CLEAR functionality
CLEAR, LDAC, RFB, VLOGIC functionality
CLEAR, RFB functionality
CLEAR, LDAC, RFB, VLOGIC functionality
Resolution/
Accuracy
16-bit, 1 LSB
16-bit, 1 LSB
16-bit, 1 LSB
16-bit, 1 LSB
12-bit, 1 LSB
Package
10-lead MSOP, 10-lead LFCSP
8-lead LFCSP
16-lead TSSOP, 16-lead LFCSP
10-lead LFCSP
16-lead LFCSP
Webinar Series
Differential Circuit Design Techniques for Communications Applications
at www.analog.com/webinars.
6
For data sheets, samples, and additional resources, visit www.analog.com/V10DACs
Price
($U.S.)
6.25
7.95
6.25
7.95
2.85
Transmit DAC with Expanded Processing Functionality Eases Digital Interface Task
The quest for higher transmit channel densities in multistandard, multicarrier communications systems is increasing the required
interface width between the digital and analog portions of these designs. The increasing data interface width is in turn driving up
the pin counts of the FPGAs sourcing data to the mixed-signal components of these cards. Besides increasing the cost and power
consumption of the FPGAs, the sheer number of interconnects makes the layout of the PCBs increasingly complex and the desired
densities harder to achieve in the increasingly smaller system form factors.
Solution The AD9122 dual, 16-bit, 1200 MSPS TxDAC+® digital-to-analog converter (DAC)
with on-chip 32-bit NCO addresses the problem of increasing interface width by
offering a rich set of signal processing functions and a flexible digital interface.
The AD9122 supports 2×, 4×, 8× interpolation and 32-bit resolution digital
upconversion. This allows the digital source to provide the synthesized signal at
the lowest possible data rate without carrying the extra speed burden that these
functions entail. The flexible digital interface gives designers the option of trading
interface width for interface speed. The AD9122 supports bus interface speeds
up to 1200 Mbps. The interface width can be configured for word, byte, or nibble
mode. The pin width and interface speeds are shown in the table below.
Reliably transmitting data over an LVDS data bus at 1200 MSPS presents a design
challenge as well. In order to ease this design task, the AD9122 provides on-chip
sample error detection (SED) circuitry. This circuitry helps designers characterize
and optimize their interface timing margins, ensuring robust operation of the
interface.
Pricing
AD9122
$34.95
AD9122 Interface Widths and Speeds
Interface
Width
Interpolation
Factor
Nibble (4 bits)
Byte (8 bits)
Word (16 bits)
Pins
Required
f BUS
(Mbps)
f DAC
(MSPS)
Complex Bandwidth
(MHz)
1×
1200
150
150
2×
1200
300
120
1200
600
120
8×
1200
1200
120
1×
1200
300
300
1200
600
240
12
4×
2×
20
1200
1200
240
8×
600
600
120
1×
1200
600
600
2×
1000
1000
400
600
1200
240
300
1200
120
4×
34
4×
8×
Circuit Design Shortcut
Complementary components for AD9122 transmit DAC:
• AD9516 clock generator for system clock
• ADCLK914 clock buffer for jitter reduction and fanout
• ADL5375/ADRF6702 quadrature modulators
• ADRF6602 Rx mixer
For data sheets, samples, and additional resources, visit www.analog.com/V10DACs
7
Analog Devices, Inc.
600 North Bedford Street
East Bridgewater, MA 02333-1122
Highest Accuracy 3 V to 5 V Digital Variable Resistors Save Space in
Tiny 3 mm ∙ 3 mm LFCSP (SON) Package
Analog Devices, Inc.
Worldwide Headquarters
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
U.S.A.
Tel: 781.329.4700
(800.262.5643,
U.S.A. only)
Fax: 781.461.3113
The AD5270/AD5271/AD5272/AD5274 members of ADI’s digi POT+ family of digital variable resistors
are single channel, 1024-/256-position digitally controlled resistors with less than 1% end-to-end
resistor tolerance error and 50× programmable
memory. The devices perform the same
electronic adjustment function as a mechanical
rheostat with enhanced resolution, solid
state reliability, and superior low temperature
coefficient performance. These devices are
well suited for high precision applications
across industrial, communications, and
consumer markets.
These digipot ICs are available in thin 3 mm ×
3 mm LFCSP (SON) and compact 10-lead MSOP
packages. The parts are guaranteed to operate
over the extended industrial temperature range
of –40°C to +105°C.
Applications
Analog Devices, Inc.
Europe Headquarters
Analog Devices, Inc.
Wilhelm-Wagenfeld-Str. 6
80807 Munich
Germany
Tel: 49.89.76903.0
Fax: 49.89.76903.157
Pricing
• Instrumentation: gain, offset
adjustment
• Programmable
power supply
• Programmable voltage to
current conversion
• Sensor calibration
AD5270/
AD5272
AD5271/
AD5274
Webinar Series
Understanding and Applying Digital Potentiometers
at www.analog.com/webinars.
$1.59
$0.95
Analog Devices, Inc.
Japan Headquarters
Analog Devices, KK
New Pier Takeshiba
South Tower Building
1-16-1 Kaigan, Minato-ku,
Tokyo, 105-6891
Japan
Tel: 813.5402.8200
Fax: 813.5402.1064
Analog Devices, Inc.
Southeast Asia
Headquarters
Analog Devices
22/F One Corporate Avenue
222 Hu Bin Road
Shanghai, 200021
China
Tel: 86.21.2320.8000
Fax: 86.21.2320.8222
All prices in this bulletin are in USD in quantities
greater than 1000 (unless otherwise noted),
recommended lowest grade resale, FOB U.S.A.
I2C refers to a communications protocol
originally developed by Philips Semiconductors
(now NXP Semiconductors).
©2009 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the
property of their respective owners.
Inventory Code: DAC-V10-IS1-09
Printed in the U.S.A.
SB08703-2-11/09
www.analog.com