Test Procedure for the NCP1611GEVB Evaluation Board Oscilloscope Isolated current probe High voltage, voltage probe (500 V) Isolated ac power source ALT1 Ground terminal of the probe NCP1611 demo-board ALT2 (200-W, 60-Hz sinusoidal voltage) + VBULK Electronic Load GND V (500 V, 0.5 A) A Power Analyser (e.g., PM1200) Figure 1 – Set-up for board testing 1. Equipments for measurement The board testing set-up is shown in Figure 1: Apply an electronic load across the output (between the VBULK” and “GND” terminals of the board). This equipment will adjust the current ILOAD that loads the demo-board. Place a power analyzer able to measure the power factor (“PF”) and the Total Harmonic Distortion (“THD”) of the current absorbed from the ac power source. Apply a 200-W or more, 60-Hz, isolated ac power source to the “ALT1” and “ALT2” inputs of the demo-board. This source will adjust the sinusoidal input voltage, Vin, that is applied to the demo-board. The rms value of Vin must stay below 265 V. 2. Measurements VBULK, PF and THD measurements: Parameters Comments Vin,rms=115 V, ILOAD=0.1 A Voltage measured between “VBULK ” and VBULK “GND” PF Power Factor THD Total Harmonic Distortion Vin,rms=115 V, ILOAD=0.4 A Voltage measured between “VBULK ” and VBULK “GND” 8/31/2012 -1- Limits 390 V < VBULK < 410 V > 0.930 < 25 % 390 V < VBULK < 410 V www.onsemi.com PF Power Factor THD Total Harmonic Distortion Vin,rms=230 V, ILOAD=0.4 A Voltage measured between “VBULK ” and VBULK “GND” PF Power Factor THD Total Harmonic Distortion > 0.990 < 15 % 390 V < VBULK < 410 V > 0.950 < 20 % Brown-out levels The load current being 0.1 A, set the input voltage to 82 Vrms and decrease the input voltage with 1-V steps of 1 s or more. The demo-board must still operate at 75 Vrms and turn off before reaching 70 Vrms. The input voltage is increased from 70 Vrms with 1-V steps of 1 s or more, the PFC stage must stay off at 75 Vrms and recover operation at a voltage lower than 82 Vrms. Skip Observe the MOSFET drain-source voltage at 230 V, 0.1-A load. There must be skip periods of time the duration of which must be between 1 and 3 ms (see Figure 2). Skipping interval Figure 2 – MOSFET drain-source voltage (Vin,rms = 230 V, ILOAD = 0.1 A) 8/31/2012 -2- www.onsemi.com *The board contains high-voltage and hot, live parts. It should only be handled by experienced power supply professionals. Be very cautious when manipulating or testing it. It is the responsibility of the board users, to take all the precautions to avoid electric hazards and any other pains. 8/31/2012 -3- www.onsemi.com