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RT9187A
300mA, Ultra-Low Dropout, Ultra-Fast CMOS LDO Regulator
General Description
Features
The RT9187A is a high-performance, 300mA LDO regulator,
offering extremely high PSRR and ultra-low dropout. Ideal
for portable RF and wireless applications with demanding
performance and space requirements.
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Ultra-Low-Noise for RF Application
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Ultra-Fast Response in Line/Load Transient
μs)
Quick Start-Up (Typically 40μ
<0.1μ
μA Standby Current When Shutdown
Low Dropout : 75mV @ 300mA
Wide Operating Voltage Ranges : 2.5V to 5.5V
TTL-Logic-Controlled Shutdown Input
Low Temperature Coefficient
Current Limiting Protection
Thermal Shutdown Protection
Only 1μ
μF Output Capacitor Required for Stability
High Power Supply Rejection Ratio
RoHS Compliant and 100% Lead (Pb)-Free
A noise reduction pin is also available for further reduction
of output noise. Regulator ground current increases only
slightly in dropout, further prolonging the battery life. The
RT9187A also works with low-ESR ceramic capacitors,
reducing the amount of board space necessary for power
applications, critical in hand-held wireless devices.
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The RT9187A consumes less than 0.1μA in shutdown mode
and has fast turn-on time less than 100μs. The other
features include ultra-low dropout voltage, high output
accuracy, current limiting protection, and high ripple
rejection ratio. Available in the SOT-23-5 and VDFN-6L
2x2 package.
Ordering Information
RT9187A Package Type
B: SOT-23-5
QV : VDFN-6L 2x2 (V-Type)
Lead Plating System
P : Pb Free
Fixed Output Voltage Code
27 : 2.7V
28 : 2.8V
2G : 2.75V
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Applications
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CDMA/GSM Cellular Handsets
Portable Information Appliances
Battery-Powered Equipment
Laptop, Palmtops, Notebook Computers
Hand-Held Instruments
Mini PCI & PCI-Express Cards
PCMCIA & New Cards
Pin Configurations
(TOP VIEW)
VOUT
BP
5
4
Note :
Richtek products are :
`
RoHS compliant and compatible with the current require-
2
VIN GND EN
ments of IPC/JEDEC J-STD-020.
`
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SOT-23-5
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS9187A-01 April 2011
EN
GND
VIN
1
6
2
5
3
7
4
BP
VOUT
VOUT
VDFN-6L 2x2
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RT9187A
Typical Application Circuit
VIN
VIN
+
+
CIN
1µF
Chip Enable
VOUT
COUT
1µF
VOUT
RT9187A
BP
CBP
10nF
EN
GND
Functional Pin Description
RT9187A-
B
RT9187A-
PQV
Pin Name
Pin Function
1
3
VIN
Supply Input
2
2
GND
Ground
3
1
EN
Enable Input Logic, Active High. When the EN goes to a logic
low, the device is in shutdown mode.
4
--
BP
--
6
BP
Noise Reduction. Connecting a 10nF capacitor to GND to
reduce output noise.
5
4, 5
VOUT
Regulator Output
--
Exposed Pad
NC
No Internal Connection.
Function Block Diagram
VIN
EN
EN
OTP
POR
BIAS
-
VREF
+
Current Limit
BP
VOUT
Quick start
GND
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DS9187A-01 April 2011
RT9187A
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage ---------------------------------------------------------------------------------------------------EN Input Voltage --------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOT-23-5 ------------------------------------------------------------------------------------------------------------------VDFN-6L 2x2 -------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOT-23-5, θJA ------------------------------------------------------------------------------------------------------------VDFN-6L 2x2, θJA -------------------------------------------------------------------------------------------------------VDFN-6L 2x2, θJC -------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------Junction Temperature --------------------------------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM -----------------------------------------------------------------------------------------------------------------------MM --------------------------------------------------------------------------------------------------------------------------
Recommended Operating Conditions
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6V
6V
0.455W
0.606W
220°C/W
165°C/W
20°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage ---------------------------------------------------------------------------------------------------EN Input Voltage --------------------------------------------------------------------------------------------------------Operation Junction Temperature Range ----------------------------------------------------------------------------Operation Ambient Temperature Range -----------------------------------------------------------------------------
2.5V to 5.5V
0V to 5.5V
−40°C to 125°C
−40°C to 85°C
Electrical Characteristics
(VIN = 3V, VOUT = 2.7V, VEN = VIN, CIN = COUT = 1μF (Ceramic) & CBP = 10nF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Output Voltage Accuracy
Output Noise Voltage
Test Conditions
Min
Typ
Max
Unit
ΔVOUT
IOUT = 10mA
−2
0
+2
%
eNo
BW = 10Hz to 100kHz
IOUT = 1mA, COUT = 1μF
--
40
--
μV
IOUT = 0mA, Enable
--
210
250
μA
I STBY
VIN = 5.5V, Shutdown
--
0.1
1
μA
I LIM
RLOAD = 1Ω
2
2.5
3
A
IOUT = 250mA (Note 8)
--
60
100
IOUT = 500mA
--
120
180
--
0.1
0.2
%
0.1
0.2
%
CBP = 100nF
Quiescent Current
Standby Current
(Note 5) I Q
(Note 6)
Current Limit
Dropout Voltage
(Note 7)
VDROP
Load Regulation
(Note 9)
ΔVLOAD
10mA < IOUT < 500mA
ΔVLINE
VIN = 3V to 5.5V,
IOUT = 10mA
Line Regulation
EN Threshold
Logic-Low
VIL
--
--
0.6
Voltage
Logic-High
VIH
1.2
--
--
--
0.1
1
Enable Pin Current
I EN
Enable
mV
V
μA
To be continued
DS9187A-01 April 2011
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RT9187A
Parameter
Power Supply
f = 100Hz
Rejection Rate
f = 10kHz
Start-Up Time
Symbol
Test Conditions
PSRR
IOUT = 300mA
T Start_Up
1nF ≤ CBP ≤ 0.1μF
Thermal Shutdown Temperature T SD
Thermal Shutdown Hysteresis
ΔTSD
Min
Typ
Max
--
−55
--
--
−40
--
--
40
100
--
170
--
--
30
--
Unit
dB
μs
°C
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of
JEDEC 51-3 thermal measurement standard. The case position of θJC is on the exposed pad for the VDFN-6L 2x2
packages.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN - IOUT under no
load condition (IOUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin
current.
Note 6. Standby current is the input current drawn by a regulator when the output voltage is disabled by a shutdown signal
(VEN >1.8V ).
Note 7. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) - 100mV.
Note 8. Performance at -5°C ≤ TA ≤ 85°C is assured by design.
Note 9. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for load
regulation in the load range from 10mA to 500mA.
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DS9187A-01 April 2011
RT9187A
Typical Operating Characteristics
(COUT = 1μF/X7R, CBP = 10nF, unless otherwise specified )
Quiescent Current vs. Temperature
Quiescent Current vs. Input Voltage
300
260
VIN = 5V
VIN = 5V
Quiescent Current (μA)
Quiescent Current (uA)
275
250
225
200
175
150
240
220
200
180
125
160
100
3
3.5
4
4.5
5
-50
5.5
-25
0
Input Voltage (V)
Output Voltage vs. Temperature
VIN = 5V
2.9
2.8
2.7
2.5
125
200
TJ = 125°C
150
TJ = 25°C
100
TJ = -40°C
50
-25
0
25
50
75
100
125
0.0
0.1
0.2
Temperature (°C)
0.3
0.4
0.5
Load Current (A)
Region of Stable COUT ESR vs. Load Current
100
Noise vs. Frequency
10
VIN = 3.3V
300mA
Unstable Range
10
100mA
1
Noise (uV/ √ Hz)
ESR (Ω)
100
0
-50
OUT
75
Dropout Voltage vs. Load Current
2.6
Region of Stable C
50
250
Dropout Voltage (mV)
Output Voltage (V)
3
25
Temperature (°C)
Stable Range
0.1
0
1
1mA
0.1
0.01
0
Simulation Verify
0
0.00
0.05
0.10
0.15
0.20
Load Current (A)
DS9187A-01 April 2011
0.25
0.30
0.01
0.01
10
0.1
100
1
1000
10
10000
100
100000
Frequency (kHz)
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RT9187A
Load Transient Regulation
Line Transient Regulation
Input Voltage
Deviation (V)
VIN = 3.8V to 4.8V, ILOAD : 100mA
200
Output Voltage
Deviation (mV)
1
50
0
-50
4.8
3.8
5
0
-5
Time (100μs/Div)
Start Up
EN Pin Shutdown Response
VIN = 3.3V, ILOAD : 60mA
10
5
0
EN Pin Voltage
(V)
Time (100μs/Div)
Output Voltage
(V)
Output Voltage
(V)
EN Pin Voltage
(V)
Output Voltage
Deviation (mV)
Load Current
(mA)
VIN = 3.3V, ILOAD : 1mA to 300mA
2
1
0
VIN = 3.3V, ILOAD : 60mA
10
5
0
2
1
0
Time (5μs/Div)
Time (500μs/Div)
Noise
Noise
VIN = 4.5V (By battery), ILOAD : 300mA
300
300
200
200
Noise (μV/Div)
Noise (μV/Div)
VIN = 4.5V (By battery), No Load
100
0
-100
100
0
-100
-200
-200
-300
-300
Time (50ms/Div)
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Time (50ms/Div)
DS9187A-01 April 2011
RT9187A
Current Limit
Output Current (A)
VIN = 3.3V
2.5
2
1.5
1
0.5
0
Time (500μs/Div)
DS9187A-01 April 2011
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RT9187A
Applications Information
Enable
The RT9187A goes into sleep mode when the Enable pin
is in a logic low condition. During this condition, the pass
transistor, error amplifier, and bandgap are turned off,
reducing the supply current to 0.1μA typical. The Enable
pin may be directly tied to VIN to keep the part on. The
Enable input is CMOS logic and cannot be left floating.
Output capacitor
A quick-start feature allows for quick turn-on of the output
voltage. The recommended nominal bypass capacitor is
0.01μF, and an increase won't result in longer turn on times
TON.
PSRR
The power supply rejection ratio (PSRR) is defined as the
gain from the input to output divided by the gain from the
supply to the output. The PSRR is found to be
The RT9187A is specifically designed to employ ceramic
output capacitors as low as 1μF. Ceramic capacitors below
10μF offer significant cost and space savings, along with
high frequency noise filtering. The RT9187A doesn't rely
on a zero, which generated by output capacitor ESR. So,
output capacitor ESR is not sensitive, very low ESR is
allowed
Note that when heavy load measuring, Δsupply will cause
Δtemperature. And Δtemperature will cause Δoutput
voltage. So the heavy load PSRR measuring is include
temperature effect.
Input capacitor
Current limit
Good bypassing is recommended from input to ground to
help improve AC performance. A 1μF input capacitor or
greater located as close as possible to the IC is
recommended. Larger input capacitor values with lower
ESR provide better supply-noise rejection and line-transient
response. Larger load currents may require larger capacitor
values. Input capacitor is not critical to stability.
The RT9187A contains an independent current limiter,
which monitors and controls the pass transistor's gate
voltage, limiting the output current to 2.5A (Typ.). The
output can be shorted to ground indefinitely without
damaging the part.
Noise & bypass capacitor
Noise is specified in two ways
Spot Noise or Output noise density is the RMS sum of all
noise sources, measured at the regulator output, at a
specific frequency (measured with a 1Hz bandwidth). This
type of noise is usually plotted on a curve as a function of
frequency.
Total output Noise or Broadband noise is the RMS sum of
spot noise over a specified bandwidth, usually several
decades of frequencies.
Attention should be paid to the units of measurement.
Spot noise is measured in units μV/ Hz and total output
noise is measured in μV(rms).
The internal bandgap reference voltage of the RT9187A
can be bypassed with a capacitor to ground to reduce
output noise and increase input ripple rejection (PSRR).
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⎛ ΔGain Error ⎞
⎟⎟
PSRR = 20 × log⎜⎜
⎝ ΔSupply ⎠
Quick start up
The RT9187A provides fast start-up time for better system
efficiency. Here uses a voltage source to charges the
optional noise bypass capacitor. Unlike traditional current
source, the start-up times won't increase with bypass
capacitor.
Thermal Shutdown protection
Thermal shutdown protection limits total power dissipation
in the RT9187A. When the junction temperature exceeds
TJ = +170°C, the thermal sensor signals the shutdown
logic, turning off the pass transistor and allowing the IC to
cool. The thermal sensor turns the pass transistor on again
after the IC's junction temperature cools by 30°C, resulting
in a pulsed output during continuous thermal overload
conditions. Thermal-shutdown protection is designed to
protect the RT9187A in the event of fault conditions. For
continual operation, do not exceed the absolute maximum
junction temperature rating of TJ = +125°C.
DS9187A-01 April 2011
RT9187A
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
PD = (VIN − VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junctions to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX) − TA) /θJA
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and the
θJA is the junction to ambient thermal resistance.
Maximum Power Dissipation (mW)
Power Dissipation
650
600
550
500
450
400
350
300
250
200
150
100
50
Single-Layer PCB
VDFN-6L 2x2
SOT-23-5
0
0
15
30
45
60
75
90
105
120
135
Ambient Temperature (°C)
Figure 1. Derating Curves for RT9187A Package
For recommended operating conditions specification of
RT9187A, where T J(MAX) is the maximum junction
temperature of the die (125°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance (θJA is layout dependent) for SOT-23-5 package
is 220°C/W and VDFN-6L 2x2 package is 165°C/W on
standard JEDEC 51-3 single layer thermal test board. The
maximum power dissipation at TA = 25°C can be calculated
by following formula :
P D(MAX) = (125°C − 25°C) / 220 = 0.454W for
SOT-23-5 package
P D(MAX) = (125°C − 25°C) / 165 = 0.606W for
VDFN-6L 2x2 package
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT9187A packages, the Figure 1 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
DS9187A-01 April 2011
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RT9187A
Outline Dimension
H
D
L
B
C
b
A
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
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DS9187A-01 April 2011
RT9187A
D2
D
L
E
E2
1
e
b
A
A1
SEE DETAIL A
2
1
2
1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.800
1.000
0.031
0.039
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.350
0.008
0.014
D
1.950
2.050
0.077
0.081
D2
1.000
1.450
0.039
0.057
E
1.950
2.050
0.077
0.081
E2
0.500
0.850
0.020
0.033
e
L
0.650
0.300
0.026
0.400
0.012
0.016
V-Type 6L DFN 2x2 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS9187A-01 April 2011
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