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RT9833
Micro-Power Voltage Detectors with Manual Reset
General Description
Features
The RT9833 is a micro-power voltage detector with
deglitched manual reset input supervising the power supply
voltage level for microprocessors (μP) or digital systems.
It provides internally fixed threshold levels with 0.1V per
step ranging from 1V to 5V, which covers most digital
applications. It features low supply current of 3μA. The
RT9833 performs supervisory function by sending out a
reset signal whenever the VDD voltage falls below a preset
z
threshold level. This reset signal will last the whole period
before VDD recovering. Once VDD recovered upcrossing
the threshold level, the reset signal will be released after
a certain delay time. To pull reset signal low manually,
just pull the manual reset input (MR) below the specified
VIL level. The RT9833 is available in the SC-82 package.
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Internally Fixed Threshold 1V to 5V in 0.1V Step
High Accuracy ±1.5%
Low Supply Current 3μ
μA
No External Components Required
μs
Quick Reset within 20μ
Built-in Recovery Delay : 0ms, 55ms, 220ms, 450ms
Options
800ns Glitch Immunity of Manual Reset Input
Low Functional Supply Voltage 0.9V
N-Channel Open-Drain Output
Small SC-82 Package
RoHS Compliant and Halogen Free
Applications
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Ordering Information
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RT9833 -
z
Package Type
Y : SC-82
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Lead Plating System
G : Green (Halogen Free and Pb Free)
Threshold Voltage
12 : 1.2V
13 : 1.3V
:
49 : 4.9V
50 : 5.0V
Reset Active Timeout Period
A = 0ms (RESET)
B = 55ms (RESET)
C = 220ms (RESET)
D = 450ms (RESET)
E = 0ms (RESET)
F = 55ms (RESET)
G = 220ms (RESET)
H = 450ms (RESET)
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Computers
Controllers
Intelligent Instruments
Critical μP and μC Power Monitoring
Portable/Battery-Powered Equipment
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
Simplified Application Circuit
VDD
µp
RESET/
RESET
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS9833-00 May 2013
RT9833
VDD
MR
RESET/ GND
RESET
is a registered trademark of Richtek Technology Corporation.
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1
RT9833
Pin Configurations
(TOP VIEW)
VDD
MR
4
3
2
GND
RESET/
RESET
SC-82
Functional Pin Description
Pin No.
1
Pin Name
Pin Function
GND
Ground.
RESET
Active Low Open Drain Reset Output.
RESET
Active High Open Drain Reset Output.
3
MR
Manual Reset.
4
VDD
Power.
2
Function Block Diagram
MR
VDD
RESET/
RESET
VSET
Threshold
Voltage Setting
CMP
Timer
N MOS
GND
POR
Power On Reset
Operation
When VDD is lower than threshold voltage set by VSET
circuit, the RESET output becomes high. If VDD remains
higher than the threshold voltage with a hysteresis voltage,
Timer will be active. After a specific delay time, the RESET
output becomes low. There is an internal pull-high resistor
connected to the MR pin. MR resets the RT9833 only
when it is pulled low. When MR releases and waits for a
delay time, output returns to its normal state related to
VDD. It is an open drain output type of Reset IC.
VSET
The VSET generates a fixed threshold voltage.
CMP
Voltage Comparator which compares the voltage difference
between threshold voltage and VDD.
POR
Power on reset. It will set all digital logic to the right state
when power on.
Timer
The Timer provides four kinds of delay time options
including 0ms, 55ms, 220ms, and 450ms.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
RT9833
Absolute Maximum Ratings
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(Note 1)
Terminal Voltage (with Respect to GND)
VDD ------------------------------------------------------------------------------------------------------------------- −0.3V to 6V
All Other Inputs ---------------------------------------------------------------------------------------------------- −0.3V to (VDD + 0 .3V)
Input Current, IVDD ------------------------------------------------------------------------------------------------- 20mA
Power Dissipation, PD @ TA = 25°C
SC-82 ---------------------------------------------------------------------------------------------------------------- 0.29W
Package Thermal Resistance (Note 2)
SC-82, θJA ----------------------------------------------------------------------------------------------------------- 345.6°C/W
Lead Temperature (Soldering, 10sec.) ------------------------------------------------------------------------ 260°C
Storage Temperature Range ------------------------------------------------------------------------------------ −65°C to 125°C
ESD Susceptibility (Note 3)
HBM (Human Body Model) -------------------------------------------------------------------------------------- 2kV
Recommended Operating Conditions
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(Note 4)
Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VDD = 3V, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
0.9
--
6
V
Operating VDD (VOUT) Range
VDD
Supply Current
IDD
VTH = 3V, VDD = 4.5V, TA = 27°C
--
3
8
μA
Reset Threshold
VTH
TA = 27°C
--
1.2 to 5
--
V
VIL
TA = 27°C, VTH > 1.2V
--
--
0.25VDD
VIH
TA = 27°C, VTH > 1.2V
0.7V DD
--
--
--
800
--
ns
−1.5
--
1.5
%
--
20
--
μs
--
0
--
35
55
75
143
220
297
292
0.75 x
VDD
450
608
--
VDD
--
--
--
0
0.25 x
VDD
--
35
55
75
143
220
297
292
450
608
--
--
0.4
V
--
0.01VTH
--
V
MR Input Threshold
MR Glitch Rejection
Threshold Voltage Accuracy
ΔVTH
TA = 27°C
VDD Drop to Reset Delay
tRD
Drop = VTH −125mV
RT9833A/E
MR Active
Timeout Period
RT9833B/F
RT9833C/G
tMR
RT9833D/H
MR Input Voltage Logic-High
Threshold
Logic-Low
VMR_H
VDD > VTH(MAX)
VMR_L
VDD > VTH(MAX)
RT9833A/E
Reset Active
Time Out Period
RT9833B/F
RT9833C/G
tRP
VDD ≥ 1.02×VTH
RT9833D/H
RESET Output Voltage Low
VOL
Hysteresis Width
VHYS
3 = VDD < VTH ISINK > 3.5mA
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS9833-00 May 2013
V
ms
V
ms
is a registered trademark of Richtek Technology Corporation.
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3
RT9833
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
RT9833
Typical Application Circuit
VDD
µp
100k
Pull Up
RESET/
RESET
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS9833-00 May 2013
RT9833
4 VDD
MR
3
1
2 RESET/
GND
RESET
is a registered trademark of Richtek Technology Corporation.
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5
RT9833
Typical Operating Characteristics
RESET Sink Current vs. VDS
2.4
RT9833A-12
VDD = 1.1V
1.6
1.2
VDD = 1V
0.8
RT9833C-30
VDD = 2.8V
50
Sink Current (mA)
2.0
Sink Current (mA)
RESET Sink Output Current vs. VDS
60
VDD = 2.5V
40
30
VDD = 2V
20
0.4
VDD = 1.5V
10
0
0.0
0
0.3
0.6
0.9
1.2
0
1.5
0.5
1
1.5
RESET Sink Current vs. VDS
RT9833A-45
3.5
RT9833
6
Output Voltage (V)
Sink Current (mA)
3
Output Voltage vs. Input Voltage
7
100
80
60
VDD = 4.4V
= 4V
= 3.5V
= 3V
= 2.5V
= 2V
= 1.5V
40
20
5
4
3
4.5V
2
1
0
1.2V
0
0
1
2
3
4
5
0
1
VDS (V)
RT9833A-12
4
5
6
RT9833C-30
3.5
Supply Current (μA)
80°C
4
25°C
3
2
3
Supply Current vs. Input Voltage
4.0
5
2
Input Voltage (V)
Supply Current vs. Input Voltage
6
Supply Current (μA)
2.5
VDS (V)
VDS (V)
120
2
−30°C
1
80°C
3.0
2.5
25°C
2.0
−30°C
1.5
1.0
0.5
0.0
0
0
1
2
3
4
5
Input Voltage (V)
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6
0
1
2
3
4
5
6
Input Voltage (V)
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
RT9833
Power Down Reset Delay vs. Temperature
Supply Current vs. Input Voltage
4.0
14
Supply Current (μA)
Power Down Reset Delay (µs)
RT9833A-45
3.5
80°C
3.0
25°C
2.5
−30°C
2.0
1.5
1.0
0.5
0.0
RT9833A-12
12
10
VDROP = 200mV
8
VDROP = 150mV
6
VDROP = 250mV
4
2
0
0
1
2
3
4
5
6
-50
-25
0
Input Voltage (V)
Power Down Reset Delay (µs) 1
Power Down Reset Delay (µs)
RT9833C-30
35
30
VDROP = 200mV
20
VDROP = 150mV
15
VDROP = 250mV
10
5
-50
125
RT9833A-45
40
35
30
25
VDROP = 200mV
VDROP = 150mV
20
15
VDROP = 250mV
10
5
-25
0
25
50
75
100
-50
125
-25
0
Reset Threshold Deviation vs. Temperature
RT9833
5V
35
4.5V
30
Sink Current (mA)
4
50
75
100
125
RESET Sink Current vs. Input Voltage
40
5
25
Temperature (°C)
Temperature (°C)
Reset Threshold (V)
100
0
0
6
75
Power Down Reset Delay vs. Temperature
45
40
25
50
Temperature (°C)
Power Down Reset Delay vs. Temperature
45
25
4.2V
3
2.2V
2
RT9833C-30, VDS = 0.5V
−30°C
25°C
25
20
80°C
15
10
5
1.2V
1
0
-50
-25
0
25
50
75
100
Temperature (°C)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS9833-00 May 2013
125
0
0.5
1
1.5
2
2.5
3
3.5
Input Voltage (V)
is a registered trademark of Richtek Technology Corporation.
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7
RT9833
Power Up Reset Timeout vs. Temperature
RESET Sink Current vs. Input Voltage
50
500
Power Up Reset Timeout (ms)
RT9833A-45, VDS = 0.5V
−30°C
Sink Current (mA)
40
25°C
30
80°C
20
10
RT9833C
400
VTH = 2.9V
300
200
VTH = 3V
100
0
0
0
1
2
3
4
-50
5
-25
0
Power Up Reset Timeout vs. Temperature
100
125
Output Delay Time vs. Load Capacitance
RT9833A
Output Delay Time (ms)
Power Up Reset Timeout (µs)
75
1000
80
60
VTH = 5V
40
VTH = 4.5V
20
100
10
VTH = 1.2V
1
0.1
VTH = 4.5V
0
-50
-25
0
25
50
75
100
125
0.01
0.0001
0.0010
RESET Sink Current vs. VDS
160
0.0100
0.1000
1.0000
Load Capacitance (µF)
Temperature (°C)
RESET Sink Current vs. Input Voltage
60
RT9833G-31
140
50
120
100
Sink Current (mA) 1
Sink Current (mA) 1
50
Temperature (°C)
Input Voltage (V)
100
25
VDD = 6V
= 5.5V
= 5V
= 4.5V
= 4.V
= 3.5V
80
60
40
RT9833G-31
VDS = 0.5V
−30°C
25°C
40
80°C
30
20
10
20
0
0
0
1
2
3
4
5
VDS (V)
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8
6
0
1
2
3
4
5
6
Input Voltage (V)
is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
RT9833
Power Up Reset Timeout vs. Temperature
Output Voltage vs. Input Voltage
7
RT9833G-31
RT9833G-31
6
400
Output Voltage (V)
Power Up Reset Timeout (ms)
500
300
200
100
5
4
3
2
1
0
0
-50
-25
0
25
50
75
100
125
0
1
2
3
4
5
6
Input Voltage (V)
Temperature (°C)
Power Down Reset Delay vs. Temperature
Power Down Reset Delay (µs)
30
RT9833G-31
25
20
VDROP = 200mV
VDROP = 150mV
15
10
VDROP = 250mV
5
0
-50
-25
0
25
50
75
100
125
Temperature (°C)
Copyright © 2013 Richtek Technology Corporation. All rights reserved.
DS9833-00 May 2013
is a registered trademark of Richtek Technology Corporation.
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RT9833
Application Information
Mainly, the pull-up connected to the RT9833 will connect
to the supply voltage that is being monitored at the IC's
VCC pin. However, some systems may use the opendrain output to level-shift from the monitored supply to
reset circuitry powered by some other supply.
Benefits of Highly Accurate Reset Threshold
Most μP supervisor ICs have reset threshold voltages
between 1% and 1.5% below the value of nominal supply
voltages. This ensures a reset will not occur within 1% of
the nominal supply, but will occur when the supply is 1.5%
below nominal.
0.5
Maximum Power Dissipation (W)1
Multiple Supplies
Four-Layer PCB
0.4
0.3
0.2
0.1
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 1. Derating Curve of Maximum Power Dissipation
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent.
SC-82 package, the thermal resistance, θJA, is 345.6°C/
W on a standard JEDEC 51-7 four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (345.6°C/W) = 0.29W for
SC-82 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 1 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
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is a registered trademark of Richtek Technology Corporation.
DS9833-00 May 2013
RT9833
Outline Dimension
D
e
H
L
B
C
b1
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.800
1.100
0.031
0.043
A1
0.000
0.100
0.000
0.004
B
1.150
1.350
0.045
0.053
b
0.150
0.400
0.006
0.016
b1
0.350
0.500
0.014
0.020
C
1.800
2.450
0.071
0.096
D
1.800
2.200
0.071
0.087
e
1.300
0.051
H
0.080
0.260
0.003
0.010
L
0.200
0.460
0.008
0.018
SC-82 Surface Mount Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS9833-00 May 2013
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