EVAL-1CH2CHSOICEBZ User Guide UG-937 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Using the EVAL-1CH2CHSOICEBZ iCoupler Standard Data Isolator Evaluation Board FEATURES GENERAL DESCRIPTION Access to 2 data channels Multiple connection options Support for active probes Provisions for cable terminations Support for printed circuit board (PCB) edge mounted coaxial connectors Easy configuration The EVAL-1CH2CHSOICEBZ supports single- and dual-channel iCoupler® standard data isolators in 8-lead SOIC packages. The evaluation board provides a JEDEC standard, 8-lead SOIC_N and 8-lead SOIC_W pad layout. This layout supports signal distribution, loopback, and loads referenced to the VDDx or GNDx planes, as well as optimal bypass capacitance. Signal sources can be conducted to the board through header pins or through edge mounted SMA connectors (SMA connectors must be ordered separately). Screw terminal blocks on the board provide power connections. The board includes 0.2 inch header positions for compatibility with active probes (probe header pins must be ordered separately). SUPPORTED iCoupler DEVICES Sample iCoupler digital isolators must be ordered separately; supported iCoupler devices are as follows: ADuM110N ADuM120N/ADuM121N ADuM210N ADuM225N/ADuM226N ADuM7240/ADuM7241 ADuM1200/ADuM1201 ADuM1210 ADuM3200/ADuM3201 ADuM3210/ADuM3211 ADuM1280/ADuM1281 The evaluation board follows best PCB design practices for 4-layer boards, including a full power and ground plane on each side of the isolation barrier. No other electromagnetic interference (EMI) or noise mitigation design features are included on this board. In cases of high speed operation, or when ultralow emissions are required, refer to the AN-1109 Application Note for additional board layout techniques. 14279-001 PHOTOGRAPH OF THE EVALUATION BOARD Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 8 UG-937 EVAL-1CH2CHSOICEBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Connectors .....................................................................................3 Supported iCoupler Devices ........................................................... 1 Input Power ....................................................................................4 General Description ......................................................................... 1 Data Input/Output (I/O) Structures ...........................................4 Photograph of the Evaluation Board.............................................. 1 Bypass Capacitance on the PCB ..................................................4 Revision History ............................................................................... 2 High Voltage Capability ...............................................................4 Evaluation Board Circuitry ............................................................. 3 Evaluation Board Schematics and Artwork ...................................5 PCB Evaluation Goals .................................................................. 3 Bill of Materials ..................................................................................8 REVISION HISTORY 4/16—Revision 0: Initial Version Rev. 0 | Page 2 of 8 EVAL-1CH2CHSOICEBZ User Guide UG-937 EVALUATION BOARD CIRCUITRY PCB EVALUATION GOALS CONNECTORS The EVAL-1CH2CHSOICEBZ board is intended to achieve the following goals: The PCB provides support for three types of interconnections: Evaluate the full range of iCoupler data transfer functions. Independently power each side of an iCoupler isolator. Allow high differential voltage to be applied between the two sides of an iCoupler isolator. Note that this board is intended for evaluation of the components, but has not been safety certified for high voltage operation. If differential voltages above 60 V are applied, external safety measures appropriate for the voltage must be in place. Allow easy connection to power supplies, data channels, and instrumentation. The evaluation board comes installed with power terminals, bypass capacitors, and header pins. Note that the EVALADuM226N0EBZ is available with the ADuM226N0 device, which is installed on the EVAL-1CH2CHSOICEBZ evaluation board. All other compatible iCoupler digital isolators must be ordered and installed separately on the EVAL-1CH2CHSOICEBZ evaluation board. With these three options, both temporary and permanent connections to the board can be made. When coaxial connections are required, SMA connector positions are available for digital input/output signals and the VDD1/VDD2 power supplies. The SMA connector positions are unpopulated as shipped and must be ordered from a distributor separately. Figure 5 shows examples of installed SMA connectors; these connectors were chosen because they are not only low profile and provide excellent mechanical connections to the PCB, but also support 50 Ω coaxial cabling. 1) SCOPE PROBE 2) SMA CONNECTOR The board is compatible with single- and dual-channel devices, such as the ADuM110N, ADuM120N/ADuM121N, ADuM210N, and ADuM225N/ADuM226N, as well as other 8-lead SOIC_N and 8-lead SOIC_W iCoupler devices that share the package and pin configuration examples shown in Figure 2, Figure 3, and Figure 4. VDD1 1 ENCODE DECODE VDD2 7 GND2 5) SCOPE PROBE HEADER 4) SHORTING JUMPER VO 6 (DATA OUT) VDD1 3 GND1 4 5 GND2 8 VDD2 VIA 2 ENCODE DECODE 7 VOA VIB 3 ENCODE DECODE 6 VOB 5 GND2 GND1 4 Figure 5. Optional Components Power can be connected through the J1 and J2 terminal blocks or through the optional VDD1 and VDD2 SMA connectors. Signals can be routed in or out with the provided header pins or the optional SMA connectors. The pin spacing of each through-hole connector is 0.1 inch between the centers. There are additional signal test points with 0.2 inch spacing provided for active scope probes. These header pins must be added separately. The installed probe points are shown in Figure 5. 14279-003 Figure 2. ADuM110N/ADuM210N Functional Block Diagram VDD1 1 8 VDD2 VOA 2 DECODE ENCODE 7 VIA VIB 3 ENCODE DECODE 6 VOB 5 GND2 GND1 4 14279-004 Figure 3. ADuM120N/ADuM225N Functional Block Diagram VDD1 1 3) TERMINAL BLOCK 6) PADS TO CONNECT SMA 14279-002 VI (DATA IN) 2 8 SMA edge mounted connectors Through hole signal ground pairs Terminal blocks for power connections 14279-005 Figure 4. ADuM121N/ADuM226N Functional Block Diagram Rev. 0 | Page 3 of 8 UG-937 EVAL-1CH2CHSOICEBZ User Guide 6. INPUT POWER Each side of an iCoupler standard data isolator requires its own offboard power source. On the silkscreen, the J1 and J2 screw terminals are marked 1 for VDDx and 2 for GNDx. Divided power and ground planes are present on Layer 2 and Layer 3 of the PCB on each side of the isolation barrier. This configuration is shown in Figure 9 and Figure 10, respectively. DATA INPUT/OUTPUT (I/O) STRUCTURES Each data channel has a variety of structures to help configure, load, and monitor both the input and output. Figure 6 shows an example of the routing from an external connection to the pin of the device under test (DUT). Each data channel has similar connections. Starting at the external connection, the signal path is constructed in the following order (see Figure 6 for the locations of these components): 2. 3. 4. 5. A pad layout for a PCB board edge mounted SMA connector. Two 0805 pads are provided where 100 Ω resistors to ground can be installed. The combined resistance is 50 Ω to provide a termination for a standard coaxial cable. A standard 0805 pad layout that allows the coaxial and termination structures to be connected to the rest of the signal path. A 0603 pad layout between the signal path and VDDx for a pull-up resistor, if required. A populated 2-pin header to provide a signal ground pair for use with clip leads or for temporarily shorting a channel to ground. Figure 5 shows many of the optional components installed, as well as how the jumpers can be used to temporarily connect channels. Figure 5 also shows a signal connected to the first channel SMA, which is then fanned out to the top three channels and monitored by an active scope probe. BYPASS CAPACITANCE ON THE PCB Several positions and structures are provided to allow optimal bypass capacitance for the DUT on the evaluation board. Provisions are made for optional surface-mount bulk capacitors to be installed near the power connectors to compensate for long cables to the power supply. Bypass capacitors are installed near the iCoupler data isolator and consist of a 0.1 μF capacitor for each DUT VDDx pin on the top side of the board. The PCB also implements a distributed capacitive bypass. This bypass consists of power and ground planes closely spaced on the inner layers of the PCB, which reduces noise and the transmission of EMI without using complex design features. HIGH VOLTAGE CAPABILITY This PCB is designed in adherence with 2500 V basic insulation practices. High voltage testing beyond 2500 V is not recommended. Do not rely on the evaluation board for safety functions. 1 SMA CONNECTOR PADS 2 TERMINATION 3 CONNECT TO SMA 4 PULL UP 6 OPEN THROUGH HOLES FOR ACTIVE PROBE HEADER 5 2-PIN-HEADER GND/SIGNAL 7 PULL DOWN OR LOAD NOTES 1. THE NUMBERED COMPONENTS IN THIS FIGURE CORRESPOND TO THE DESCRIPTIONS IN THE DATA INPUT/OUTPUT STRUCTURES SECTION. Figure 6. Configuration and Monitoring Structures Rev. 0 | Page 4 of 8 14279-006 1. 7. Groupings of three open through holes, consisting of a signal and two ground connections. These holes can be used for hardwiring signal wires into the PCB, installing a header to accept an active probe, or installing a 2-pin header to allow adjacent channels to temporarily be shorted together. A 0805 pad layout between the signal and GNDx where a load capacitor or pull-down resistor can be installed. Rev. 0 | Page 5 of 8 DNI JOHNSON142-0701-851 1 AGND1 2 3 4 5 B1 AGND1 DNI 2 3 4 5 JOHNSON142-0701-851 R1 AGND1 DNI 100 R3 AGND1 0 DNI R5 0 R6 DNI AGND1 2 3 4 5 1 VDD1 AGND1 0 R8 0 AGND1 R7 DNI AGND1 DNI VDD1 JOHNSON142-0701-851 DNI R2 DNI 100 DNI 100 R4 DNI 100 DNI 15PF AGND1 DNI 1 2 3 P5 AGND1 AGND1 AGND1 15PF DNI C1 C2 R9 R10 DNI 0 DNI 0 10UF VDD1 C3 Figure 7. EVAL-1CH2CHSOICEBZ Schematic 22-03-2031 1 2 1 2 3 1 2 1 2 3 DNI DNI AGND1 VDD1 SSW-102-01-G-S 22-03-2031 P8 P7 SSW-102-01-G-S 22-03-2031 P1 P6 VDD1 VDD1 AGND1 AGND1 0.1UF ESD2 AGND1 DNI 1 AGND1 DNI 1 AGND2 ESD4 VDD2 AGND2 AGND2 DNI 1 AGND2 ESD3 DNI 1 ESD1 1 2 VOA VOB MC000044 1 2 J2 ADUM1200CRZ 1 8 VDD1 VDD2 2 7 VIA VOA 3 6 VIBVOB 4 5 GND1GND2 DNI MC000044 J1 AGND1 VIA VIB U1 ADUM210N0BRIZ 1 8 VDD1 VDD2 7 2 VI GND2 3 6 VDD1 VO 4 5 GND1 GND2 U2 DNI VDD2 0.1UF AGND2 DNI P4 2 1 1 2 3 P11 1 2 1 2 3 VDD2 SSW-102-01-G-S 22-03-2031 DNI P10 SSW-102-01-G-S 22-03-2031 P9 DNI AGND2 1 2 3 P12 AGND2 AGND2 DNI AGND2 0 DNI AGND2 0 C6 R11 R12 22-03-2031 0 DNI R13 AGND2 0 DNI R14 AGND2 DNI 15PF DNI VDD2 DNI DNI AGND2 AGND2 JOHNSON142-0701-851 DNI AGND2 0 R16 VDD2 0 R15 5 4 3 2 VDD2 1 AGND2 15PF C7 C8 10UF R17 R18 DNI 100 DNI R19 100 R20 DNI 100 100 DNI 1 1 A2 B2 AGND2 5 4 3 2 1 AGND2 5 4 3 2 DNI JOHNSON142-0701-851 JOHNSON142-0701-851 DNI 14279-007 A1 EVAL-1CH2CHSOICEBZ User Guide UG-937 EVALUATION BOARD SCHEMATICS AND ARTWORK C5 C4 EVAL-1CH2CHSOICEBZ User Guide 14279-008 UG-937 14279-010 Figure 8. Top Level Signal Routing and Assembly (Layer 1) Figure 9. GND1 and GND2 Planes (Layer 2) Rev. 0 | Page 6 of 8 UG-937 14279-009 EVAL-1CH2CHSOICEBZ User Guide Figure 10. VDD1 and VDD2 Power Plane (Layer 3) Rev. 0 | Page 7 of 8 UG-937 EVAL-1CH2CHSOICEBZ User Guide BILL OF MATERIALS Table 1. Qty 1 2 2 2 4 6 6 4 8 12 1 Reference Designator U1 C3, C6 C4, C5 J1, J2 P1, P4, P8, P11 A1, A2, B1, B2, VDD1, VDD2 P5 to P7, P9, P10, P12 C1, C2, C7, C8 R1 to R4, R17 to R20 R5 to R16 Description DUT 0805, 10 μF capacitor, CER monolithic 0805, 0.1 μF capacitor, chip X7R PCB screw terminal 2-pin header, 100 mil spacing SMA edge connector (not installed) 2-pin header, 200 mil spacing (not installed) 0603 signal load (not installed) 0805, 100 Ω resistors (not installed) 0805, 0 Ω resistors (not installed) Manufacturer/Part Number Analog Devices, Inc./ADuM226N0BRIZ1 Not applicable Not applicable Multicomp/MC000044 Not applicable Johnson/142-0701-851 Not applicable Not applicable Not applicable Not applicable This is the DUT installed on the EVAL-ADuM226N0EBZ; otherwise, this location is unpopulated. ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG14279-0-4/16(0) Rev. 0 | Page 8 of 8