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RT7256B
3A, 17V, 1.2MHz Synchronous Step-Down Converter
General Description
The RT7256B is a high efficiency, monolithic synchronous
step-down DC/DC converter that can deliver up to 3A
output current from a 4.5V to 17V input supply. The
RT7256B's current mode architecture and internal
compensation allow the transient response to be
optimized over a wide input range and loads.
Cycle-by-cycle current limit provides protection against
shorted outputs, and soft-start eliminates input current
surge during start-up. The RT7256B also provides under
voltage protection and thermal shutdown protection. The
low current (<3μA) shutdown mode provides output
disconnection, enabling easy power management in
battery-powered systems. The RT7256B is available in
an SOP-8 (Exposed Pad) package.
Ordering Information
RT7256B
Package Type
SP : SOP-8 (Exposed Pad-Option 1)
Lead Plating System
Z : ECO (Ecological Element with
Halogen Free and Pb free)
H : UVP Hiccup
L : UVP Latch-Off
Features
±1.5% High Accuracy Reference Voltage
4.5V to 17V Input Voltage Range
3A Output Current
Integrated N-MOSFET Switches
Current Mode Control
Fixed Frequency Operation : 1.2MHz
Output Adjustable from 0.8V to 12V
Up to 95% Efficiency
Programmable Soft-Start
Stable with Low ESR Ceramic Output Capacitors
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Applications
Wireless AP/Router
Set-Top-Box
Industrial and Commercial Low Power Systems
LCD Monitors and TVs
Green Electronics/Appliances
Point of Load Regulation of High-Performance DSPs
Pin Configurations
Note :
Richtek products are :
`
ments of IPC/JEDEC J-STD-020.
`
(TOP VIEW)
RoHS compliant and compatible with the current requireSuitable for use in SnPb or Pb-free soldering processes.
Marking Information
8
BOOT
VIN
2
SW
3
GND
4
GND
SS
7
EN
6
NC
5
FB
9
SOP-8 (Exposed Pad)
RT7256BxZSP : Product Number
RT7256Bx
ZSPYMDNN
x : H or L
YMDNN : Date Code
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS7256B-00
February 2012
is a registered trademark of Richtek Technology Corporation.
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1
RT7256B
Typical Application Circuit
2
VIN
4.5V to 17V
CIN
10µF x 2
REN 100k
CSS
0.1µF
VIN
RT7256B
BOOT
7 EN
8 SS
4, 9 (Exposed Pad)
1
SW 3
CBOOT
L
0.1µF 2µH
R1
22k
GND
FB 5
VOUT
3.3V
COUT
22µF x 2
R2
6.8k
Table 1. Suggested Component Selection
V OUT (V)
8
5
3.3
2.5
1.8
1.2
R1 (kΩ)
9
10.5
22
25.5
31.25
35.7
R2 (kΩ)
1
2
6.8
12
25
68
L (μH)
3.6
2
2
1
0.68
0.68
COUT (μF)
22 x 2
22 x 2
22 x 2
22 x 2
22 x 2
22 x 2
Functional Pin Description
Pin No.
Pin Name
1
BOOT
2
VIN
3
SW
Pin Function
Bootstrap for High Side Gate Driver. Connect a 0.1μF or greater ceramic
capacitor from BOOT to SW pins.
Input Supply Voltage, 4.5V to 17V. Must bypass with a suitably large ceramic
capacitor.
Switch Node. Connect this pin to an external L-C filter.
GND
Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
5
FB
Feedback Input. It is used to regulate the output of the converter to a set value
via an external resistive voltage divider.
6
NC
No Internal Connection.
7
EN
8
SS
4,
9 (Exposed Pad)
Enable Input Pin. A logic high enables the converter; a logic low forces the
RT7256B into shutdown mode reducing the supply current to less than 3μA.
Attach this pin to VIN with a 100kΩ pull up resistor for automatic startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor
from SS to GND to set the soft-start period. A 0.1μF capacitor sets the
soft-start period to 13.5ms.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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is a registered trademark of Richtek Technology Corporation.
DS7256B-00
February 2012
RT7256B
Function Block Diagram
VIN
Internal
Regulator
Oscillator
Slope Comp
Shutdown
VA VCC
Comparator
1.2V
Foldback
Control
+
-
5k
EN
Current Sense
Amplifier
+
-
RSENSE VA
0.4V
+
UV
Comparator
Lockout
Comparator
2.5V +
BOOT
+
Current
Comparator
S
Q
110m Ω
R
Q
90m Ω
SW
GND
VCC
6µA
0.8V
SS
300k
10k
+
+EA
-
35p
FB
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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February 2012
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RT7256B
Absolute Maximum Ratings
(Note 1)
Supply Voltage, VIN ------------------------------------------------------------------------------------------------Switch Voltage, SW -----------------------------------------------------------------------------------------------VBOOT − VSW ---------------------------------------------------------------------------------------------------------Other Pins Voltages -----------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
−0.3V to 20V
−0.3V to (VIN + 0.3V)
−0.3V to 6V
−0.3V to 20V
SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------
1.333W
Recommended Operating Conditions
75°C/W
15°C/W
260°C
150°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Voltage, VIN ------------------------------------------------------------------------------------------------- 4.5V to 17V
Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Shutdown Supply Current
VEN = 0V
--
0.5
3
μA
Supply Current
VEN = 3V, VFB = 0.9V
--
0.8
1.2
mA
0.788
0.8
0.812
V
RDS(ON)1
--
110
--
mΩ
RDS(ON)2
--
90
--
mΩ
VEN = 0V, VSW = 0V
--
0
10
μA
Min. Duty Cycle,
VBOOT − VSW = 4.8V
--
5.1
--
A
GCS
--
4.7
--
A/V
f OSC1
1000
1200
1400
kHz
Reference Voltage
High Side Switch
On-Resistance
Low Side Switch
On-Resistance
High Side Switch Leakage
Current
VREF
Upper Switch Current Limit
COMP to Current Sense
Transconductance
Oscillation Frequency
Short Circuit Oscillation
Frequency
Maximum Duty Cycle
Minimum On-Time
4.5V ≤ VIN ≤ 17V
f OSC2
VFB = 0V
--
270
--
kHz
DMAX
VFB = 0.7V
--
78
--
%
--
100
--
ns
tON
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RT7256B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
EN Input
Logic-High
Threshold
Logic-Low
Voltage
Input Under Voltage Lockout
Threshold
Input Under Voltage Lockout
Hysteresis
VIH
2.7
--
17
VIL
--
--
0.4
3.8
4.2
4.5
V
--
320
--
mV
Soft-Start Current
ISS
VSS = 0V
--
6
--
μA
Soft-Start Period
tSS
CSS = 0.1μF
--
13.5
--
ms
Thermal Shutdown
TSD
--
150
--
°C
VUVLO
VIN Rising
ΔVUVLO
V
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS7256B-00
February 2012
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RT7256B
Typical Operating Characteristics
Efficiency vs. Output Current
4.2
90
4.0
80
Output Voltage (V)
VIN = 12V
VIN = 17V
70
Efficiency (%)
Output Voltage vs. Input Voltage
100
60
50
40
30
3.8
3.6
3.4
3.2
3.0
2.8
20
2.6
10
VOUT = 3.3V
VOUT = 3.3V, IOUT = 0.6A
0
2.4
0.01
0.1
1
10
4
5
6
7
8
Output Current (A)
Output Voltage vs. Temperature
10 11 12 13 14 15 16 17
Output Voltage vs. Load Current
4.0
4.0
3.8
3.6
Output Voltage (V)
Output Voltage (V)
9
Input Voltage (V)
3.6
3.4
3.2
3.2
VIN = 17V
VIN = 12V
VIN = 6V
2.8
2.4
3.0
VIN = 12V, VOUT = 3.3V, IOUT = 0.6A
VOUT = 3.3V
2.0
2.8
-50
-25
0
25
50
75
100
0
125
0.5
1
Temperature (°C)
Switching Frequency vs. Input Voltage
2
2.5
3
Switching Frequency vs. Temperature
1400
1400
1350
1350
Frequency (kHz)1
Frequency (kHz)1
1.5
Load Current (A)
1300
1250
1200
1300
1250
1200
1150
1150
VOUT = 3.3V, IOUT = 0.6A
VIN = 12V, VOUT = 3.3V, IOUT = 0.6A
1100
1100
4.5
7
9.5
12
14.5
Input Voltage (V)
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17
-50
-25
0
25
50
75
100
125
Temperature (°C)
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DS7256B-00
February 2012
RT7256B
Current Limit vs. Input Voltage
8
7
7
Current Limit (A)
Current Limit (A)
Current Limit vs. Temperature
8
6
5
4
6
5
4
3
3
VIN = 12V, VOUT = 3.3V
VOUT = 3.3V
2
2
-50
-25
0
25
50
75
100
4
125
8
10
12
14
16
Temperature (°C)
Input Voltage (V)
Load Transient Response
Load Transient Response
VOUT
(100mV/Div)
VOUT
(100mV/Div)
IOUT
(1A/Div)
IOUT
(1A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1A to 3A
Time (100μs/Div)
Time (100μs/Div)
Ripple Voltage
Ripple Voltage
VOUT
(5mV/Div)
VLX
(10V/Div)
VLX
(10V/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1A
Time (250ns/Div)
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18
VIN = 12V, VOUT = 3.3V, IOUT = 2A to 3A
VOUT
(5mV/Div)
DS7256B-00
6
VIN = 12V, VOUT = 3.3V, IOUT = 3A
Time (250ns/Div)
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RT7256B
Power Off from VIN
Power On from VIN
VIN
(5V/Div)
VIN
(5V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
IOUT
(2A/Div)
IOUT
(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VIN = 12V, VOUT = 3.3V, IOUT = 3A
Time (25ms/Div)
Time (25ms/Div)
Power On from EN
Power Off from EN
VEN
(5V/Div)
VEN
(5V/Div)
VOUT
(2V/Div)
VOUT
(2V/Div)
IOUT
(2A/Div)
IOUT
(2A/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VIN = 12V, VOUT = 3.3V, IOUT = 3A
Time (25ms/Div)
Time (25ms/Div)
UV Shutdown Hiccup
UV Shutdown Latch
VLX
(5V/Div)
VLX
(5V/Div)
VOUT
(1V/Div)
VOUT
(2V/Div)
IOUT
(5A/Div)
IOUT
(5A/Div)
VIN = 12V, VOUT = 3.3V
Time (25ms/Div)
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VIN = 12V, VOUT = 3.3V
Time (25ms/Div)
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DS7256B-00
February 2012
RT7256B
Application Information
Output Voltage Setting
Soft-Start
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 1.
The RT7256B provides soft-start function. The soft-start
function is used to prevent large inrush current while
converter is being powered-up. The soft-start timing can
be programmed by the external capacitor between SS and
GND. An internal current source ISS (6μA) charges an
VOUT
R1
FB
RT7256B
R2
GND
Figure 1. Output Voltage Setting
The output voltage is set by an external resistive voltage
divider according to the following equation :
external capacitor to build a soft-start ramp voltage. The
VFB voltage will track the internal ramp voltage during softstart interval. The typical soft-start time is calculated as
follows :
0.8 × CSS
Soft-Start time tSS =
, if CSS capacitor
ISS
is 0.1μF, then soft-start time =
0.8 × 0.1μ
≒ 13.5ms
6μ
Chip Enable Operation
VOUT = VREF ⎛⎜ 1+ R1 ⎞⎟
⎝ R2 ⎠
Where VREF is the reference voltage (0.8V typ.).
External Bootstrap Diode
Connect a 0.1μF low ESR ceramic capacitor between the
BOOT pin and SW pin. This capacitor provides the gate
driver voltage for the high side MOSFET.
It is recommended to add an external bootstrap diode
between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such as IN4148 or BAT54. The external 5V
can be a 5V fixed input from system or a 5V output of the
RT7256B. Note that the external boot voltage must be
lower than 5.5V
5V
BOOT
RT7256B
0.1µF
SW
Figure 2. External Bootstrap Diode
The EN pin is the chip enable input. Pulling the EN pin
low (<0.4V) will shut down the device. During shutdown
mode, the RT7256B quiescent current drops to lower than
3μA. Driving the EN pin high (>2.7V, 17V) will turn on the
device again. For external timing control, the EN pin can
also be externally pulled high by adding a REN resistor
and CEN capacitor from the VIN pin (see Figure 3).
EN
VIN
REN
EN
RT7256B
CEN
GND
Figure 3. Enable Timing Control
An external MOSFET can be added to implement digital
control on the EN pin when no system voltage above 2.5V
is available, as shown in Figure 4. In this case, a 100kΩ
pull-up resistor, REN, is connected between VIN and the
EN pin. MOSFET Q1 will be under logic control to pull
down the EN pin.
VIN
EN
REN
100k
EN
Q1
RT7256B
GND
Figure 4. Digital Enable Control Circuit
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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February 2012
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RT7256B
Under Voltage Protection
Over Temperature Protection
Hiccup Mode
For the RT7256BH, it provides Hiccup Mode Under Voltage
Protection (UVP). When the VFB voltage drops below 0.4V,
the UVP function will be triggered to shut down switching
operation. If the UVP condition remains for a period, the
RT7256BH will retry automatically. When the UVP
condition is removed, the converter will resume operation.
The UVP is disabled during soft-start period.
Hiccup Mode
The RT7256B features an Over Temperature Protection
(OTP) circuitry to prevent from overheating due to
excessive power dissipation. The OTP will shut down
switching operation when junction temperature exceeds
150°C. Once the junction temperature cools down by
approximately 20°C, the converter will resume operation.
To maintain continuous operation, the maximum junction
temperature should be lower than 125°C.
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
V
V
ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥
f
×
L
VIN ⎦
⎣
⎦ ⎣
VOUT
(2V/Div)
ILX
(2A/Div)
IOUT = Short
Time (50ms/Div)
Figure 5. Hiccup Mode Under Voltage Protection
Latch-Off Mode
For the RT7256BL, it provides Latch-Off Mode Under
Voltage Protection (UVP). When the FB voltage drops
below half of the feedback reference voltage, VFB, UVP
will be triggered and the RT7256BL will shut down in LatchOff Mode. In shutdown condition, the RT7256BL can be
reset by EN pin or power input VIN.
Latch-Off Mode
VOUT
(2V/Div)
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
the highest efficiency operation. However, it requires a
large inductor to achieve this goal.
For the ripple current selection, the value of ΔIL = 0.24(IMAX)
will be a reasonable starting point. The largest ripple
current occurs at the highest VIN. To guarantee that the
ripple current stays below the specified maximum, the
inductor value should be chosen according to the following
equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L =⎢
⎥ × ⎢1 − VIN(MAX) ⎥
f
I
×
Δ
L(MAX)
⎣
⎦ ⎣
⎦
The inductor's current rating (caused a 40°C temperature
rising from 25°C ambient) should be greater than the
maximum load current and its saturation current should
be greater than the short circuit peak current limit. Please
see Table 2 for the inductor selection reference.
ILX
(2A/Div)
IOUT = Short
Time (250μs/Div)
Figure 6. Latch-Off Mode Under Voltage Protection
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RT7256B
Table 2. Suggested Inductors for Typical
Application Circuit
Component
Supplier
Series
Dimensions
(mm)
TDK
VLF10045
10 x 9.7 x 4.5
TDK
TAIYO
YUDEN
TAIYO
YUDEN
SLF12565
12.5 x 12.5 x 6.5
NR8040
8x8x4
NRS8040
8x8x4
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the high side MOSFET.
To prevent large ripple current, a low ESR input capacitor
sized for the maximum RMS current should be used. The
approximate RMS current equation is given :
V
IRMS = IOUT(MAX) OUT
VIN
VIN
−1
VOUT
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor, two 10μF low ESR ceramic
capacitors are suggested. For the suggested capacitor,
please refer to table 3 for more details.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
The output ripple, ΔVOUT , is determined by :
1
⎤
ΔVOUT ≤ ΔIL ⎡⎢ESR +
8fCOUT ⎦⎥
⎣
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The output ripple will be the highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR value.
However, it provides lower capacitance density than other
types. Although Tantalum capacitors have the highest
capacitance density, it is important to only use types that
pass the surge test for use in switching power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR. However, it can be used in cost-sensitive applications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
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RT7256B
For continuous operation, do not exceed the maximum
operation junction temperature 125°C. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
PD(MAX) = (TJ(MAX) − TA ) / θJA
Where T J(MAX) is the maximum operation junction
temperature , TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT7256B, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance θJA is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance θJA is 75°C/W on the standard JEDEC
51-7 four-layers thermal test board. The maximum power
dissipation at TA = 25°C can be calculated by following
formula :
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT7256B packages, the Figure 8 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation allowed.
2.2
Four-Layer PCB
2.0
Power Dissipation (W)
Thermal Considerations
1.8
Copper Area
70mm2
50mm2
30mm2
10mm2
Min.Layout
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 8. Derating Curves for RT7256B Package
P D(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W
(min.copper area PCB layout)
P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W
(70mm2copper area PCB layout)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to
increase thermal performance by the PCB layout copper
design. The thermal resistance θJA can be decreased by
adding copper area under the exposed pad of SOP-8
(Exposed Pad) package.
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
As shown in Figure 7, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard
SOP-8 (Exposed Pad) pad (Figure 7.a), θJA is 75°C/W.
Adding copper area of pad under the SOP-8 (Exposed
Pad) (Figure 7.b) reduces the θJA to 64°C/W. Even further,
increasing the copper area of pad to 70mm2 (Figure 7.e)
reduces the θJA to 49°C/W.
(b) Copper Area = 10mm2, θJA = 64°C/W
The maximum power dissipation depends on operating
(c) Copper Area = 30mm2 , θJA = 54°C/W
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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12
is a registered trademark of Richtek Technology Corporation.
DS7256B-00
February 2012
RT7256B
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of the RT7256B.
(d) Copper Area = 50mm2 , θJA = 51°C/W
`
Keep the traces of the main current paths as short and
wide as possible.
`
Put the input capacitor as close as possible to the device
pins (VIN and GND).
`
SW node is with high frequency voltage swing and
should be kept at small area. Keep analog components
away from the SW node to prevent stray capacitive
noise pick-up.
`
An example of PCB layout guide is shown in Figure 9
for reference.
(e) Copper Area = 70mm2 , θJA = 49°C/W
Figure 7. Thermal Resistance vs. Copper Area Layout
Design
VIN
GND
Input capacitor must
be placed as close
to the IC as possible.
VOUT
SW
GND
CBOOT
CSS
CIN
BOOT
L
VIN
2
SW
3
GND
4
GND
8
SS
7
EN
6
NC
5
FB
9
REN VIN
R1
R2
VOUT
COUT
GND
SW node is with high frequency voltage swing and should
be kept at small area. Keep analog components away from
the SW node to prevent stray capacitive noise pick-up
Figure 9. PCB Layout Guide
Table 3. Suggested Capacitors for CIN and COUT
Location
Component Supplier
Part No.
Capacitance (μF)
Case Size
CIN
MURATA
GRM31CR61E106K
10
1206
CIN
TDK
C3225X5R1E106K
10
1206
CIN
TAIYO YUDEN
TMK316BJ106ML
10
1206
COUT
MURATA
GRM31CR60J476M
47
1206
COUT
TDK
C3225X5R0J476M
47
1210
COUT
MURATA
GRM32ER71C226M
22
1210
COUT
TDK
C3225X5R1C22M
22
1210
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS7256B-00
February 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT7256B
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
www.richtek.com
14
DS7256B-00
February 2012