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RT8056
Dual 1A 1.5MHz Synchronous Step-Down Converters
General Description
Features
The RT8056 is a high efficiency synchronous dual stepdown converter. Capable of delivering two independent 1A
output current over a wide input voltage range from 2.8V
to 5.5V. The RT8056 is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources such as cellular
phones, PDAs and hand-held devices. The RT8056
provides two operation modes including PWM/LowDropout auto switch and shutdown modes. The internal
synchronous rectifier with low RDS(ON) dramatically reduces
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2.8V to 5.5V Input Voltage Range
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1.5MHz Fixed Frequency PWM Operation
2 x 1A Output Current
Up to 95% Efficiency
No Schottky Diode Required
0.6V Reference Allows for Low Output Voltage
Low Dropout Operation : 100% Duty Cycle
Small 10-Lead WDFN Package
RoHS Compliant and Halogen Free
conduction loss at PWM mode. No external Schottky
diode is required in practical applications. The RT8056
enters Low-Dropout mode when normal PWM cannot
provide regulated output voltage by continuously turning
on the upper P-MOSFET. The RT8056 enters shut-down
mode and consumes less than 0.1μA when EN pin is
pulled low. The switching ripple is easily smoothed-out
by small package filtering elements due to a fixed
operating frequency of 1.5MHz.
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Applications
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Portable Instruments
Microprocessors and DSP Core Supplies
Cellular Phones
Wireless and DSL Modems
PC Cards
Set Top Box
Pin Configurations
Ordering Information
RT8056
Package Type
QW : WDFN-10L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
FB2
NC
VIN
NC
FB1
1
2
3
4
5
GND
(TOP VIEW)
11
10
9
8
7
6
LX2
EN2
GND
EN1
LX1
WDFN-10L 3x3
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
JM= : Product Code
JM=YM
DNN
YMDNN : Date Code
DS8056-02 April 2011
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1
RT8056
Typical Application Circuit
VIN
2.8V to 5.5V
3
LX1
6
L1
2.2µH
VOUT1
VIN
CIN
10µF
FB1
R1
5
LX2 10
L2
2.2µH
7 EN1
Chip Enable
9
EN2
VOUT2
R2
RT8056
R3
FB2
1
8,
GND 11 (Exposed Pad)
COUT2
22µF
⎛ R1 ⎞
⎟
⎝ R2 ⎠
⎛ R3 ⎞
= 0.6V x ⎜ 1 +
⎟
⎝ R4 ⎠
VOUT1 = 0.6V x ⎜ 1 +
COUT1
22µF
VOUT2
R4
Function Pin Description
Pin No.
Pin Name
Pin Function
1
FB2
Feedback Input of Channel 2.
2, 4
NC
No Internal Connection.
3
VIN
Power Supply Input of Channel 1 & Channel 2.
5
FB1
Feedback Input of Channel 1.
6
LX1
Switching Node of Channel 1.
7
EN1
Chip Enable of Channel 1 (Active High).
8,
GND
11 (Exposed Pad)
Ground. The Exposed Pad must be soldered to a large PCB and connected to GND
for maximum power dissipation.
9
EN2
Chip Enable of Channel 2 (Active High).
10
LX2
Switching Node of Channel 2.
Function Block Diagram
EN1/EN2
VIN
RS1
OSC &
Shutdown
Control
Current
Limit
Detector
Slope
Compensation
Current
Sense
FB1/FB2
Error
Amplifier
RC
Control
Logic
Driver
LX1/LX2
PWM
Comparator
COMP
UVLO &
Power Good
Detector
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2
RS2
VREF
GND
DS8056-02 April 2011
RT8056
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------------------------------------------- −0.3V to 6.5V
LX1, LX2 Pin Voltages ----------------------------------------------------------------------------------------------- −0.3V to (VIN+0.3V)
Other I/O Pin Voltages ---------------------------------------------------------------------------------------------- −0.3V to 6.5V
Power Dissipation, PD @ TA = 25°C
WDFN-10L 3x3 -------------------------------------------------------------------------------------------------------- 1.429W
Package Thermal Resistance (Note 2)
WDFN-10L 3x3, θJA -------------------------------------------------------------------------------------------------- 70°C/W
WDFN-10L 3x3, θJC -------------------------------------------------------------------------------------------------- 8.2°C/W
Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------- 260°C
Junction Temperature ------------------------------------------------------------------------------------------------ 150°C
Storage Temperature Range --------------------------------------------------------------------------------------- −65°C to 150°C
ESD Susceptibility (Note 3)
HBM --------------------------------------------------------------------------------------------------------------------- 2kV
MM ----------------------------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
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(Note 4)
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------- 2.8V to 5.5V
Junction Temperature Range --------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range --------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, TA = 25°C unless otherwise specified)
Parameter
Symbol
Quiescent Current
IQ
Feedback Reference Voltage
VREF
Under Voltage Lockout Threshold
VUVLOH
Shutdown Current
ISHDN
Test Conditions
Min
Typ
Max
Unit
--
300
--
μA
0.588
0.6
0.612
V
V IN Rising
--
2.1
--
V
Hysteresis
--
0.18
--
V
--
0.1
1
μA
1.2
1.5
1.8
MHz
Switching Frequency
Logic High
VIH
1.5
--
V IN
V
Logic Low
VIL
--
--
0.4
V
V IN = 2.8V to 5.5V
1.1
1.5
--
A
Output Voltage Line Regulation
V IN = 2.8V to 5.5V
--
0.04
0.4
%V
Output Voltage Load Regulation
0mA < ILOAD < 1A
--
1
--
%
ENx Threshold
Voltage
Peak Current Limit
ILIM
(Note5)
Switch On-Resistance, High
RDS(ON)_H
ISW = 0.2A
--
280
--
mΩ
Switch On Resistance, Low
RDS(ON)_L
ISW = 0.2A
--
290
--
mΩ
Thermal Shutdown Temperature
TSD
--
138
--
°C
--
18
--
°C
Thermal Shutdown Hysteresis
DS8056-02 April 2011
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RT8056
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC
51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guaranteed by Design.
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DS8056-02 April 2011
RT8056
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
90
80
VIN = 3.3V
VIN = 5V
VIN = 5.5V
70
60
Efficincy (%)
Efficincy (%)
80
50
40
30
VIN = 3.3V
VIN = 5V
VIN = 5.5V
70
60
50
40
30
20
20
10
10
VOUT = 1.2V
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
VOUT = 2.5V
0
1
0
0.1
0.2
Output Voltage vs. Output Current
0.5
0.6
0.7
0.8
0.9
1
Output Voltage vs. Output Current
1.220
2.57
1.215
2.56
1.210
Output Voltage (V)
Output Voltage (V)
0.4
Output Current (A)
Output Current (A)
1.205
1.200
VIN = 5.5V
VIN = 5V
VIN = 3.3V
1.195
1.190
2.55
2.54
VIN = 5.5V
VIN = 5V
VIN = 3.3V
2.53
2.52
1.185
VOUT = 1.2V
1.180
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
VOUT = 2.5V
2.51
1.0
0
0.1
0.2
Output Current (A)
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Output Current (A)
Current Limit vs. Input Voltage
Frequency vs. Temperature
1.70
2.10
1.60
1.75
Peak Current Limit (A)
Frequency (MHz)1
0.3
1.50
1.40
1.30
VOUT = 1.2V
1.40
VOUT = 2.5V
1.05
0.70
0.35
1.20
VIN = 5V, VOUT = 1.2V, IOUT = 0.3A
1.10
-50
-25
0
25
50
Temperature (°C)
DS8056-02 April 2011
75
100
125
VIN = 2.8V to 5.5V
0.00
2.8
3.1
3.4
3.7
4.0
4.3
4.6
4.9
5.2
5.5
Input Voltage (V)
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RT8056
Output Voltage vs. Input Voltage
Current Limit vs. Temperature
1.300
1.275
1.75
VOUT = 1.2V
1.40
Output Voltage (V)
Output Current Limit (A)
2.10
VOUT = 2.5V
1.05
0.70
0.35
1.250
1.225
IOUT = 0.1A
1.200
IOUT = 1A
1.175
1.150
1.125
VIN = 2.8V to 5.5V, VOUT = 1.2V
VIN = 5V
0.00
1.100
-50
-25
0
25
50
75
100
125
2.8
3.1
3.4
3.7
Temperature (°C)
4.3
4.6
4.9
5.2
5.5
Input Voltage (V)
Output Voltage vs. Temperature
Reference Voltage vs. Temperature
1.22
0.620
0.615
1.21
0.610
Output Voltage (V)
Reference Voltage (V)
4.0
0.605
0.600
0.595
0.590
1.20
1.19
1.18
1.17
0.585
VIN = 5V, IOUT = 0.3A
0.580
-50
-25
0
25
50
75
100
125
VIN = 5V, VOUT = 1.2V, IOUT = 0.3A
1.16
-50
0
25
50
75
Temperature (°C)
Temperature (°C)
Output Ripple
Output Ripple
VOUT1
(5mV/Div)
VOUT2
(5mV/Div)
VLX1
(5V/Div)
VLX2
(5V/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 1A
Time (250ns/Div)
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-25
100
125
VIN = 5V, VOUT = 2.5V, IOUT = 1A
Time (250ns/Div)
DS8056-02 April 2011
RT8056
Load Transient Response
Load Transient Response
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
VIN = 5V, VOUT = 1.2V, IOUT = 50mA to 1000mA
VIN = 5V, VOUT = 2.5V, IOUT = 50mA to 1000mA
Time (100μs/Div)
Time (100μs/Div)
Power On from EN
VIN OVP Threshold vs. Temperature
6.00
VIN = 5V
5.95
Input Voltage (V)
EN
(5V/Div)
VOUT1
(1V/Div)
VOUT2
(2V/Div)
I IN
(1A/Div)
5.90
5.85
5.80
5.75
5.70
5.65
VOUT1 = 1.2V, VOUT2 = 2.5V, IOUT1 = IOUT2 = 1A
5.60
-50
Time (250μs/Div)
-25
0
25
50
75
100
125
Temperature (°C)
EN Threshold vs. Temperature
VIN UVLO Threshold vs. Temperature
1.5
2.8
1.4
Enable Voltage Threshold (V)
3.0
Input Voltage (V)1
2.6
Rising
2.4
2.2
2.0
Falling
1.8
1.6
1.4
1.2
1.0
1.3
Rising
1.2
1.1
1.0
Falling
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
Temperature (°C)
DS8056-02 April 2011
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
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RT8056
Applications Information
The basic RT8056 application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency,
followed by CIN and COUT.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current, ΔIL, increases with higher VIN and decreases
with higher inductance.
⎡V
⎤ ⎡ V
⎤
ΔIL = ⎢ OUT ⎥ × ⎢1 − OUT ⎥
f
L
×
V
IN ⎦
⎣
⎦ ⎣
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with
small ripple current. This, however, requires a large
inductor.
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays below
a specified maximum, the inductor value should be chosen
according to the following equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L=⎢
× ⎢1 −
⎥
⎥
⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low-cost powdered iron cores,
thus forcing the use of more expensive ferrite or permalloy
cores. Actual core loss is independent of core size for a
fixed inductor value, but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. However, increased inductance requires
more turns of wire and therefore, results in higher copper
losses.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and saturation prevention.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design current
is exceeded.
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8
This results in an abrupt increase in inductor ripple current
and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don't radiate energy, but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which kind of inductor to
use mainly depends on the price vs. size requirements
and any radiated field/EMI requirements.
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the trapezoidal
current at the source of the top MOSFET. To prevent large
ripple voltage, a low ESR input capacitor sized for the
maximum RMS current should be used. RMS current is
given by :
V
VIN
IRMS = IOUT(MAX) OUT
−1
VIN
VOUT
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT /2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often only based
on 2000 hours of life-time which makes it advisable to
further de-rate the capacitor, or choose a capacitor rated
at a higher temperature than required. Several capacitors
may also be paralleled to meet size or height requirements
in the design.
The selection of COUT is determined by the Effective Series
Resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, ΔVOUT, is
determined by :
⎡
1 ⎤
ΔVOUT ≤ ΔIL ⎢ESR +
8fCOUT ⎥⎦
⎣
The output ripple is highest at maximum input voltage since
ΔIL increases with input voltage. Multiple capacitors placed
in parallel may be needed to meet the ESR and RMS
current handling requirements. Dry tantalum, special
DS8056-02 April 2011
RT8056
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR, but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density, but it is important to only use
types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR, but can be used in cost-sensitive
applications, provided that consideration is given to ripple
current ratings and long-term reliability. Ceramic capacitors
have excellent low ESR characteristics, but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush of
current through the long wires can potentially cause a
voltage spike at VIN large enough to damage the part.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
Where TJ(MAX) is the maximum junction temperature, TA
is the ambient temperature, and θJA is the junction to
ambient thermal resistance.
For recommended operating condition specifications of
RT8056, the maximum junction temperature is 125°C and
TA is the ambient temperature. The junction to ambient
thermal resistance, θ JA , is layout dependent. For
WDFN-10L 3x3 packages, the thermal resistance, θJA, is
70°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for
WDFN-10L 3x3 package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For RT8056 package, the derating curve
in Figure 2 allows the designer to see the effect of rising
ambient temperature on the maximum power dissipation.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
VOUT
R1
FB
RT8056
R2
GND
Figure 1. Setting the Output Voltage
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
VOUT = VREF x (1+ R1/R2)
Maximum Power Dissipation (W)
1.60
Four-Layer PCB
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 2. Derating Curve for RT8056 Package
where VREF is the internal reference voltage (0.6V typical)
DS8056-02 April 2011
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9
RT8056
Layout Consideration
Follow the PCB layout guidelines for optimal performance of RT8056.
`
For the main current path, keep their traces short and wide.
`
Put the input capacitor as close as possible to the device pins (VIN and GND).
`
LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX
node to prevent stray capacitive noise pick-up.
`
Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components
near the RT8056.
` Connect all analog grounds to a command node and then connect the command node to the power ground behind the
output capacitors.
VOUT2
Connect the FB pin directly to
feedback resistors. The resistor
R3
divider must be connected
R4
between VOUT and GND
The CIN between
VIN and GND must
be as close as
possible to the IC.
L2
1
2
3
4
5
GND
CIN
FB2
NC
VIN
NC
FB1
COUT2
The trace for L1 and L2
must be wide and short.
Keep sensitive
VOUT2 compontents away from
this trace.
11
10
9
8
7
6
LX2
EN2
GND
EN1
LX1
L1
R1
GND
R2
VOUT1
COUT1
VOUT1
Figure 3. PCB Layout Guide
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DS8056-02 April 2011
RT8056
Outline Dimension
D2
D
L
E
E2
1
e
SEE DETAIL A
b
2
1
2
1
A
A1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
2.300
2.650
0.091
0.104
E
2.950
3.050
0.116
0.120
E2
1.500
1.750
0.059
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 10L DFN 3x3 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8056-02 April 2011
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