TLE8250G High Speed CAN-Transceiver Data Sheet Rev. 1.1, 2014-10-09 Automotive Power TLE8250G Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 4.4 4.5 4.6 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . High Speed CAN Physical Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Normal Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receive-Only Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stand-By Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 5.4 5.5 Fail Safe Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Logic Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TxD Time-Out function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Under-Voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over-Temperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 10 10 10 11 6 6.1 6.2 6.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 13 13 7 7.1 7.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Functional Device Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 8.1 8.2 8.3 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Characteristics of the RxD Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Data Sheet 2 6 6 8 9 9 9 9 19 19 20 21 Rev. 1.1, 2014-10-09 High Speed CAN-Transceiver 1 TLE8250G Overview Features • • • • • • • • • • • • • Fully compatible to ISO 11898-2 Wide common mode range for electromagnetic immunity (EMI) Very low electromagnetic emission (EME) Excellent ESD robustness Extended supply range at VCC CAN Short-Circuit-proof to ground, battery and VCC TxD time-out function Low CAN bus leakage current in Power Down mode Over temperature protection Protected against automotive transients CAN data transmission rate up to 1 MBit/s Green Product (RoHS compliant) AEC Qualified PG-DSO-8 Description The TLE8250G is a transceiver designed for CAN networks in automotive and industrial applications. As an interface between the physical bus layer and the CAN protocol controller, the TLE8250G drives the signals to the bus and protects the microcontroller against disturbances coming from the network. Based on the high symmetry of the CANH and CANL signals, the TLE8250G provides a very low level of electromagnetic emission (EME) within a broad frequency range. The TLE8250G is integrated in a RoHS complaint PG-DSO-8 package and fulfills or exceeds the requirements of the ISO11898-2. As a successor to the first generation of HS CAN transceivers, the TLE8250G is fully pin and function compatible to his predecessor model the TLE6250G. The TLE8250G is optimized to provide an excellent passive behavior in Power Down mode. This feature makes the TLE8250G extremely suitable for mixed supply HS CAN networks. Based on the Infineon Smart Power Technology SPT®, the TLE8250G provides industry leading ESD robustness together with a very high electromagnetic immunity (EMI). The Infineon Smart Power Technology SPT® allows bipolar and CMOS control circuitry in accordance with DMOS power devices to exist on the same monolithic circuit. The TLE8250G and the Infineon SPT® technology are AEC qualified and tailored to withstand the harsh conditions of the Automotive Environment. Three different operation modes, additional Fail Safe features like a TxD time-out and the optimized output slew rates on the CANH and CANL signals are making the TLE8250G the ideal choice for large CAN networks with high data rates. Type Package Marking TLE8250G PG-DSO-8 8250G Data Sheet 3 Rev. 1.1, 2014-10-09 TLE8250G Block Diagram 2 Block Diagram 3 Output Driver Stage 7 CANL 1 Driver CANH Output Stage 6 VCC TxD TempProtection Timeout Mode Control 8 5 NEN NRM VCC/2 Receive Unit = Receiver * GND Figure 1 2 4 RxD Block Diagram Note: In comparison to the TLE6250G the pin 8 (INH) was renamed to the term NEN, the function remains unchanged. NEN stands for Not ENable. The naming of the pin 5 changed from RM (TLE6250G) to NRM on the TLE8250G. The function of pin 5 remains unchanged. Data Sheet 4 Rev. 1.1, 2014-10-09 TLE8250G Pin Configuration 3 Pin Configuration 3.1 Pin Assignment TxD 1 8 NEN GND 2 7 CANH VCC 3 6 CANL RxD 4 5 NRM Figure 2 Pin Configuration 3.2 Pin Definitions and Functions Table 1 Pin Definition and Functions Pin Symbol Function 1 TxD Transmit Data Input; internal pull-up to VCC, “Low” for “Dominant” state. 2 GND Ground 3 VCC Transceiver Supply Voltage; 100 nF decoupling capacitor to GND required. 4 RxD Receive Data Output; “Low” in “Dominant” state. 5 NRM Receive-Only Mode input1); Control input for selecting the Receive-Only mode, internal pull-up to VCC, “Low” to select the Receive-Only mode. 6 CANL CAN Bus Low level I/O; “Low “ in “Dominant” state. 7 CANH CAN Bus High level I/O; “High “ in “Dominant” state. 8 NEN Not ENable Input1); internal pull-up to VCC, “Low” to select Normal Operation mode or Receive-Only mode. 1) The naming of pin 8 and pin 5 are different between the TLE8250G and its forerunner model the TLE6250G. The function of pin 8 and pin 5 remains the same. Data Sheet 5 Rev. 1.1, 2014-10-09 TLE8250G Functional Description 4 Functional Description CAN is a serial bus system that connects microcontrollers, sensor and actuators for real-time control applications. The usage of the Control Area Network (abbreviated CAN) within road vehicles is described by the international standard ISO 11898. According to the 7 layer OSI reference model the physical layer of a CAN bus system specifies the data transmission from one CAN node to all other available CAN nodes inside the network. The physical layer specification of a CAN bus system includes all electrical and mechanical specifications of a CAN network. The CAN transceiver is part of the physical layer specification. Several different physical layer definitions of a CAN network have been developed over the last years. The TLE8250G is a High Speed CAN transceiver without any dedicated Wake-Up function. High Speed CAN Transceivers without Wake-Up function are defined by the international standard ISO 11898-2. 4.1 High Speed CAN Physical Layer TxD VCC t CAN_H CAN_L VCC = CAN Power Supply = Input from the Microcontroller RxD = Output to the Microcontroller CANH = Voltage on the CANH Input/Output CANL = Voltage on the CANL Input/Output Differential Voltage VDIFF = between CANH and CANL VDIFF = VCANH – VCANL VCC TxD t VDIFF Dominant VDIFF = ISO Level Dominant VDIFF = ISO Level Recessive Recessive t RxD VCC t Figure 3 Data Sheet High Speed CAN Bus Signals and Logic Signals 6 Rev. 1.1, 2014-10-09 TLE8250G Functional Description The TLE8250G is a High Speed CAN transceiver, operating as an interface between the CAN controller and the physical bus medium. A HS CAN network is a two wire, differential network which allows data transmission rates up to 1 MBit/s. Characteristic for a HS CAN network are the two signal states on the CAN bus: “Dominant” and “Recessive” (see Figure 3). The pins CANH and CANL are the interface to the CAN bus and both pins operate as an input and as an output. The pins RxD and TxD are the interface to the microcontroller. The pin TxD is the serial data input from the CAN controller, the pin RxD is the serial data output to the CAN controller. As shown in Figure 1, the HS CAN transceiver TLE8250G has a receive and a transmit unit, allowing the transceiver to send data to the bus medium and monitor the data from the bus medium at the same time. The HS CAN transceiver TLE8250G converts the serial data stream available on the transmit data input TxD, into a differential output signal on CAN bus, provided by the pins CANH and CANL. The receiver stage of the TLE8250G monitors the data on the CAN bus and converts them to a serial, single ended signal on the RxD output pin. A logical “Low” signal on the TxD pin creates a “Dominant” signal on the CAN bus, followed by a logical “Low” signal on the RxD pin (see Figure 3). The feature, broadcasting data to the CAN bus and listening to the data traffic on the CAN bus simultaneous is essential to support the bit to bit arbitration inside CAN networks. The voltage levels for HS CAN transceivers are defined by the ISO 11898-2 and the ISO 11898-5 standards. If a data bit is “Dominant” or “Recessive” depends on the voltage difference between pins CANH and CANL: VDIFF = VCANH - VCANL. In comparison to other differential network protocols the differential signal on a CAN network can only be larger or equal to 0 V. To transmit a “Dominant” signal to the CAN bus the differential signal VDIFF is larger or equal to 1.5 V. To receive a “Recessive” signal from the CAN bus the differential VDIFF is smaller or equal to 0.5 V. Partially supplied CAN networks are networks where the CAN bus participants have different power supply conditions. Some nodes are connected to the power supply, some other nodes are disconnected from the power supply. Regardless, if the CAN bus participant is supplied or not supplied, each participant connected to the common bus media must not disturb the communication. The TLE8250G is designed to support partially supplied networks. In Power Down mode, the receiver input resistors are switched off and the transceiver input is high resistive. Data Sheet 7 Rev. 1.1, 2014-10-09 TLE8250G Functional Description 4.2 Operation Modes Three different operation modes are available on TLE8250G. Each mode with specific characteristics in terms of quiescent current or data transmission. For the mode selection the digital input pins NEN and NRM are used. Figure 4 illustrates the different mode changes depending on the status of the NEN and NRM pins. After suppling VCC to the HS CAN transceiver, the TLE8250G starts in Stand-By mode. The internal pull-up resistors are setting the TLE8250G to Stand-By per default. If the microcontroller is up and running the TLE8250G can change to any operation mode within the time for mode change tMode. Undervoltage Detection on VCC Start – Up Supply VCC VCC < VCC(UV) Power Down Stand-By Mode NRM = 1 NEN = 0 NEN = 1 NRM = 0/1 NEN = 1 Normal Operation Mode NEN = 0 Figure 4 NRM = 1 NRM = 0 NEN = 0 NRM = 0/1 NRM = 0 NEN = 0 NRM = 1 NEN = 0 NRM = 0/1 NEN = 1 Receive-Only Mode NEN = 0 NRM = 0 Operation Modes The TLE8250G has 3 major operation modes: • • • Stand-By mode Normal Operation mode Receive-Only mode Table 2 Operating modes Mode NRM NEN Bus Bias Comments Normal Operation “High” “Low” VCC/2 Output driver stage is active. Receiver unit is active. Stand-By “Low” or “High” “High” Floating Output driver stage is disabled. Receiver unit is disabled. Receive-Only “Low” “Low” VCC/2 Output driver stage is disabled. Receiver unit is active. VCC off “Low” or “High” “Low” or “High” Floating Output driver stage is disabled. Receiver unit is disabled. Data Sheet 8 Rev. 1.1, 2014-10-09 TLE8250G Functional Description 4.3 Normal Operation Mode In Normal Operation mode the HS CAN transceiver TLE8250G sends the serial data stream on the TxD pin to the CAN bus while at the same time the data available on the CAN bus are monitored to the RxD pin. In Normal Operation mode all functions of the TLE8250G are active: • • • • The output driver stage is active and drives data from the TxD to the CAN bus. The receiver unit is active and provides the data from the CAN bus to the RxD pin. The bus basing is set to VCC/2. The under-voltage monitoring on the power supply VCC is active. To enter the Normal Operation mode set the pin NRM to logical “High” and the pin NEN to logical “Low” (see Table 2 or Figure 4). Both pins, the NEN pin and the NRM pin have internal pull-up resistors to the power-supply VCC. 4.4 Receive-Only Mode The Receive-Only mode can be used to test the connection of the bus medium. The TLE8250G can still receive data from the bus, but the output driver stage is disabled and therefore no data can be sent to the CAN bus. All other functions are active: • • • • The output driver stage is disabled and data which are available on the TxD pin are blocked and not send to the CAN bus. The receiver unit is active and provides the data from the CAN bus to the RxD output pin. The bus basing is set to VCC/2. The under-voltage monitoring on the power supply VCC is active. To enter the Receive-Only mode set the pin NRM to logical “Low” and the pin NEN to logical “Low” (see Table 2 or Figure 4). In case the Receive-Only mode will not be used, the NRM pin can be left open. 4.5 Stand-By Mode Stand-By mode is an idle mode of the TLE8250G with optimized power consumption. In Stand-By mode the TLE8250G can not send or receive any data. The output driver stage and the receiver unit are disabled. Both CAN bus pins, CANH and CANL are floating. • • • • The output driver stage is disabled. The receiver unit is disabled. The bus basing is floating. The under-voltage monitoring on the power supply VCC is active. To enter the Stand-By mode set the pin NEN to logical “High”, the logical state of the NRM pin has no influence for the mode selection (see Table 2 or Figure 4). Both pins the NEN and the NRM pin have an internal pull-up resistor to the power-supply VCC. If the Stand-By mode is not used in the application, the NEN pin needs to get connected to GND. In case the NRM pin is set to logical “Low” in Stand-By mode, the internal pull-up resistor causes an additional quiescent current from VCC to GND, therefore it is recommended to set the NRM pin to logical “High” in Stand-By mode or leave the pin open if the Receive-Only mode is not used in the application. 4.6 Power Down Mode Power Down mode means the TLE8250G is not supplied. In Power Down the differential input resistors of the receiver stage are switched off. The CANH and CANL bus interface of the TLE8250G acts as an high impedance input with a very small leakage current. The high ohmic input doesn’t influence the “Recessive” level of the CAN network and allows an optimized EME performance of the whole CAN network. Data Sheet 9 Rev. 1.1, 2014-10-09 TLE8250G Fail Safe Functions 5 Fail Safe Functions 5.1 Short circuit protection The CANH and CANL bus outputs are short-circuit-proof, either against GND or a positive supply voltage. A current limiting circuit protects the transceiver against damages. If the device is heating up due to a continuos short on CANH or CANL, the internal over-temperature protection switches off the bus transmitter. 5.2 Open Logic Pins All logic input pins have internal pull-up resistor to VCC. In case the VCC supply is activated and the logical pins are open or floating, the TLE8250G enters into the Stand-By mode per default. In Stand-By mode the output driver stage of the TLE8250G is disabled, the bus biasing is shut off and the HS CAN transceiver TLE8250G will not influence the data on the CAN bus. 5.3 TxD Time-Out function The TxD Time-out feature protects the CAN bus against permanent blocking in case the logical signal on the TxD pin is continuously “Low”. A continuous “Low” signal on the TxD pin can have it’s root cause in a locked-up microcontroller or in a short on the printed circuit board for example. In Normal Operation mode, a logical “Low” signal on the TxD pin for the time t > tTXD the TLE8250G activates the TxD Time-out and the TLE8250G disables the output driver stage (see Figure 5). The receive unit is still active and the data on the bus are monitored at the RxD output pin. t > tTxD TxD Time - Out CANH CANL TxD Time – Out released t TxD t RxD t Figure 5 TxD Time-Out function Figure 5 shows how the output driver stage is deactivated and activated again. A permanent “Low” signal on the TxD input pin activates the TxD time-out function and deactivates the output driver stage. To release the output driver stage after a TxD time-out event the TLE8250G requires a signal change on the TxD input pin from logical “Low” to logical “High”. 5.4 Under-Voltage detection The HS CAN Transceiver TLE8250G is equipped with an under-voltage detection on the power supply VCC. In case of an under-voltage event on VCC, the under-voltage detection changes the operation mode of TLE8250G to the Stand-By mode, regardless of the logical signal on the pins NEN and NRM (see Figure 6). If the transceiver TLE8250G recovers from the under-voltage event, the operation mode returns to the programmed mode by the logical pins NEN and NRM. Data Sheet 10 Rev. 1.1, 2014-10-09 TLE8250G Fail Safe Functions Supply voltage VCC Power down reset level VCC(UV) Time for mode change tMode Blanking time tblank,UV NEN = 0 NRM = 1 Normal Operation Mode Stand-By Mode Normal Operation Mode1) 1) Assuming the logical signal on the pin NEN and on the pin NRM keep its values during the under-voltage event. In this case NEN remains „Low“ and NRM remains „High“. Figure 6 Under-Voltage detection on VCC 5.5 Over-Temperature protection Overtemperature Event TJ Cool Down TJSD (Shut Off temperature) TJ (Shut On temperature) t CANH CANL t TxD t RxD t Figure 7 Over-Temperature protection The TLE8250G has an integrated over-temperature detection to protect the device against thermal overstress of the output driver stage. In case of an over-temperature event, the temperature sensor will disable the output driver stage (see Figure 1). After the device cools down the output driver stage is activated again (see Figure 7). Inside the temperature sensor a hysteresis is implemented. Data Sheet 11 Rev. 1.1, 2014-10-09 TLE8250G General Product Characteristics 6 General Product Characteristics 6.1 Absolute Maximum Ratings Table 3 Absolute Maximum Ratings Voltages, Currents and Temperatures1) All voltages with respect to ground; positive current flowing into pin; (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Max. Unit Remarks Voltages 6.1.1 Supply voltage VCC -0.3 6.0 V – 6.1.2 CANH DC voltage versus GND VCANH -40 40 V – 6.1.3 CANL DC voltage versus GND VCANL -40 40 V – 6.1.4 Differential voltage VCAN diff between CANH and CANL -40 40 V 6.1.5 Logic voltages at NEN, NRM, TxD, RxD VI -0.3 6.0 V – Temperatures 6.1.6 Junction temperature Tj -40 150 °C – 6.1.7 Storage temperature TS - 55 150 °C – ESD Resistivity 6.1.8 ESD Resistivity at CANH, CANL versus GND VESD -8 8 kV Human Body Model (100pF via 1.5 kΩ)2) 6.1.9 ESD Resistivity all other pins VESD -2 2 kV Human Body Model (100pF via 1.5 kΩ)2) 1) Not subject to production test, specified by design 2) ESD susceptibility HBM according to EIA / JESD 22-A 114 Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Data Sheet 12 Rev. 1.1, 2014-10-09 TLE8250G General Product Characteristics 6.2 Functional Range Table 4 Operating Range Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VCC 4.5 5.5 V – TJ -40 150 °C 1) Supply Voltages 6.2.1 Transceiver Supply Voltage Thermal Parameters 6.2.2 Junction temperature 1) Not subject to production test, specified by design Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 6.3 Thermal Characteristics Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Thermal Resistance1) Table 5 Pos. Parameter Symbol Limit Values Unit Remarks Min. Typ. Max. – 130 – K/W 2) 150 175 200 °C – – 10 – K – Thermal Resistance 6.3.1 Junction to Ambient1) RthJA Thermal Shutdown Junction Temperature 6.3.2 Thermal shutdown temp. TJSD 6.3.3 Thermal shutdown hysteresis ΔT 1) Not subject to production test, specified by design 2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The Product (TLE8250G) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Data Sheet 13 Rev. 1.1, 2014-10-09 TLE8250G Electrical Characteristics 7 Electrical Characteristics 7.1 Functional Device Characteristics Table 6 Electrical Characteristics 4.5 V < VCC < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Unit Remarks Min. Typ. Max. Current Consumption 7.1.1 Current consumption ICC – 6 10 mA “Recessive” state; VTxD = VCC 7.1.2 Current consumption ICC – 45 70 mA “Dominant” state; VTxD = 0 V 7.1.3 Current consumption ICC(ROM) – 6 10 mA Receive-Only mode NRM = “Low” 7.1.4 Current consumption ICC(STB) – 7 15 μA Stand-By mode; TxD = NRM = “High” VCC(UV) VCC(UV,H) 1.3 3.2 4.3 V – – 200 – mV 1) tblank(UV) – 15 – μs 1) Supply Resets VCC under-voltage monitor 7.1.6 VCC under-voltage monitor 7.1.5 hysteresis 7.1.7 VCC under-voltage blanking time Receiver Output: RxD 7.1.8 HIGH level output current IRD,H – -4 -2 mA VRxD = 0.8 × VCC VDIFF < 0.5 V 7.1.9 LOW level output current IRD,L 2 4 – mA VRxD = 0.2 × VCC VDIFF > 0.9 V 7.1.10 HIGH level input voltage threshold VTD,H – 0.5 × 0.7 × V “Recessive” state VCC VCC 7.1.11 LOW level input voltage threshold VTD,L 0.3 × 0.4 × – V “Dominant” state VCC VCC 7.1.12 TxD pull-up resistance RTD 10 25 50 kΩ – Transmission Input: TxD 7.1.13 TxD input hysteresis VHYS(TxD) – 200 – mV 1) 7.1.14 TxD permanent dominant disable time tTxD 0.3 – 1.0 ms – 7.1.15 HIGH level input voltage threshold VNEN,H – 0.5 × 0.7 × V Stand-By mode; VCC VCC 7.1.16 LOW level input voltage threshold VNEN,L 0.3 × 0.4 × – V Normal Operation mode; VCC VCC 7.1.17 NEN pull-up resistance RNEN 10 25 50 kΩ – mV 1) Not Enable Input NEN 7.1.18 NEN input hysteresis Data Sheet VHYS(NEN) – 200 14 – Rev. 1.1, 2014-10-09 TLE8250G Electrical Characteristics Table 6 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Unit Remarks Min. Typ. Max. 0.5 × 0.7 × VCC VCC Receive only Input NRM 7.1.19 HIGH level input voltage threshold VNRM,H – 7.1.20 LOW level input voltage threshold VNRM,L 0.3 × 0.4 × VCC VCC 7.1.21 NRM pull-up resistance RNRM 10 25 V Normal Operation mode – V Receive-Only mode 50 kΩ – VNRM(Hys) – 200 – mV 1) 7.1.23 Differential receiver threshold “Dominant” VDIFF,(D) – 0.75 0.9 V – 7.1.24 Differential receiver threshold “Recessive” VDIFF,(R) 0.5 0.6 – 7.1.25 Differential receiver input range - “Dominant” Vdiff,rdN 0.9 – 5.0 V – 7.1.26 Differential receiver input range - “Recessive” Vdiff,drN -1.0 – 0.5 V – 7.1.27 Common Mode Range CMR -12 – 12 V VCC = 5 V 7.1.28 Differential receiver hysteresis Vdiff,hys – 100 – mV 1) 7.1.29 CANH, CANL input resistance Ri 10 20 30 kΩ “Recessive” state 7.1.30 Differential input resistance 20 40 60 kΩ “Recessive” state “Recessive” state 7.1.22 NRM input hysteresis – Bus Receiver Rdiff – – 7.1.31 Input resistance deviation between CANH and CANL Δ Ri -3 – 3 % 1) 7.1.32 Input capacitance CANH, CANL versus GND CIN – 20 40 pF 1) VTxD = VCC 7.1.33 Differential input capacitance CInDiff – 10 20 pF 1) VTxD = VCC 7.1.34 CANL/CANH recessive output VCANL/H voltage 2.0 2.5 3.0 V VTxD = VCC; no load 7.1.35 CANH, CANL recessive output voltage difference -500 – 50 mV VTxD = VCC; no load 7.1.36 CANL dominant output voltage VCANL 0.5 – 2.25 V 4.75 V < VCC < 5.25 V, VTxD = 0 V, 50 Ω < RL < 65 Ω; 7.1.37 CANH dominant output voltage VCANH 2.75 – 4.5 V 4.75 V < VCC < 5.25 V, VTxD = 0 V, 50 Ω < RL < 65 Ω; 7.1.38 CANH, CANL dominant output Vdiff voltage difference Vdiff = VCANH - VCANL 1.5 – 3.0 V 4.75 V < VCC < 5.25 V, VTxD = 0 V. 50 Ω < RL < 65 Ω; 7.1.39 Driver Symmetry VSYM = VCANH + VCANL 4.5 – 5.5 V VTxD = 0 V; VCC = 5 V 50 Ω < RL < 65 Ω Bus Transmitter Data Sheet Vdiff VSYM 15 Rev. 1.1, 2014-10-09 TLE8250G Electrical Characteristics Table 6 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Unit Remarks Min. Typ. Max. 7.1.40 CANL short circuit current ICANLsc 50 100 200 mA 7.1.41 CANH short circuit current ICANHsc ICANHL,lk -200 -100 -50 mA -5 0 5 μA 7.1.42 Leakage current Data Sheet 16 VCANLshort = 18 V VCANHshort = 0 V VCC = 0 V; VCANH = VCANL; 0 V < VCANH,L < 5 V Rev. 1.1, 2014-10-09 TLE8250G Electrical Characteristics Table 6 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; RL = 60 Ω; -40°C < TJ < +150°C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Pos. Parameter Symbol Limit Values Unit Remarks Min. Typ. Max. td(L),TR – – 255 ns CL = 100 pF; VCC = 5 V; CRxD = 15 pF 7.1.44 Propagation delay td(H),TR TxD-to-RxD HIGH (“Dominant” to “Recessive”) – – 255 ns CL = 100 pF; VCC = 5 V; CRxD = 15 pF CL = 100 pF; VCC = 5 V; CRxD = 15 pF CL = 100 pF; VCC = 5 V; CRxD = 15 pF CL = 100 pF; VCC = 5 V; CRxD = 15 pF CL = 100 pF; VCC = 5 V; CRxD = 15 pF Dynamic CAN-Transceiver Characteristics 7.1.43 Propagation delay TxD-to-RxD LOW (“Recessive” to “Dominant”) 7.1.45 Propagation delay TxD LOW to bus “Dominant” td(L),T – 110 – ns 7.1.46 Propagation delay TxD HIGH to bus “Recessive” td(H),T – 110 – ns 7.1.47 Propagation delay bus “Dominant” to RxD “Low” td(L),R – 70 – ns 7.1.48 Propagation delay td(H),R bus “Recessive” to RxD “High” – 100 – ns – – 10 μs 7.1.49 Time for mode change tMode 1) 1) Not subject to production test specified by design Data Sheet 17 Rev. 1.1, 2014-10-09 TLE8250G Electrical Characteristics 7.2 Diagrams NRM 7 TxD CANH NEN CL 5 1 8 RL RxD 6 4 CRxD CANL GND VCC 3 100 nF 2 Figure 8 Simplified test circuit VTxD VCC GND VDIFF td(L),T 0,9V 0,5V td(L),R VRxD t td(H),T t td(H),R td(L),TR td(H),TR VCC 0.8 x VCC 0.2 x VCC GND t Figure 9 Data Sheet Timing diagram for dynamic characteristics 18 Rev. 1.1, 2014-10-09 TLE8250G Application Information 8 Application Information 8.1 Application Example VBAT I Q1 22 uF TLE4476D CANH CANL EN GND 100 nF Q2 3 VCC 22 uF 120 Ohm 100 nF TLE8250G 7 6 optional: common mode choke NEN CANH TxD RxD CANL NRM 8 1 4 5 VCC Out Out In Microcontroller e.g. XC22xx Out GND GND 2 I Q1 22 uF TLE4476D EN GND 100 nF Q2 3 VCC 22 uF 100 nF TLE8250G 7 6 NEN CANH TxD RxD CANL optional: common mode choke NRM 120 Ohm 8 1 4 5 VCC Out Out In Microcontroller e.g. XC22xx Out GND GND 2 CANH CANL example ECU design Figure 10 Data Sheet Simplified Application for the TLE8250G 19 Rev. 1.1, 2014-10-09 TLE8250G Application Information 8.2 Output Characteristics of the RxD Pin The RxD output pin is designed as a push-pull output stage (see Figure 1), meaning to produce a logical “Low” signal the TLE8250G switches the RxD output to GND. Vice versa to produce a logical “High” signal the TLE8250G switches the RxD output to VCC. The level VRxD,H for a logical “High” signal on the RxD output depends on the load on the RxD output pin and therefore on the RxD output current IRD,H. For a load against the GND potential, the current IRD,H is flowing out of the RxD output pin. Similar to the logical “High” signal, the level VRxD,L for a logical “Low” signal on the RxD output pin depends on the output current IRD,L. For a load against the power supply VCC the current IRD,L is flowing into the RxD output pin. Currents flowing into the device are marked positive inside the data sheet and currents flowing out of the device TLE8250G are marked negative inside the data sheet (see Table 6). 7,000 Output current [mA] 6,000 5,000 4,000 3,000 VRxD,H=4.6V; typical output current VCC=5V VRxD,H=4.6V; typical output current + 6sigma; VCC=5V VRxD,H=4.6V; typical output current - 6sigma; VCC=5V 2,000 1,000 0,000 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Temperature in °C Figure 11 RxD Output driver capability for a logical “High” signal1) The diagram in Figure 11 shows the output current capability of the RxD output pin depended on the chip temperature TJ. At a logical “High” signal VRxD,H = 4.6 V, the typical output current is between 5.7 mA for -40 °C and 4.7 mA for a temperature of +150 °C. The dependency of the output current on the temperature is almost linear. The upper curve “VRxD,H = 4.6 V; typical output current + 6 sigma; VCC=5 V” reflects the expected maximum value of the RxD output current of the TLE8250G. The lower curve “VRxD,H = 4.6 V; typical output current - 6 sigma; VCC=5 V” reflects the expected minimum value of the RxD output current of the TLE8250G. All simulations are based on a power supply VCC = 5.0 V. 1) Characteristics generated by simulation and specified by design. Production test criteria is described in Table 6; Pos.: 7.1.8 Data Sheet 20 Rev. 1.1, 2014-10-09 TLE8250G Application Information 6,000 Output Current [mA] 5,000 4,000 3,000 2,000 VRxD,L=0.4V; typical output current VCC=5V VRxD,L=0.4V; typical output current + 6sigma; VCC=5V VRxD,L=0.4V; typical output current - 6sigma; VCC=5V 1,000 0,000 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Temperature in °C Figure 12 RxD Output driver capability for a logical “Low” signal1) The diagram in Figure 12 shows the output current capability of the RxD output pin depended on the chip temperature TJ. At a logical “Low” signal VRxD,L = 0.4 V, the typical output current is between 5 mA for -40 °C and 3.5 mA for a temperature of +150 °C. The dependency of the output current on the temperature is almost linear. The upper curve “VRxD,L = 0.4 V; typical output current + 6 sigma; VCC=5 V” reflects the expected maximum value of the RxD output current of the TLE8250G. The lower curve “VRxD,L = 0.4 V; typical output current - 6 sigma; VCC=5 V” reflects the expected minimum value of the RxD output current of the TLE8250G. All simulations are based on a power supply VCC = 5.0 V. 8.3 • • • Further Application Information Please contact us for information regarding the FMEA pin. Existing App. Note (Title) For further information you may contact http://www.infineon.com/transceiver 1) Characteristics generated by simulation and specified by design. Production test criteria is described in Table 6; Pos.: 7.1.9 Data Sheet 21 Rev. 1.1, 2014-10-09 TLE8250G Package Outlines 9 Package Outlines 0.1 2) 0.41+0.1 -0.06 0.2 8 5 1 4 5 -0.2 1) M B 0.19 +0.06 C 8 MAX. 1.27 4 -0.21) 1.75 MAX. 0.175 ±0.07 (1.45) 0.35 x 45˚ 0.64 ±0.25 6 ±0.2 A B 8x 0.2 M C 8x A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01181 Figure 13 PG-DSO-8 (Plastic Dual Small Outline PG-DSO-8-16) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 22 Dimensions in mm Rev. 1.1, 2014-10-09 TLE8250G Revision History 10 Revision History Revision Date Changes 1.1 2014-09-26 Update from Data Sheet Rev. 1.02: • All pages: Revision and date updated. Spelling and grammar corrected. • Cover page: Logo and layout updated. • Page 3, Overview: Feature list updated (“Extended supply range at VCC“). • Page 13, Table 4, Parameter 6.2.1: Supply range updated (“4.5 V < VCC < 5.5 V”). • Page 14, Table 6: Table header updated (“4.5 V < VCC < 5.5 V”). • Page 15, Table 6, Parameter 7.1.31: New parameter added. • Page 15, Table 6, Parameter 7.1.32: New parameter added. • Page 15, Table 6, Parameter 7.1.33: New parameter added. • Page 15, Table 6, Parameter 7.1.36: Remark added (“4.75 V < VCC < 5.25 V”). • Page 15, Table 6, Parameter 7.1.37: Remark added (“4.75 V < VCC < 5.25 V”). • Page 15, Table 6, Parameter 7.1.38: Remark added (“4.75 V < VCC < 5.25 V”). • Page 19, Figure 10: Picture updated. • Page 20, Chapter 8.2: Description updated. • Page 20, Figure 11: Picture updated. • Page 21, Figure 12: Picture updated • Page 23: Revision history updated. 1.02 2013-07-01 Updated from Data Sheet Rev. 1.01: • Page 15, Parameter 7.1.23 Remark removed “normal-operating mode”. • Page 15, Parameter 7.1.24 Remark removed “normal-operating mode”. • Page 15, Parameter 7.1.25 Remark removed “normal-operating mode”. • Page 15, Parameter 7.1.26 Remark removed “normal-operating mode”. 1.01 2010-10-11 page 8, figure 4: Editorial change NEN=1 changed to NEN=0 1.0 2010-06-02 Data Sheet Created Data Sheet 23 Rev. 1.1, 2014-10-09 Edition 2014-10-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2006 Infineon Technologies AG All Rights Reserved. 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