3.3 V, ±15 kV ESD-Protected, Half- and Full-Duplex, RS-485/RS-422 Transceivers ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E TIA/EIA RS-485/RS-422 compliant ±15 kV ESD protection on RS-485 input/output pins Data rates ADM3483E/ADM3488E: 250 kbps ADM3486E: 2.5 Mbps ADM3490E/ADM3491E: 12 Mbps Half- and full-duplex options Up to 32 nodes on the bus Receiver open-circuit, fail-safe design Low power shutdown current (ADM3483E/ADM3486E/ADM3491E only) Outputs high-Z when disabled or powered off Common-mode input range: −7 V to +12 V Thermal shutdown and short-circuit protection Industry-standard 75176 pinout 8-lead and 14-lead narrow SOIC packages FUNCTIONAL BLOCK DIAGRAMS VCC ADM3483E/ ADM3486E RO R RE A DE B DI D 06284-001 FEATURES GND Figure 1. VCC ADM3488E/ ADM3490E R RO A B APPLICATIONS Z Y GND Figure 2. VCC GENERAL DESCRIPTION The ADM3483E/ADM3486E/ADM3488E/ADM3490E/ ADM3491E are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards RS485 and RS-422. The ADM3483E/ADM3486E are half-duplex transceivers that share differential lines and have separate enable inputs for the driver and receiver. The full-duplex ADM3488E/ ADM3490E/ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features separate enable inputs for the driver and receiver. D 06284-002 DI ADM3491E RO R A B RE DE DI D GND Z Y 06284-003 Power/energy metering Telecommunications EMI-sensitive systems Industrial control Local area networks Figure 3. The devices have a 12 kΩ receiver input impedance, which allows up to 32 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus. (continued on Page 3) Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 4 Driver Timing Specifications...................................................... 5 Receiver Timing Specifications .................................................. 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configurations and Function Descriptions ........................... 8 Test Circuits and Switching Characteristics.................................. 9 Devices Without Receiver/Driver Enable―ADM3488E/ ADM3490E ................................................................................. 14 Low Power Shutdown Mode—ADM3483E/ADM3486E / ADM3491E ................................................................................. 14 Driver Output Protection.......................................................... 14 Propagation Delay ...................................................................... 14 Line Length vs. Data Rate ......................................................... 14 ±15 kV ESD Protection ............................................................. 15 Human Body Model .................................................................. 15 Typical Applications................................................................... 15 Outline Dimensions ....................................................................... 18 Ordering Guide .......................................................................... 18 Typical Performance Characteristics ........................................... 11 Circuit Description......................................................................... 14 Devices with Receiver/Driver Enable—ADM3483E/ ADM3486E/ADM3491E ........................................................... 14 REVISION HISTORY 10/06—Rev. 0 to Rev. A Added ADM3483E and ADM3488E ...............................Universal Changes to Figure 1 and Figure 2................................................... 1 Inserted Table 3................................................................................. 5 Changes to Figure 4 and Figure 5................................................... 8 Inserted Figure 28 and Figure 29.................................................. 13 Changes to Figure 31 and Figure 32............................................. 16 Changes to Figure 34...................................................................... 17 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 18 8/06—Revision 0: Initial Version Rev. A | Page 2 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E GENERAL DESCRIPTION (continued from Page 1) The driver outputs of the ADM3483E/ADM3486E/ ADM3488E are slew rate limited, in order to reduce EMI and data errors caused by reflections from improperly terminated buses. The receiver has a fail-safe feature that ensures a logic high output when the inputs are floating. Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the industrial temperature range and are available in 8-lead and 14-lead narrow SOIC packages. Table 1. Selection Table Part No. ADM3483E ADM3486E ADM3488E ADM3490E ADM3491E Guaranteed Data Rate (Mbps) 0.25 2.5 0.25 12 12 Supply Voltage (V) 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 Half/Full Duplex Half Half Full Full Full Slew Rate Limited Yes Yes Yes No No Rev. A | Page 3 of 20 Driver/Receiver Enable Yes Yes No No Yes ±15 kV ESD Protection on Bus Pins Yes Yes Yes Yes Yes Pin Count 8 8 8 8 14 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E SPECIFICATIONS VCC = 3.3 V ± 0.3 V, TA = TMIN to TMAX, unless otherwise noted. Table 2. ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E Parameter DRIVER Differential Outputs Differential Output Voltage Symbol Min VOD 2.0 1.5 1.5 Δ|VOD| for Complementary Output States1 Common-Mode Output Voltage Δ|VOC| for Complementary Output States1 Short-Circuit Output Current ∆VOD VOC ∆VOC IOSD Output Leakage (Y, Z) (ADM3491E Only) Normal Mode IO Typ Max Unit Test Conditions/Comments 250 V V V V V V mA mA RL = 100 Ω (RS-422) (see Figure 7) RL = 54 Ω (RS-485) (see Figure 7) RL = 60 Ω (RS-485) (see Figure 8) RL = 54 Ω or 100 Ω (see Figure 7) RL = 54 Ω or 100 Ω (see Figure 7) RL = 54 Ω or 100 Ω (see Figure 7) VOUT = −7 V VOUT = 12 V 20 μA DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VOUT = 12 V DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VOUT = −7 V DE = 0 V, RE = VCC, VCC = 0 V or 3.6 V, VOUT = 12 V DE = 0 V, RE = VCC, VCC = 0 V or 3.6 V, VOUT = −7 V 0.2 3 0.2 −250 −20 μA Shutdown Mode 1 −1 Logic Inputs Input High Voltage Input Low Voltage Logic Input Current RECEIVER Differential Inputs Differential Input Threshold Voltage Input Hysteresis Input Resistance (A, B) Input Current (A, B) VIH VIL IIN1 2.0 VTH ∆VTH RIN IIN2 −0.2 μA V V μA DE, DI, RE DE, DI, RE DE, DI, RE V mV kΩ mA mA −7 V < VCM < +12 V VCM = 0 V −7 V < VCM < +12 V DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V DE = 0 V, VCC = 0 V or 3.6 V, VIN = −7 V 0.4 ±60 ±1 V V mA μA IOUT = −1.5 mA, VID = 200 mV (see Figure 9) IOUT = 2.5 mA, VID = 200 mV (see Figure 9) 0 V < VRO < VCC VCC = 3.6 V, 0 V < VOUT < VCC 1.1 3.6 2.2 V mA 0.95 1.9 mA 0.002 1 μA No load, DI = 0 V or VCC, DE = VCC, RE = 0 V or VCC No load, DI = 0 V or VCC, DE = 0 V, RE = 0 V DE = 0 V, RE = VCC, DI = 0 V or VCC kV kV Human body model Human body model 0.8 ±2 0.2 50 12 1.0 −0.8 RO Logic Output Output High Voltage Output Low Voltage Short-Circuit Output Current Tristate Output Leakage Current POWER SUPPLY Voltage Range Supply Current Shutdown Current ESD PROTECTION A, B, Y, Z Pins All Pins Except A, B, Y, Z Pins 1 VOH VOL IOSR IOZR VCC − 0.4 VCC ICC 3.0 ISHDN μA ±8 ±15 ±4 Δ|VOD| and Δ|VOC| are the changes in VOD and VOC, respectively, when DI input changes state. Rev. A | Page 4 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E DRIVER TIMING SPECIFICATIONS VCC = 3.3 V, TA = 25°C. Table 3. ADM3483E/ADM3488E Parameter MAXIMUM DATA RATE DIFFERENTIAL OUTPUT DELAY DIFFERENTIAL OUTPUT TRANSITION TIME PROPAGATION DELAY From Low to High Level From High to Low Level |tPLH − tPHL| PROPAGATION DELAY SKEW1 ENABLE/DISABLE TIMING (ADM3483E ONLY) Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level 1 Symbol tDD tTD tPLH tPHL tPDS Min 250 600 400 Typ Max Unit kbps ns ns Test Conditions/Comments 900 740 1400 1200 700 700 930 930 ±50 1500 1500 ns ns ns RL = 27 Ω (see Figure 11) RL = 27 Ω (see Figure 11) RL = 27 Ω (see Figure 11) 900 600 50 50 1.9 2.2 1300 800 80 80 2.7 3.0 ns ns ns ns μs μs RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) Min 2.5 20 15 Typ Max Test Conditions/Comments 42 28 70 60 Unit Mbps ns ns 20 20 42 42 −6 75 75 ±12 ns ns ns RL = 27 Ω (see Figure 11) RL = 27 Ω (see Figure 11) RL = 27 Ω (see Figure 11) 52 52 40 40 700 700 100 100 80 80 1000 1000 ns ns ns ns ns ns RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) tPZL tPZH tPLZ tPHZ tPSL tPSH RL = 60 Ω (see Figure 10) RL = 60 Ω (see Figure 10) Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|. VCC = 3.3 V, TA = 25°C. Table 4. ADM3486E Parameter MAXIMUM DATA RATE DIFFERENTIAL OUTPUT DELAY DIFFERENTIAL OUTPUT TRANSITION TIME PROPAGATION DELAY From Low to High Level From High to Low Level |tPLH − tPHL| PROPAGATION DELAY SKEW 1 ENABLE/DISABLE TIMING Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level 1 Symbol tDD tTD tPLH tPHL tPDS tPZL tPZH tPLZ tPHZ tPSL tPSH Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|. Rev. A | Page 5 of 20 RL = 60 Ω (see Figure 10) RL = 60 Ω (see Figure 10) ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E VCC = 3.3 V, TA = 25°C. Table 5. ADM3490E/ADM3491E Parameter MAXIMUM DATA RATE DIFFERENTIAL OUTPUT DELAY DIFFERENTIAL OUTPUT TRANSITION TIME PROPAGATION DELAY From Low to High Level From High to Low Level |tPLH − tPHL| PROPAGATION DELAY SKEW1 ENABLE/DISABLE TIMING (ADM3491E ONLY) Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level 1 Symbol tDD tTD tPLH tPHL tPDS Min 12 1 3 Typ 15 22 11 Max 7 7 tPZL tPZH tPLZ tPHZ tPSL tPSH Test Conditions/Comments 35 25 Unit Mbps ns ns 23 23 −1.4 35 35 ±8 ns ns ns RL = 27 Ω (see Figure 11) RL = 27 Ω (see Figure 11) RL = 27 Ω (see Figure 11) 42 42 35 35 650 650 90 90 80 80 900 900 ns ns ns ns ns ns RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 110 Ω (see Figure 13) RL = 110 Ω (see Figure 12) RL = 60 Ω (see Figure 10) RL = 60 Ω (see Figure 10) Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|. RECEIVER TIMING SPECIFICATIONS VCC = 3.3 V, TA = 25°C. Table 6. ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E Parameter PROPAGATION DELAY From Low to High Level ADM3486E/ADM3490E/ADM3491E ADM3483E/ADM3488E From High to Low Level ADM3486E/ADM3490E/ADM3491E ADM3483E/ADM3488E |tRPLH − tRPHL| PROPAGATION DELAY SKEW ADM3486E/ADM3490E/ADM3491E ADM3483E/ADM3488E ENABLE/DISABLE TIMING (ADM3483E/ADM3486E/ ADM3491E ONLY) Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level Time to Shutdown1 1 Symbol Min Typ Max Unit Test Conditions/Comments 25 25 62 75 90 120 ns ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) 25 25 62 75 90 120 ns ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) +6 +12 ±10 ±20 ns ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) 25 25 25 25 720 720 190 50 50 45 45 1400 1400 300 ns ns ns ns ns ns ns CL = 15 pF (see Figure 15) CL = 15 pF (see Figure 15) CL = 15 pF (see Figure 15) CL = 15 pF (see Figure 15) CL = 15 pF (see Figure 15) CL = 15 pF (see Figure 15) tRPLH tRPHL tRPDS tRPZL tRPZH tRPLZ tRPHZ tRPSL tRPSH tSHDN 80 The transceivers are put into shutdown mode by bringing the RE high and the DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter shutdown. If the parts are in this state for 300 ns or more, the parts are guaranteed to enter shutdown. Rev. A | Page 6 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 7. Parameter VCC to GND Digital Input/Output Voltage (DE, RE, DI) Receiver Output Voltage (RO) Driver Output (A, B, Y, Z)/Receiver Input (A, B) Voltage Driver Output Current Operating Temperature Range Storage Temperature Range θJA Thermal Impedance 8-Lead SOIC_N 14-Lead SOIC_N Lead Temperature, Soldering (20 sec) Rating −0.3 V to +6 V −0.3 V to +6 V −0.3 V to (VCC + 0.3 V) −8 V to +13 V ±250 mA −40°C to +85°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION 158°C/W 120°C/W 260°C Rev. A | Page 7 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NC 1 14 VCC RO 2 RE 3 13 VCC ADM3491E 12 A DE 3 DI 4 VCC 1 ADM3483E/ ADM3486E 8 VCC 7 B RO 2 TOP VIEW (Not to Scale) 6 A DI 3 5 GND GND 4 Figure 4. ADM3483E/ADM3486E Pin Configuration ADM3488E/ ADM3490E 8 A 7 B GND 6 9 Y TOP VIEW (Not to Scale) 6 Z GND 7 8 NC 5 Y 06284-005 RE 2 06284-004 RO 1 11 B TOP VIEW DI 5 (Not to Scale) 10 Z Figure 5. ADM3488E/ADM3490E Pin Configuration NC = NO CONNECT 06284-006 DE 4 Figure 6. ADM3491E Pin Configuration Table 8. Pin Function Descriptions ADM3483E/ ADM3486E Pin No. 1 ADM3488E/ ADM3490E Pin No. 2 ADM3491E Pin No. 2 Mnemonic RO 2 N/A 3 RE 3 N/A 4 DE 4 3 5 DI 5 N/A 6 N/A N/A 7 N/A 8 N/A 4 5 N/A 8 6 N/A 7 1 N/A 6, 7 9 N/A 12 10 N/A 11 13, 14 1, 8 GND Y A A Z B B VCC NC Description Receiver Output. If A > B by 200 mV, RO is high; if A < B by 200 mV, RO is low. Receiver Output Enable. A low level enables the receiver output. A high level places it in a high impedance state. If RE is high and DE is low, the device enters a low power shutdown mode. Driver Output Enable. A high level enables the driver differential A and B outputs. A low level places it in a high impedance state. If RE is high and DE is low, the device enters a low power shutdown mode. Driver Input. With a half-duplex part when the driver is enabled, a logic low on DI forces A low and B high; a logic high on DI forces A high and B low. With a full-duplex part when the driver is enabled, a logic low on DI forces Y low and Z high; a logic high on DI forces Y high and Z low. Ground. Noninverting Driver Output. Noninverting Receiver Input A and Noninverting Driver Output A. Noninverting Receiver Input A. Inverting Driver Output. Inverting Receiver Input B and Inverting Driver Output B. Inverting Receiver Input B. Power Supply, 3.3 V ± 0.3 V. Bypass VCC to GND with a 0.1 μF capacitor. No Connect. Not internally connected. Can be connected to GND. Rev. A | Page 8 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E TEST CIRCUITS AND SWITCHING CHARACTERISTICS VOM Y RL = 27Ω RL/2 S1 VOD Z OUT D 06284-007 VOC RL/2 GENERATOR1 CL = 15pF2 50Ω VCC Figure 7. Driver Differential Output Voltage and Common-Mode Output Voltage VOM = VOH + VOL 375Ω VOD RL VCC ≈ 1.5V 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L VCM = –7V TO +12V 3V 06284-008 D 2 375Ω IN 1.5V 1.5V 0V Figure 8. Driver Differential Output Voltage with Varying Common-Mode Voltage tPLH tPHL VOH Y OUT VOM VOM VOL tPHL R tPLH VOH IOL VOL VOH IOH (–) (+) Z OUT VOM VOL Figure 11. Driver Propagation Delays Figure 9. Receiver Output Voltage High and Output Voltage Low S1 CL 0V OR 3V RL = OUT 60Ω D GENERATOR1 VOM 06284-011 0 06284-009 VID OUT D CL = 50pF2 RL = 110Ω 50Ω VCC GENERATOR1 CL = 15pF2 50Ω VOM = 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L VOH + VOL 2 ≈ 1.5V 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L +3V +1.5V +1.5V 3V 0V OUT 50% 10% 90% tTD 1.5V 1.5V tDD 90% 0V tPZH ≈ +2V 50% 10% tTD ≈ –2V OUT 06284-010 tDD IN tPHZ 0.25V VOH VOM 0V Figure 10. Driver Differential Output Delay and Transition Times Figure 12. Driver Enable and Disable Times (tPZH, tPSH, tPHZ) Rev. A | Page 9 of 20 06284-012 IN ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E VCC RL = 110Ω S1 0V OR 3V OUT D VID GENERATOR1 CL = 50pF2 OUT CL = 15pF2 50Ω 1.5V VOM = 0V 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L VCC 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L 3V 1.5V 3V 1.5V 0V tPSL 1.5V 0V tPLZ tRPLH VCC tRPHL VCC VOM 0.25V 06284-013 OUT 1.5V IN VOL VOM OUT 0V Figure 14. Receiver Propagation Delays Figure 13. Driver Enable and Disable Times (tPZL, tPSL, tPLZ) S1 S3 +1.5V VOM VID –1.5V VCC 1kΩ R S2 CL2 GENERATOR1 50Ω 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L +3V +1.5V IN 0V tRPZH tRPSH OUT S1 OPEN S2 CLOSED S3 = +1.5V +3V IN +1.5V VOH VCC OUT +1.5V +1.5V 0V +3V +1.5V IN 0V VOL S1 OPEN S2 CLOSED S3 = +1.5V +3V +1.5V IN 0V tRPHZ S1 CLOSED S2 OPEN S3 = –1.5V tRPLZ VOH OUT 0V tRPZL tRPSL S1 CLOSED S2 OPEN S3 = –1.5V VCC OUT +0.25V 0V VOL +0.25V Figure 15. Receiver Enable and Disable Times Rev. A | Page 10 of 20 06284-015 IN 2 06284-014 GENERATOR1 R 50Ω ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E TYPICAL PERFORMANCE CHARACTERISTICS 25 0.8 IRO = 2.5mA 0.7 OUTPUT LOW VOLTAGE (V) OUTPUT CURRENT (mA) 20 15 10 5 0.6 0.5 0.4 0.3 0.2 0 0.5 1.0 1.5 2.0 2.5 3.5 3.0 OUTPUT LOW VOLTAGE (V) 0 –40 06284-021 Figure 16. Output Current vs. Receiver Output Low Voltage 100 –16 90 OUTPUT CURRENT (mA) –12 –10 –8 –6 –4 70 60 50 40 30 20 –2 10 0.5 1.0 1.5 2.0 2.5 3.5 3.0 OUTPUT HIGH VOLTAGE (V) 0 06284-022 0 0.5 1.0 1.5 2.0 2.5 3.5 3.0 DIFFERENTIAL OUTPUT VOLTAGE (V) Figure 17. Output Current vs. Receiver Output High Voltage Figure 20. Driver Output Current vs. Differential Output Voltage 2.6 3.30 DIFFERENTIAL OUTPUT VOLTAGE (V) IRO = –1.5mA 3.25 3.20 3.15 3.10 –25 0 25 50 75 TEMPERATURE (°C) 06284-023 3.05 3.00 –50 0 06284-025 OUTPUT CURRENT (mA) 85 80 –14 OUTPUT HIGH VOLTAGE (V) 60 Figure 19. Receiver Output Low Voltage vs. Temperature –18 0 10 TEMPERATURE (°C) RL = 54Ω 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 –50 –25 0 25 50 75 TEMPERATURE (°C) Figure 21. Driver Differential Output Voltage vs. Temperature Figure 18. Receiver Output High Voltage vs. Temperature Rev. A | Page 11 of 20 06284-026 0 06284-024 0.1 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E 120 0.9 0.8 0.7 SHUTDOWN CURRENT (µA) OUTPUT CURRENT (mA) 100 80 60 40 0.6 0.5 0.4 0.3 0.2 20 0 2 4 6 8 10 12 OUTPUT LOW VOLTAGE (V) 0 –50 06284-027 0 –25 0 25 50 06284-030 0.1 75 TEMPERATURE (°C) Figure 22. Output Current vs. Driver Output Low Voltage Figure 25. Shutdown Current vs. Temperature 120 DI 80 3 60 Y 40 20 –6 –5 –4 –3 –2 –1 0 1 2 3 4 OUTPUT HIGH VOLTAGE (V) Z CH1 1.0V Ω CH3 2.0V Ω 06284-028 0 –7 CH1 CH2 Figure 23. Output Current vs. Driver Output High Voltage CH2 1.0V Ω IT 400ps/pt A CH3 M20ns 1.25GS/s 1.44V 06284-031 OUTPUT CURRENT (mA) 100 Figure 26. ADM3490E/ADM3491E Driver Propagation Delay 1.2 VA – VB 1.0 M1 0.9 0.8 0.7 RO 0.6 –10 20 50 TEMPERATURE (°C) 80 CH3 2.0V Ω M200ns 250MS/s MATH1 2.01V 200ns 4ns/pt A CH2 1.24V 06284-032 3 0.5 –40 06284-029 SUPPLY CURRENT (mA) 1.1 Figure 27. ADM3490E/ADM3491E Receiver Propagation Delay, Driven by External RS-485 Device Figure 24. Supply Current vs. Temperature Rev. A | Page 12 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E DI 3 VA – VB Y 1 M RO 06284-033 06284-034 Z CH1 500mV Ω CH3 5.0V Ω CH2 500mV Ω M2.0µs 25.0MS/s A CH3 2.4V CH1 2.00V MATH 2.00V 20.0ms 40.0ns/pt Figure 28. ADM3483E/ADM3488E Driver Propagation Delay M20.0ms A CH1 40.0mV Figure 29. ADM3483E/ADM3488E Receiver Propagation Delay Rev. A | Page 13 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E CIRCUIT DESCRIPTION The ADM34xxE are low power transceivers for RS-485 and RS422 communications. The ADM3483E/ADM3488E operate at data rates up to 250 kbps. The ADM3486E operates at data rates up to 2.5 Mbps, and the ADM3490E/ADM3491E transmit at up to 12 Mbps. The ADM3488E/ADM3490E/ADM3491E are fullduplex transceivers, and the ADM3483E/ADM3486E are half duplex. Driver enable (DE) and receiver enable (RE) pins are included on the ADM3483E/ADM3486E/ADM3491E. When disabled, the driver and receiver outputs are high impedance. Table 12. Receiving Truth Table DEVICES WITH RECEIVER/DRIVER ENABLE— ADM3483E/ADM3486E/ADM3491E The ADM3483E/ADM3486E/ADM3491E are put into a low power shutdown mode by bringing both RE high and DE low. The devices do not shut down unless both the driver and the receiver are disabled (high impedance). In shutdown mode, the devices typically draw less than 1 μA of supply current. For these devices, the tPSH and the tPSL enable times assume the part was in the low power shutdown mode; the tPZH and the tPZL enable times assume the receiver or the driver was disabled, but the part was not shut down. Table 9. Transmitting Truth Table Transmitting Inputs DE DI RE Transmitting Outputs A1, Y2 B1, Z2 X3 X3 0 1 1 0 High-Z4 High-Z4 1 1 0 0 1 0 X3 X3 0 1 High-Z4 High-Z4 Mode Normal Normal Normal Shutdown 1 ADM3483E and ADM3486E only. ADM3491E only. 3 X = don’t care. 4 High-Z = high impedance. 2 Table 10. Receiving Truth Table RE Receiving Inputs DE1 DE2 A – B 0 0 0 1 0 0 0 0 X3 X3 X3 X3 Receiving Output RO ≥ +0.2 V ≤ −0.2 V Inputs open X3 1 0 1 High-Z4 Mode Normal Normal Normal Shutdown 1 ADM3483E and ADM3486E only. ADM3491E only. 3 X = don’t care. 4 High-Z = high impedance. 2 DEVICES WITHOUT RECEIVER/DRIVER ENABLE― ADM3488E/ADM3490E Table 11. Transmitting Truth Table Transmitting Input DI 1 0 Z 0 1 Transmitting Outputs Y 1 0 Receiving Input A–B ≥ +0.2 V ≤ −0.2 V Inputs open Receiving Output RO 1 0 1 LOW POWER SHUTDOWN MODE—ADM3483E/ ADM3486E/ADM3491E DRIVER OUTPUT PROTECTION The ADM34xxE family implements two ways to prevent excessive output current and power dissipation caused by faults or by bus contention. A current limit on the output stage provides immediate protection against short circuits over the whole common-mode voltage range (see the Typical Performance Characteristics section). In addition, a thermal shutdown circuit forces the driver outputs into a high impedance state if the die temperature rises excessively. PROPAGATION DELAY Figure 11, Figure 14, Figure 26, and Figure 27 show the typical propagation delays. Skew time is simply the difference between the low-to-high and the high-to-low propagation delays. Small driver/receiver skew times help maintain a symmetrical markspace ratio (50% duty cycle). The receiver skew time, |tPRHL – tPRHL|, is under 10 ns (20 ns for the ADM3483E/ADM3488E). The driver skew time is 8 ns for the ADM3490E/ADM3491E, 12 ns for the ADM3486E, and typically under 50 ns for the ADM3483E/ADM3488E. LINE LENGTH VS. DATA RATE The RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, Figure 34 illustrates an example of a line repeater. Rev. A | Page 14 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E ±15 kV ESD PROTECTION HIGH VOLTAGE GENERATOR Two coupling methods are used for ESD testing: contact discharge and air-gap discharge. Contact discharge calls for a direct connection to the unit being tested. Airgap discharge uses a higher test voltage but does not make direct contact with the test unit. With air-gap discharge, the discharge gun is moved toward the unit under test, developing an arc across the air gap, therefore the term airgap discharge. This method is influenced by humidity, temperature, barometric pressure, distance, and rate of closure of the discharge gun. The contact discharge method, while less realistic, is more repeatable and is gaining acceptance and preference over the airgap method. Input/output lines are particularly vulnerable to ESD damage. Simply touching or connecting an input/output cable can result in a static discharge that can damage or completely destroy the interface product connected to the input/output port. It is extremely important, therefore, to have high levels of ESD protection on the input/output lines. The ESD discharge can induce latch-up in the device under test, so it is important that ESD testing on the input/output pins be carried out while device power is applied. This type of testing is more representative of a real-world input/output discharge, which occurs when the equipment is operating normally. The transmitter outputs and receiver inputs of the ADM34xxE family are characterized for protection to a ±15 kV limit using the human body model. DEVICE UNDER TEST C1 ESD TEST METHOD R2 C1 HUMAN BODY MODEL ESD ASSOC. STD 55.1 1.5kΩ 100pF 100% IPEAK 90% 36.8% 10% tRL tDL TIME t 06284-016 Although very little energy is contained within an ESD pulse, the extremely fast rise time, coupled with high voltages, can cause failures in unprotected semiconductors. Catastrophic destruction can occur immediately as a result of arcing or heating. Even if catastrophic failure does not occur immediately, the device can suffer from parametric degradation that can result in degraded performance. The cumulative effects of continuous exposure can eventually lead to complete failure. R2 R1 Figure 30. Human Body Model and Current Waveform TYPICAL APPLICATIONS The ADM3483E/ADM3486E/ADM3491E transceivers are designed for bidirectional data communications on multipoint bus transmission lines. The ADM3488E/ADM3490E full-duplex transceiver is designed to be used in a daisy-chain network topology or in a point-to-point application (see Figure 32). The ADM3483E/ADM3486E are half-duplex RS-485 transceivers that can be used in a multidrop bus configuration, as shown in Figure 31. The ADM3488E/ADM3490E/ADM3491E can also be used as a line repeater, for use with cable lengths longer than 4000 feet, as shown in Figure 34. To minimize reflections, the line must be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as possible. HUMAN BODY MODEL Figure 30 shows the human body model and the current waveform it generates when discharged into a low impedance. This model consists of a 100 pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5 kΩ resistor. Rev. A | Page 15 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E ADM3483E/ ADM3486E R RO ADM3483E/ ADM3486E A A RE RT R RO RE RT DE D B A B A R R D RO D DI DE 06284-017 RE Figure 31. ADM3483E/ADM3486E Typical Half-Duplex RS-485 Network DI DI ADM3483E/ ADM3486E RO RE DE DI NOTES 1. MAXIMUM NUMBER OF TRANSCEIVERS ON BUS: 32. 2. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED. RO D B ADM3483E/ ADM3486E MASTER SLAVE ADM3488E/ ADM3490E ADM3488E/ ADM3490E A Y B Z Z B Y A R D D R DI RO Figure 32. ADM3488E/ADM3490E Full-Duplex Point-to-Point Applications Rev. A | Page 16 of 20 06284-018 DI DE B ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E MASTER ADM3491E R RO SLAVE A B Y RT Z ADM3491E D DE DI RE DE DI B Z D RT Y A R RO RE SLAVE A B R A Y Z B R D Y Z SLAVE D ADM3491E ADM3491E RO RE DE DI RO RE DE DI 06284-019 NOTES 1. MAXIMUM NUMBER OF NODES: 32. 2. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED. Figure 33. ADM3491E Full-Duplex RS-485 Network ADM3488E/ ADM3490E/ ADM3491E A R B RO RT DATA IN RT DATA OUT RE DE Z D Y NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE USED. 2. RE AND DE PINS ON ADM3491E ONLY. 06284-020 DI Figure 34. Line Repeater for ADM3488E/ADM3490E/ADM3491E Rev. A | Page 17 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 6.20 (0.2440) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060506-A 4.00 (0.1574) 3.80 (0.1497) Figure 35. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45° 8° 0° 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-A 4.00 (0.1575) 3.80 (0.1496) Figure 36. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model ADM3483EARZ 1 ADM3483EARZ-REEL71 ADM3486EARZ1 ADM3486EARZ-REEL71 ADM3488EARZ1 ADM3488EARZ-REEL71 ADM3490EARZ1 ADM3490EARZ-REEL71 ADM3491EARZ1 ADM3491EARZ-REEL71 1 Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 14-Lead Standard Small Outline Package (SOIC_N) 14-Lead Standard Small Outline Package (SOIC_N) Z = Pb-free part. Rev. A | Page 18 of 20 Package Option R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-14 R-14 Ordering Quantity 1,000 1,000 1,000 1,000 1,000 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E NOTES Rev. A | Page 19 of 20 ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06284-0-10/06(A) Rev. A | Page 20 of 20