ADSP-BF527 EZ-KIT Lite Evaluation System Manual (Rev. 1.7)

ADSP-BF527 EZ-KIT Lite®
Evaluation System Manual
Revision 1.7, July 2012
Part Number
82-000208-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
© 2012 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, Blackfin, CrossCore, EngineerZone,
EZ-Extender, EZ-KIT Lite, Lockbox, and VisualDSP++ are registered
trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-BF527 EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end
product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-BF527 EZ-KIT Lite has been certified to comply with the
essential requirements of the European EMC directive 2004/108/EC and
therefore carries the “CE” mark.
The ADSP-BF527 EZ-KIT Lite has been appended to Analog Devices,
Inc. EMC Technical File (EMC TF) referenced DSPTOOLS1, issue 2
dated June 4, 2008 and was declared CE compliant by an appointed Notified Body (No.0673) as listed below.
Notified Body Statement of Compliance: Z600ANA2.030 dated June 4,
2008.
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park
Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance degradation or loss of
functionality. Store unused EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Product Overview ......................................................................... xiii
Purpose of This Manual .................................................................. xv
Intended Audience ......................................................................... xvi
Manual Contents ........................................................................... xvi
What’s New in This Manual .......................................................... xvii
Technical Support ......................................................................... xvii
Supported Processors .................................................................... xviii
Product Information .................................................................... xviii
Analog Devices Web Site ........................................................ xviii
EngineerZone ............................................................................ xx
Related Documents ......................................................................... xx
Notation Conventions .................................................................... xxi
USING THE ADSP-BF527 EZ-KIT LITE
Package Contents .......................................................................... 1-3
Default Configuration ................................................................... 1-3
CCES Install and Session Startup .................................................. 1-4
Session Startup ........................................................................ 1-6
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
v
Contents
VisualDSP++ Install and Session Startup ....................................... 1-8
CCES Evaluation License ........................................................... 1-10
VisualDSP++ Evaluation License ................................................. 1-11
Lockbox Key Security Features .................................................... 1-11
Memory Map ............................................................................. 1-12
SDRAM Interface ....................................................................... 1-15
Parallel Flash Memory Interface .................................................. 1-17
NAND Flash Interface ................................................................ 1-17
SPI Interface .............................................................................. 1-18
PPI Interface .............................................................................. 1-19
LCD Module Interface ............................................................... 1-19
Touchscreen Interface ................................................................. 1-21
Keypad Interface ......................................................................... 1-21
Rotary Encoder Interface ............................................................ 1-22
Ethernet Interface ....................................................................... 1-22
Audio Interface ........................................................................... 1-23
USB OTG Interface .................................................................... 1-25
UART Interface .......................................................................... 1-26
RTC Interface ............................................................................ 1-27
LEDs and Push Buttons .............................................................. 1-27
JTAG Interface ........................................................................... 1-28
Expansion Interface .................................................................... 1-29
Power Measurements .................................................................. 1-29
Power-On-Self Test ..................................................................... 1-30
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Contents
Example Programs ...................................................................... 1-31
Board Design Database ............................................................... 1-31
ADSP-BF527 EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
Programmable Flags ...................................................................... 2-3
Push Buttons and Switches .......................................................... 2-10
ETH Enable Switch (SW1) .................................................... 2-10
Boot Mode Select Switch (SW2) ............................................ 2-11
Rotary Encoder With Momentary Switch (SW3) .................... 2-12
MIC Gain Switch (SW4) ....................................................... 2-12
LCD Reset Switch (SW5) ...................................................... 2-13
Flash Enable Switch (SW7) .................................................... 2-13
Mic/HP LPBK Audio Mode Switch (SW8) ............................ 2-14
ETH Mode Flash CS Switch (SW9) ....................................... 2-14
UART Enable Switch (SW10) ................................................ 2-15
Rotary NAND Enable Switch (SW11) ................................... 2-16
GPIO Enable Switch (SW13) ................................................ 2-17
Programmable Flag Push Buttons (SW14–15) ........................ 2-18
Reset Push Button (SW16) .................................................... 2-18
SPI/TWI Switch (SW19) ....................................................... 2-19
SPORT0A ENBL Switches (SW20 and SW27) ...................... 2-19
TFS0A/HOSTCE Enable Switch (SW21) .............................. 2-19
Touch ADD Switch (SW22) .................................................. 2-19
Touchpad INT Switch (SW24) .............................................. 2-20
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
vii
Contents
LCD/KPAD CTL Switch (SW25) ......................................... 2-20
Mode Switch (SW26) ............................................................ 2-21
Line In-Out LPBK Switch (SW28) ........................................ 2-22
CPLD D8–13 Switch (SW29) ............................................... 2-22
CPLD 14–15/DCE ENB Switch (SW30) .............................. 2-22
Jumpers ...................................................................................... 2-23
MIC Select Jumper (JP6) ...................................................... 2-23
STAMP Enable Jumper (JP7) ................................................ 2-23
Flash WP Jumper (JP10) ....................................................... 2-24
STP ENB Enable Jumper (JP14) ........................................... 2-24
LED0 OFF Jumper (JP15) .................................................... 2-24
VDDINT Power Jumper (P14) .............................................. 2-25
VDDEXT Power Jumper (P15) ............................................. 2-25
VDDMEM Power Jumper (P16) ........................................... 2-25
LEDs ......................................................................................... 2-26
User LEDs (LED1–3) ........................................................... 2-26
Power LED (LED4) .............................................................. 2-27
Reset LED (LED5) ............................................................... 2-27
Ethernet LEDs (LED6–7) ..................................................... 2-27
Keypad Current Sink LED (LED8) ....................................... 2-27
Connectors ................................................................................. 2-28
Expansion Interface Connectors (J1–3) .................................. 2-28
DCE (RS-232) Connector (J4) .............................................. 2-29
Battery Holder (J5) ............................................................... 2-29
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Contents
Power Connector (J6) ............................................................ 2-30
Dual Audio Connectors (J7–8) .............................................. 2-30
Ethernet Connector (J9) ........................................................ 2-30
USB OTG Connector (P1) .................................................... 2-31
Keypad Connector (P2) ......................................................... 2-31
UART0 Connector (P5) ........................................................ 2-31
SPORT0 Connector (P6) ....................................................... 2-32
SPORT1 Connector (P7) ....................................................... 2-32
PPI Connector (P8) ............................................................... 2-32
SPI Connector (P9) ............................................................... 2-33
TWI Connector (P10) ........................................................... 2-33
TIMERS Connector (P11) .................................................... 2-33
Host Interface Connector (P13) ............................................. 2-34
CPLD JTAG Connector (P17) ............................................... 2-34
LCD Data Connector (P18) .................................................. 2-34
USB Debug Agent Connector (ZJ1) ....................................... 2-35
JTAG Connector (ZP4) ......................................................... 2-35
ADSP-BF527 EZ-KIT LITE BILL OF MATERIALS
ADSP-BF527 EZ-KIT LITE SCHEMATIC
INDEX
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ix
Contents
x
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-BF527 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for Blackfin® processors.
Blackfin processors embody a type of embedded processor designed specifically to meet the computational demands and power constraints of
today’s embedded audio, video, and communications applications. They
deliver breakthrough signal-processing performance and power efficiency
within a reduced instruction set computing (RISC) programming model.
Blackfin processors support a media instruction set computing (MISC)
architecture. This architecture is the natural merging of RISC, media
functions, and digital signal processing (DSP) characteristics. Blackfin
processors deliver signal-processing performance in a microprocessor-like
environment.
Based on the Micro Signal Architecture (MSA), Blackfin processors combine a 32-bit RISC instruction set, dual 16-bit multiply accumulate
(MAC) DSP functionality, and eight-bit video processing performance
that had previously been the exclusive domain of very-long instruction
word (VLIW) media processors.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
xi
The evaluation board is designed to be used in conjunction with the
CrossCore® Embedded Studio (CCES) and VisualDSP++® development
environments to test capabilities of the ADSP-BF523/BF525/BF527
Blackfin processors. The development environment facilitates advanced
application code development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-BF527 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the processor from a personal computer (PC) is achieved
through a USB port or an external JTAG emulator. The USB interface
provides unrestricted access to the ADSP-BF527 processor and evaluation
board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a
wide range of in-circuit emulation products. To learn more about Analog
Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools.
The ADSP-BF527 EZ-KIT Lite provides example programs to demonstrate the evaluation board capabilities.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Preface
Product Overview
The board features:
• Analog Devices ADSP-BF527 Blackfin processor
• Core performance up to 600 MHz
• External bus performance up to 133 MHz
• 289-pin 0.5 mm pitch mini-BGA package
• 25 MHz oscillator
• Synchronous dynamic random access memory (SDRAM)
• Micron MT48LC32M16A2TG – 64 MB
(8M x 16 bits x 4 banks)
• Parallel flash memory
• ST Micro M29W320EB – 32 Mb (2M x 16 bits)
• NAND flash memory
• Numonyx NAND04 – 4 Gb
• SPI flash memory
• ST Micro M25P16 – 16 Mb
• Internal audio codec
• Low-power audio codec
• One stereo LINE
OUT
jack
• One input MIC jack
• One input stereo LINE
IN
jack
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
xiii
Product Overview
• TFT LCD display with touchscreen
• Sharp LQ035Q1DH02 320 x 240 3.5’’ touchscreen LCD
• Analog Devices AD7879-1 four-wire touchscreen controller
• Ethernet interface
• SMSC LAN8700 PHY device
• 10-BaseT and 100-BaseTX Ethernet controller
• Auto-MDIX
• Keypad
• Analog Devices ADP5520 keypad controller
• ACT components – 4 x 4 keypad assembly
• Thumbwheel
• CTS Corp rotary encoder
• Universal asynchronous receiver/transmitter (UART)
• ADM3202 RS-232 line driver/receiver
• DB9 female connector
• LEDs
• Ten LEDs: one power (green), one board reset (red), three
general-purpose (yellow), one USB monitor (amber), PHY
link (yellow), PHY activity (green), keypad controller (red),
and FPGA done (yellow)
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Preface
• Push buttons
• Three push buttons: one reset, two programmable flags with
debounce logic
• Expansion interface
• Provides access to all ADSP-BF527 processor signals
• Other features
• JTAG ICE 14-pin header
• USB OTG connector
• HOST interface connector
• Power measurement jumpers
• PPI IDC connector
• SPORT0 and SPORT1 IDC connectors
• TWI, SPI, timers, and UART0 IDC connectors
For information about the hardware components of the EZ-KIT Lite,
refer to “ADSP-BF527 EZ-KIT Lite Hardware Reference” on page 2-1.
Purpose of This Manual
The ADSP-BF527 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-BF527 EZ-KIT
Lite. Finally, a schematic and a bill of materials are provided as a reference
guide for future designs.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
xv
Intended Audience
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set.
Programmers who are unfamiliar with Analog Devices processors can use
this manual but should supplement it with other texts that describe your
target architecture. For the locations of these documents, see “Related
Documents”.
Programmers who are unfamiliar with CCES or VisualDSP++ should refer
to the online help and user’s manuals.
Manual Contents
The manual consists of:
• Chapter 1, “Using the ADSP-BF527 EZ-KIT Lite” on page 1-1
Describes EZ-KIT Lite operation from a programmer’s perspective
and provides a simplified memory map.
• Chapter 2, “ADSP-BF527 EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the EZ-KIT Lite hardware components.
• Appendix A, “ADSP-BF527 EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
• Appendix B, “ADSP-BF527 EZ-KIT Lite Schematic” on page B-1
Provides the resources for board-level debugging, can be used as a
reference guide. Appendix B is part of the online help.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Preface
What’s New in This Manual
This is revision 1.7 of the ADSP-BF527 EZ-KIT Lite Evaluation System
Manual. The manual has been updated to include CCES information. In
addition, modifications and corrections based on errata reports against the
previous manual revision have been made.
For the latest version of this manual, please refer to the Analog Devices
Web site.
Technical Support
You can reach Analog Devices processors and DSP technical support in
the following ways:
• Post your questions in the processors and DSP support community
at EngineerZone®:
http://ez.analog.com/community/dsp
• Submit your questions to technical support directly at:
http://www.analog.com/support
• E-mail your questions about processors, DSPs, and tools development software from CrossCore Embedded Studio or
VisualDSP++:
Choose Help > Email Support. This creates an e-mail to
processor.tools.support@analog.com and automatically attaches
your CrossCore Embedded Studio or VisualDSP++ version information and license.dat file.
• E-mail your questions about processors and processor applications
to:
processor.support@analog.com or
processor.china@analog.com (Greater China support)
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
xvii
Supported Processors
• In the USA only, call 1-800-ANALOGD (1-800-262-5643)
• Contact your Analog Devices sales office or authorized distributor.
Locate one at:
www.analog.com/adi-sales
• Send questions by mail to:
Processors and DSP Technical Support
Analog Devices, Inc.
Three Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-BF527 Blackfin
embedded processors. Functionality of the ADSP-BF523 and
ADSP-BF525 processors can be evaluated using the same product because
the processors have many similarities.
Product Information
Product information can be obtained from the Analog Devices Web site
and the online help system.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Preface
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, myAnalog is a free feature of the Analog Devices Web site that
allows customization of a Web page to display only the latest information
about products you are interested in. You can choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests, including documentation errata against all manuals.
myAnalog provides access to books, application notes, data sheets, code
examples, and more.
Visit myAnalog (found on the Analog Devices home page) to sign up. If
you are a registered user, just log on. Your user name is your e-mail
address.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
xix
Related Documents
EngineerZone
EngineerZone is a technical support forum from Analog Devices. It allows
you direct access to ADI technical support engineers. You can search
FAQs and technical information to get quick answers to your embedded
processing and DSP design questions.
Use EngineerZone to connect with other DSP developers who face similar
design challenges. You can also use this open forum to share knowledge
and collaborate with the ADI support team and your peers. Visit
http://ez.analog.com to sign up.
Related Documents
For additional information about the product, refer to the following
publications.
Table 1. Related Processor Publications
Title
Description
ADSP-BF522/ADSP-BF523/ADSP-BF524/
ADSP-BF525/ADSP-BF526/ADSP-BF527
Blackfin Embedded Processor Data Sheet
General functional description, pinout, and
timing of the processor
ADSP-BF2x Blackfin Processor Hardware Reference Description of the internal processor architecture and all register functions
Blackfin Processor Programming Reference
xx
Description of all allowed processor assembly
instructions
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Preface
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
development environment’s menu system (for example, the Close command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.

Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.

Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.

Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
xxi
Notation Conventions
xxii
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1 USING THE ADSP-BF527
EZ-KIT LITE
This chapter provides information to assist you with development of programs for the ADSP-BF527 EZ-KIT Lite evaluation system.
The following topics are covered.
• “Package Contents” on page 1-3
• “Default Configuration” on page 1-3
• “CCES Install and Session Startup” on page 1-4
• “VisualDSP++ Install and Session Startup” on page 1-8
• “CCES Evaluation License” on page 1-10
• “VisualDSP++ Evaluation License” on page 1-11
• “Lockbox Key Security Features” on page 1-11
• “Memory Map” on page 1-12
• “SDRAM Interface” on page 1-15
• “Parallel Flash Memory Interface” on page 1-17
• “NAND Flash Interface” on page 1-17
• “SPI Interface” on page 1-18
• “PPI Interface” on page 1-19
• “LCD Module Interface” on page 1-19
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-1
• “Touchscreen Interface” on page 1-21
• “Keypad Interface” on page 1-21
• “Rotary Encoder Interface” on page 1-22
• “Ethernet Interface” on page 1-22
• “Audio Interface” on page 1-23
• “USB OTG Interface” on page 1-25
• “UART Interface” on page 1-26
• “RTC Interface” on page 1-27
• “LEDs and Push Buttons” on page 1-27
• “JTAG Interface” on page 1-28
• “Expansion Interface” on page 1-29
• “Power Measurements” on page 1-29
• “Power-On-Self Test” on page 1-30
• “Example Programs” on page 1-31
• “Board Design Database” on page 1-31
For information about the graphical user interface, including the boot
loading, target options, and other facilities of the EZ-KIT Lite system,
refer to the online help.
For more detailed information about the ADSP-BF527 Blackfin processor, see documents referred to at “Related Documents”.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
Package Contents
Your ADSP-BF527 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-BF527 EZ-KIT Lite board
• Universal 7.0V DC power supply
• Ethernet patch cable
• Three 3.5 mm male-to-male audio cables
• 3.5 mm headphones
• USB A-B male cable for USB debug agent
• 5-in-1cable and connectors for USB on-the-go (OTG) applications
• Ethernet loopback connector
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human body
and equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.
The ADSP-BF527 EZ-KIT Lite board is designed to run outside your personal computer as a standalone unit. You do not have to open your
computer case.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-3
CCES Install and Session Startup
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which can damage some components. Figure 1-1 shows the default jumper settings,
switches, connector locations, and LEDs used in installation. Confirm
that your board is in the default configuration before using the board.
Figure 1-1. EZ-KIT Lite Hardware Setup
CCES Install and Session Startup
For information about CCES and to download the software, go to
www.analog.com/CCES. A link for the ADSP-BF527 EZ-KIT Lite Board
Support Package (BSP) for CCES can be found at
http://www.analog.com/Blackfin/EZKits.
Follow these instructions to ensure correct operation of the product software and hardware.
1-4
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
Step 1: Connect the EZ-KIT Lite board to a personal computer (PC) running CCES using one of two options: an Analog Devices emulator or via
the debug agent.
Using an Emulator:
1. Plug one side of the USB cable into the USB connector of the emulator. Plug the other side into a USB port of the PC running
CCES.
2. Attach the emulator to the header connector ZP4 (labeled JTAG) on
the EZ-KIT Lite board.
Using the on-board Debug Agent:
1. Plug one side of the USB cable into the USB connector of the
debug agent ZJ1 (labeled USB).
2. Plug the other side of the cable into a USB port of the PC running
CCES.
Step 2: Attach the provided cord and appropriate plug to the power
adaptor.
1. Plug the jack-end of the power adaptor into the power connector
J6 (labeled 7.0V) on the EZ-KIT Lite board.
2. Plug the other side of the power adaptor into a power outlet. The
power LED (labeled LED4) is lit green when power is applied to the
board.
3. Power the emulator (if used). Plug the jack-end of the assembled
power adaptor into the emulator and plug the other side of the
power adaptor into a power outlet. The enable/power is lit green
when power is applied.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-5
CCES Install and Session Startup
Step 3 (if connected through the debug agent): Verify that the yellow
USB monitor LED (labeled ZLED3) on the debug agent is on. This signifies
that the board is communicating properly with the host PC and ready to
run CCES.
Session Startup
It is assumed that the CrossCore Embedded Studio software is installed
and running on your PC.
If you connect the board or emulator first (before installing
 Note:
CCES) to the PC, the Windows driver wizard may not find the
board drivers.
1. Navigate to the CCES environment via the Start menu.
Note that CCES is not connected to the target board.
2. Use the system configuration utility to connect to the EZ-KIT Lite
board.
If a debug configuration exists already, select the appropriate
configuration and click Apply and Debug or Debug. Go to step 8.
To create a debug configuration, do one of the following:
• Click the down arrow next to the little bug icon, select
Debug Configurations
• Choose Run > Debug Configurations.
The Debug Configuration dialog box appears.
3. Select CrossCore Embedded Studio Application and click
(New launch configuration).
The Select Processor page of the Session Wizard appears.
1-6
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
4. Ensure Blackfin is selected in Processor family. In Processor type,
select ADSP-BF527. Click Next.
The Select Connection Type page of the Session Wizard appears.
5. Select one of the following:
• For standalone debug agent connections, EZ-KIT Lite and
click Next.
• For emulator connections, Emulator and click Next.
The Select Platform page of the Session Wizard appears.
6. Do one of the following:
• For standalone debug agent connections, ensure that the
selected platform is ADSP-BF527 EZ-KIT Lite via Debug
Agent.
• For emulator connections, choose the type of emulator that
is connected to the board.
7. Click Finish to close the wizard.
The new debug configuration is created and added to the program(s) to load list.
8. In the Program(s) to load section, choose the program to load
when connecting to the board. If not loading any program upon
connection to the target, do not make any changes.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-7
VisualDSP++ Install and Session Startup
Note that while connected to the target, there is no way to choose a
program to download. To load a program once connected, terminate the session.
a configuration, go to the Debug Configurations dialog
 Toboxdelete
and select the configuration to delete. Click
and choose Yes
when asked if you wish to delete the selected launch configuration.
Then Close the dialog box.
from the target board, click the terminate button
 To(reddisconnect
box) or choose Run > Terminate.
To delete a session, choose Target > Session > Session List. Select
the session name from the list and click Delete. Click OK.
VisualDSP++ Install and Session Startup
For information about VisualDSP++ and to download the software, go to
www.analog.com/VisualDSP.
are two USB interfaces on the ADSP-BF527 EZ-KIT Lite.
 There
Be sure to use the debugger’s interface ( ) when connecting your
ZJ1
computer to the board with provided USB cable. The other USB
interface (labelled USB-OTG, P1) is for applications use.
1. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start > Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 3.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Session from the Session List dialog box.
• From the Session menu, Connect to Target.
4. The Select Processor page of the wizard appears on the screen.
Ensure Blackfin is selected in Processor family. In Choose a target
processor, select ADSP-BF527. Click Next.
5. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen.
Ensure that the selected platform is ADSP-BF527 EZ-KIT Lite via
Debug Agent. Specify your own Session name for the session or
accept the default name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session and click Next.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-9
CCES Evaluation License
7. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-KIT Lite. Once
connected, the main window’s title is changed to include the session name set in step 6.
disconnect from a session, click the disconnect button
 Toor select
Session > Disconnect from Target.
To delete a session, select Session > Session List. Select the session
name from the list and click Delete. Click OK.
CCES Evaluation License
The ADSP-BF527 EZ-KIT Lite software is part of the Board Support
Package (BSP) for the Blackfin ADSP-BF52x family. The EZ-KIT Lite is
a licensed product that offers an unrestricted evaluation license for 90 days
after activation. Once the evaluation period ends, the evaluation license
becomes permanently disabled. If the evaluation license is installed but
not activated, it allows 10 days of unrestricted use and then becomes disabled. The license can be re-enabled by activation.
An evaluation license can be upgraded to a full license. Licenses can be
purchased from:
• Analog Devices directly. Call (800) 262-5645 or 781-937-2384 or
go to:
http://www.analog.com/buyonline.
• Analog Devices, Inc. local sales office or authorized distributor. To
locate one, go to:
http://www.analog.com/salesdir/continent.asp.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
EZ-KIT Lite hardware must be connected and powered up to
 The
use CCES with a valid evaluation or full license.
VisualDSP++ Evaluation License
The ADSP-BF527 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
• VisualDSP++ restricts a connection to the ADSP-BF527 EZ-KIT
Lite via the USB debug agent interface only. Connections to simulators and emulation products are no longer allowed.
• The linker restricts a user program to 20 KB of memory for code
space with no restrictions for data space.
avoid errors when opening VisualDSP++, the EZ-KIT Lite
 Tohardware
must be connected and powered up. This is true for using
VisualDSP++ with a valid evaluation or full license.
Lockbox Key Security Features
Blackfin processors feature Lockbox® secure technology: hardware-enabled code security and content protection for one-time
programmable (OTP) memory. Customers purchasing Blackfin processors
can program their own customer public key in OTP.
The ADSP-BF527 EZ-KIT Lites are evaluation boards with the Lockbox
key pre-programmed and publicly documented—the burden of key generation and OTP programming of public keys is removed from the
customer. Customers can still program other areas of OTP memory on the
ADSP-BF527 EZ-KIT Lite. Analog Devices publicly document the
EZ-KIT Lite’s public and private key pair for customer evaluation and
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-11
Memory Map
support of the Lockbox feature, all while avoiding any keys information
exchange. As a result, there is no confidentiality associated with the Lockbox key on EZ-KIT Lites.
To demonstrate Lockbox features using an EZ-KIT Lite, you must use the
keys that are provided pre-programmed on your EZ-KIT Lite.
the EZ-KIT Lite key pair to generate a demo and then provide
 Use
the keys to the demo users. Note that the EZ-KIT Lite cannot be
used to secure any confidential information. If you wish to create a
demo with confidential keys, you must build your own Blackfin
board and personalize it with your own keys.
Memory Map
The ADSP-BF527 processor has internal static random access memory
(SRAM) used for instructions or data storage. See Table 1-1. The internal
memory details can be found in the ADSP-BF2x Blackfin Processor Hardware Reference.
The ADSP-BF527 EZ-KIT Lite board includes four types of external
memory: synchronous dynamic random access memory (SDRAM), serial
peripheral interconnect (SPI), parallel flash, and NAND flash. See
Table 1-2. For more information about a specific memory type, go the
respective section in this chapter.
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Using the ADSP-BF527 EZ-KIT Lite
Table 1-1. EZ-KIT Lite Internal Memory Map
Start Address
Content
0xEF00 0000
BOOT ROM (32K BYTE)
0xEF00
0xFEB0
0xFEB2
0xFF40
0xFF40
0xFF40
0xFF50
0xFF50
0xFF50
0xFF60
0xFF60
0xFF60
0xFF60
0xFF61
0xFF61
0xFF70
0xFF70
8000
0000
0000
0000
4000
8000
0000
4000
8000
0000
4000
8000
C000
0000
4000
0000
1000
Reserved
0xFF80 0000
L1 DATA BANKA SRAM (16K BYTE)
0xFF80 4000
L1 DATA BANKA SRAM/CACHE (16K BYTE)
0xFF80 8000
Reserved
0xFF90 0000
L1 DATA BANKB SRAM (16K BYTE)
0xFF90 4000
L1 DATA BANKB SRAM/CACHE (16K BYTE)
0xFF90 8000
Reserved
0xFFA0 0000
L1 INSTRUCTION BANKA LOWER SRAM (16K BYTE)
0xFFA0 4000
L1 INSTRUCTION BANKA UPPER SRAM (16K BYTE)
0xFFA0 8000
L1 INSTRUCTION BANKB LOWER SRAM (16 BYTE)
0xFFA0 C000
Reserved
0xFFA1 0000
L1 INSTRUCTION SRAM/CACHE (16K BYTE)
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-13
Memory Map
Table 1-1. EZ-KIT Lite Internal Memory Map (Cont’d)
Start Address
0xFFA1
0xFFA1
0xFFA1
0xFFA2
0xFFA2
4000
8000
C000
0000
4000
Content
Reserved
0xFFB0 0000
L1 SCRATCHPAD SRAM (4K BYTE)
0xFFB0 1000
Reserved
0xFFC0 0000
SYSTEM MMR REGISTERS
0xFFE0 0000
CORE MMR REGISTERS
Table 1-2. EZ-KIT Lite External Memory Map
Start Address
End Address
Content
0x0000 0000
0x03FF FFFF
SDRAM bank 0 (SDRAM)
0x2000 0000
0x200F FFFF
ASYNC memory bank 0 (flash)
0x2010 0000
0x201F FFFF
ASYNC memory bank 1 (flash)
0x2020 0000
0x202F FFFF
ASYNC memory bank 2 (flash)
0x2030 0000
0x203F FFFF
ASYNC memory bank 3 (flash)
0x2040 0000
0xEEFF FFFF
Reserved
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
SDRAM Interface
The ADSP-BF527 processor connects to a 64 MB Micron
MT48LC32M16A2TG-75 chip through the external bus interface unit
(EBIU). The SDRAM chip can operate at a maximum clock frequency of
133 MHz.
With a CCES or VisualDSP++ session running and connected to the
EZ-KIT Lite board via the USB debug agent, SDRAM registers are configured automatically with values listed in Table 1-3 each time the
processor is reset. The values are used whenever SDRAM is accessed
through the debugger (for example, when viewing memory windows or
loading a program).
To disable the automatic setting of the SDRAM registers, do one of the
following:
• CCES users, choose Target > Settings > Target Options and clear
the Use XML reset values check box.
• VisualDSP++ users, choose Settings > Target Options and clear
the Use XML reset values check box.
Table 1-3. SDRAM Default Settings With a 133 MHz SCLK
Register
Value
Function
pEBIU_SDRRC
0x0407
Calculated with SCLK = 133 MHz
fSCLK = 133 MHz
tREF = 64 ms
NRA = 8192 row addresses
tRAS = 6 clock cycles
tRP = 2 clock cycles
RDIV = 0x407
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1-15
SDRAM Interface
Table 1-3. SDRAM Default Settings With a 133 MHz SCLK (Cont’d)
Register
Value
Function
pEBIU_SDBCTL
0x0025
EBCAW = 10 bits
EBSZ = 64M byte
EBE
pEBIU_SDGCTL
0x0091998d
= enabled
TSCSR
EMREN
FBBRW
PSSE =
= 45 degrees C
= disabled
= disabled
enables SDRAM powerup sequence on next SDRAM
access
PSM = precharge, 8 BCBR refresh cycles, mode register set
PUPSD = no extra delay added before first precharge command
TWR = 2 cycles
TRCD = 3 cycles
TRP = 3 cycles
TRAS = 6 cycles
PASR = all 4 banks refreshed
CL = CAS latency 3 cycles
SCTLE = CLOUT disabled
Table 1-4 shows the PLL register settings using a 400 MHz CCLK and
133 MHz SCLK. The PLL_CTL and PLL_DIV registers are initialized in the
user code to achieve maximum performance.
Table 1-4. PLL Register Settings
Register
SCLK = 133 MHz
CCLK = 400 MHz
PLL_CTL
16
PLL_DIV
3
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to setup and access the SDRAM interface. For more
information on how to initialize the registers after a reset, search the
online help for “reset values”.
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Using the ADSP-BF527 EZ-KIT Lite
Parallel Flash Memory Interface
The parallel flash memory interface of the ADSP-BF527 EZ-KIT Lite
contains a 4 MB (2M x 16 bits) ST Micro M29W320EB chip. Flash
memory is connected to the 16-bit data bus and address lines 1
through 19. Chip enable is decoded by using AMS0—3 select lines through
NAND and AND gates. The address range for flash memory is
0x2000 0000 to 0x203F FFFF.
Flash memory is pre-loaded with boot code for the blink, LCD images,
and power-on-self test (POST) programs. For more information, refer to
“Power-On-Self Test” on page 1-30.
By default, the EZ-KIT Lite boots from the 16-bit parallel flash memory.
The processor boots from flash memory if the boot mode select switch
(SW2) is set to a position of 1; see “Boot Mode Select Switch (SW2)” on
page 2-11.
Flash memory code can be modified. For instructions, refer to the online
help and example program included in the EZ-KIT Lite installation
directory.
NAND Flash Interface
The ADSP-BF527 processor is equipped with an internal NAND flash
controller, which allows the 4 Gbit ST Micro’s NAND04 device to be
attached gluelessly to the processor. NAND flash is attached via the processor’s specific NAND flash control and data lines. NAND flash shares
pins with the Ethernet PHY, host connector, and expansion interface.
The NAND chip enable signal (NDCE#_HOSTD10) can be disconnected from
NAND flash by turning SW11.4 (switch 11 position 4) OFF. This ensures
that the NAND will not be driving data when HOSTD10 changes state. See
“Rotary NAND Enable Switch (SW11)” on page 2-16 for more
information.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-17
SPI Interface
The Ethernet PHY (U14) must be disabled in order for NAND flash to
function properly. This is accomplished by setting SW1 to OFF, OFF, ON,
OFF.
For more information about the NAND04 device, refer to the Numonyx
Web site at http://www.numonyx.com.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to setup and access the NAND flash interface.
SPI Interface
The ADSP-BF527 processor has one serial peripheral interface (SPI) port
with multiple chip select lines. The SPI port connects directly to serial
flash memory, LCD, audio codec, and expansion interface.
Serial flash memory is a 16 Mb ST Micro M25P16 device, which is
selected using the SPISEL1 line of the processor. SPI flash memory is
pre-loaded with boot code for the blink and POST programs. For more
information, refer to “Power-On-Self Test” on page 1-30. By default, the
EZ-KIT Lite boots from the 16-bit flash parallel memory. SPI flash can be
selected as the boot source by setting the boot mode select switch (SW2) to
position 3; see “Boot Mode Select Switch (SW2)” on page 2-11.
SPI flash code can be modified. For instructions, refer to the online help
and example program included in the EZ-KIT Lite installation directory.
By default, the audio codec is set up to use the SPISEL5 signal as the SPI
chip select when configuring the codec. The chip select is shared with the
HOSTD9 signal. For more information, refer to “Audio Interface” on
page 1-23.
By default, the LCD is setup to use SPISEL7. The LCD optionally can use
or SPISEL5 by setting SW25 appropriately. For more information,
refer to “LCD/KPAD CTL Switch (SW25)” on page 2-20.
SPISEL1
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Using the ADSP-BF527 EZ-KIT Lite
PPI Interface
The ADSP-BF527 processor provides a parallel peripheral interface (PPI),
supporting data widths up to 16 bits. The PPI interface provides three
multiplexed frame syncs, a dedicated clock input, and 16 data lines. The
EZ-KIT Lite uses an eight-bit data connection to the TFT LCD module.
The full PPI port is accessible on the PPI connector P8 and expansion
interface.
The PPI signals are connected to multi-function pins; the upper eight data
bit signals are configured for the rotary, SPI, UART1, and LED0 interfaces.
The PPI interface is set up to drive the LCD through a complex programmable logic device (CPLD). The CPLD has a 15 MHz oscillator input
and drives PPICLK at 5 MHz, 10 MHz or 15 MHz, depending on the
LCD display mode chosen. For more information, refer to the “LCD
Module Interface” on page 1-19.
The source of the PPI clock can be configured by software via the PPI_SEL
signal. The signal connects to the processor’s flag pin PG12 by setting SW13
position 4 ON. Flag pin PG12 is shared with the HOSTACK_LED2 signal. When
the clock select line is used, HOSTACK and LED2 are not available. The
PPISEL signal does not need to be driven if the default CPLD clock is
used; PPISEL is driven when the expansion interface is used as the clocking
source. Refer to “GPIO Enable Switch (SW13)” on page 2-17 for more
information.
LCD Module Interface
The EZ-KIT Lite features a Sharp LQ035Q1DH02 TFT LCD module
with touchscreen overlay. This is a 3.5” landscape display with a resolution of 320 x 240 pixels and a color depth of 16 bits. By default, the
interface is an RGB-888 serial parallel interface, eight bits of red, followed
by eight bits of green, and then eight bits of blue.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-19
LCD Module Interface
To configure the PPI interface, refer to the LCD software example found
in the Examples folder of the installation.
The configuration values are obtained from the timing characteristics section of the Sharp LQ035Q1DH02 data sheet.
The LCD interface setup is flexible and allows three data formats:
RGB888 (24 bits per pixel), RGB565 (16 bits per pixel), and 16-bit pass
through mode. All LCD signals are input from the processor into a Xilinx
CPLD (XC95144XL), and the CPLD drives the LCD inputs. By default,
switch SW26 is used to interface the LCD module in RGB888 mode.
The other two LCD modes are RGB565, where each pixel is represented
by two bytes, and 16-bit pass through, where all 16 bits of the PPI data
bus are connected to the CPLD and passed to the LCD. To run RGB565
or 16-bit pass through mode, configure the processor’s PPI appropriately.
For more information about setting up the LCD interface mode, see
“Mode Switch (SW26)” on page 2-21.
When setting up the LCD module in 16-bit pass through mode, ensure
PPI data signals PPID15—8 are not used elsewhere on the board because
these processor pins are multiplexed with other functionality. Switches
SW29 and SW30 disconnect the PPI data lines from the CPLD: turn SW29 all
ON and SW30 positions 1 and 2 ON to disconnect PPID15—8 from the CPLD.
See “CPLD D8–13 Switch (SW29)” on page 2-22 and “CPLD 14–
15/DCE ENB Switch (SW30)” on page 2-22 for more information.
The LCD reset is selectable between the board’s RESET signal and GPIO
controllable signal HOSTWR#_LED1 (PG11). By default, the LCD reset is connected to the board’s RESET signal. See “LCD Reset Switch (SW5)” on
page 2-13 for more information.
The verilog source code for the CPLD can be found in the reference
resource zip file in the Examples folder of the installation.
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
The LCD module can be disconnected from PPI by setting Enable2 to
high. Refer to “Mode Switch (SW26)” on page 2-21 for more
information.
Touchscreen Interface
The AD7879-1 touchscreen controller (U37) is connected to the 2-wire
interface (TWI) of the processor. Switch SW22 sets the default I2C address
to 0101111. The AD7879_1_PENIRQ interrupt signal comes from one of the
three signals connected to the SW24 switch. The default is LED0. To use two
other signals for the touch pad interrupt, set SW24 appropriately. Refer to
“Touchpad INT Switch (SW24)” on page 2-20 for more information.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to set up and access the touchscreen interface.
Keypad Interface
The ADP5520 keypad controller is used for keypad functions and connected to the TWI interface of the processor. By default, the keypad
interrupt (NINT) is set up to the KEYIRQ signal on the PF9 port pin. To use
two other signals for the keypad interrupt, set SW25 accordingly. Refer to
“LCD/KPAD CTL Switch (SW25)” on page 2-20 for more information.
The I2C address of the keypad controller is 0110101. A red LED (LED8)
can be used as a general-purpose status LED. LED8 is connected to the
ILED pin of the ADP5520 controller (U35).
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to setup and access the keypad interface.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-21
Rotary Encoder Interface
Rotary Encoder Interface
The ADSP-BF527 processor has a built-in, up-down counter interface
with support for a rotary encoder. The three-wire rotary encoder interface
connects to the rotary switch (SW3) and expansion interface connector.
The rotary encoder can be turned clockwise for the up function, counter
clockwise for the down function, or can be used as a push button for clearing the counter.
The rotary switch is a two-bit quadrature (Gray code) counter with
detent, meaning that both the down signal (CDG) and up signal (CUD) will
toggle when the count register increases on a rotation to the right. Upon
rotating to the left, both CDG and CUD will toggle, and the over all count
decreases.
If the processor pins are needed for the expansion interface, disconnect the
rotary encoder switch via the four-position rotary NAND enable switch
(SW11). For more information, see “Rotary NAND Enable Switch
(SW11)” on page 2-16.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to setup and access the rotary encoder interface.
Ethernet Interface
The ADSP-BF527 processor has an integrated Ethernet MAC with media
independent interface (MII) and reduced media independent interface
(RMII), which connects to an external PHY. The EZ-KIT Lite provides a
SMSC LAN8700 RMII Ethernet PHY with Auto-MDIX, fully compliant
with IEEE 802.2/802.2u standards. The SMSC LAN8700 chip supports
10BASE-T and 100BASE-TX operations. The part is attached gluelessly
to the processor.
The Ethernet signals are shared with NAND flash. By default, Ethernet is
turned off (SW1 OFF, OFF, ON, OFF). See “ETH Enable Switch (SW1)” on
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ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
page 2-10 for more information. It is important not to run code that
accesses the NAND while using the Ethernet interface.
The Ethernet mode is set by the SW9 switch and defaults to all capable,
auto negotiation with settings OFF, OFF, OFF, ON. See “ETH Mode Flash CS
Switch (SW9)” on page 2-14 for more information.
The Ethernet chip is pre-loaded with a MAC address for the EZ-KIT Lite.
The MAC address is stored in the public one-time programmable (OTP)
memory of the processor and can be found on a sticker on the bottom side
of the EZ-KIT Lite.
The PHY portion of the Ethernet chip is connected to a Pulse HX1188
(U26) magnetics, then to a standard RJ-45 Ethernet connector (J9). For
more information, see “Ethernet Connector (J9)” on page 2-30.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to use the Ethernet interface.
Audio Interface
The audio interface of the EZ-KIT Lite consists of an internal low-power
stereo codec with an integrated headphone driver and its associated passive
components. There are two inputs, stereo line in, and mono microphone
as well as two outputs, headphone, and stereo line out. The codec has
integrated stereo analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) and requires minimal external circuitry.
The codec is connected to the ADSP-BF527 processor via the processor’s
serial port 0A (alternate). The SPORT0A port is disconnected from the
codec by turning SW20 all OFF and SW27 positions 1 and 2 OFF. This allows
SPORT0A to be used on the expansion interface.
The TFS0A signal is shared with the Ethernet and host connectors, as well
as the RMIIMDINT# and HOSTCE# signals. SW21 allows this signal to be disconnected from the host connector by setting position 1 OFF, and STAMP
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-23
Audio Interface
connectors position 2 OFF. To connect signal TFSOA_RMIIMDINT#_HOSTCE#
to either interface, turn the corresponding switch position ON. Refer to
“TFS0A/HOSTCE Enable Switch (SW21)” on page 2-19 for more
information.
The control interface for the codec is selectable by the SW8 and SW19
switches between the TWI and SPI. By default, the board is in SPI mode,
which is set up by the SW19 switch (ON, OFF, ON, OFF) and SW8 switch
(positions 3 ON and 4 OFF). To select TWI mode, turn SW8 positions 3 OFF
and 4 ON, as well as SW19 OFF, ON, OFF, ON. Refer to “Mic/HP LPBK Audio
Mode Switch (SW8)” on page 2-14 and “SPI/TWI Switch (SW19)” on
page 2-19 for more information.
Switch SW28 can be used to tie the LEFT_IN channel to LEFT_OUT and the
channel to RIGHT_OUT, respectively. See “Line In-Out LPBK
Switch (SW28)” on page 2-22 for more information.
RIGHT_IN
Mic gain is selectable through the SW4 switch, with values of 14 dB, 0 dB,
or –6 dB, by turning ON position 1, 2, or 3 respectively. All other positions
must be OFF to achieve the desired gain. Refer to “MIC Gain Switch
(SW4)” on page 2-12 for more information.
Microphone bias is provided through a low-noise reference voltage. A
jumper on position 2 and 3 of JP6 connects the MICBIAS signal to the
audio jack. Placing the jumper on positions 1 and 2 of JP6 connects the
bias directly to the mic signal. Refer to “MIC Select Jumper (JP6)” on
page 2-23 for more information.
and J8 are 3.5 mm connectors for the audio portion of the board. J7
connects the mic on the top portion and line-in on the bottom. J8 connects the headphone on the top portion and line-out on the bottom. If
there is no 3.5 mm cable plugged into the bottom of J7 or J8, the LINEIN
to LINOUT signals are looped back inside the connector, as long as SW23
positions 3 and 4 are ON.
J7
For testing purposes, SW8 positions 1 and 2 allow the MICIN signal to be
connected to either the left or right headphone. Do not connect both left
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Using the ADSP-BF527 EZ-KIT Lite
and right to the MICIN signal at the same time—only position 1 or 2 of SW8
should be ON at the same time. Refer to “Mic/HP LPBK Audio Mode
Switch (SW8)” on page 2-14 for more information.
For more information, see “Dual Audio Connectors (J7–8)” on page 2-30.
The EZ-KIT Lite is shipped with a headphone and multiple 3.5 mm
cables, which allow you to run the example programs provided in the
EZ-KIT Lite installation directory and learn about the audio interface.
USB OTG Interface
The ADSP-BF527 processor has a built-in, high-speed USB on-the-go
(OTG) interface and integrated PHY. The interface is connected to a
24 MHz clock (U12), has a surge protector, and can be configured as a host
or a device. When in device mode, the USB 5V regulator (VR3) and FET
switch (U28) are turned OFF. When in host mode, the USB 5V regulator
and FET are turned ON and can supply 5V at 500 mA.
The control mechanism to turn the two devices on and off are via the PG13
flag pin of the processor and must be connected on the board to signal
USB_VRSEL through switch SW13. By default, USB_VRSEL is held low or a
logic 0 via a pull-down resistor, and both devices are turned off. To use
host mode and provide 5V to a device, turn SW13 position 2 OFF and
position 3 ON. This disables push button 2. Note that signal USB_VRSEL is
shared with HOSTADDR. By default, positions 2 and 3 of SW13 are ON and
OFF, which shut off the VR3 regulator and U28 FET. For more information,
see “GPIO Enable Switch (SW13)” on page 2-17.
The USB OTG interface has a mini-AB connector (P1); cables that plug
into P1 are shipped with the EZ-KIT Lite.
Use example programs in the EZ-KIT Lite installation directory to learn
about the ADSP-BF527 processor’s device and host modes. For more
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-25
UART Interface
information about the USB interface, refer to the ADSP-BF52x Blackfin
Processor Hardware Reference.
UART Interface
The ADSP-BF527 processor has two built-in universal asynchronous
receiver transmitters (UARTs). UART1—0 share the processor pins with
other peripherals on the EZ-KIT Lite.
has full RS-232 functionality via the Analog Devices 3.3V
ADM3202 line driver and receiver (U25). The UART can be disconnected
from the ADM3202 device by turning all positions of SW10 OFF. When
using UART1, SW10 position 8 should be OFF. Turning this switch provides
UART data loopback and should be ON only when running the POST program. If signals RTS and CTS are needed for flow control, the
UART1CTS_LCDSPICS_Z port pin PF10 can be configured as a GPIO for CTS.
The HWAIT port pin PG0 can be used for RTS by setting up the pin
accordingly. See “UART Enable Switch (SW10)” on page 2-15 for more
information.
UART1
signals are connected to the ADM3202 device through the CPLD
14–15/DCE enable switch (SW30). To connect TX and RX signals, turn SW30
positions 3 and 4 ON. Additionally, a flow control can be added by connecting SW30 positions 5 and 6 ON. Refer to “CPLD 14–15/DCE ENB
Switch (SW30)” on page 2-22 for more information.
UART1
UART0 and UART1 are connected to the expansion interface. UART0 of the
processor also is available via a STAMP connector (P5). See “UART0
Connector (P5)” on page 2-31.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate UART and RS-232 operations.
For more information about the UART interface, refer to the
ADSP-BF52x Blackfin Processor Hardware Reference.
1-26
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
RTC Interface
The ADSP-BF527 processor has a real-time clock (RTC) and a watchlog
timer. Typically the RTC interface is used to implement a real-time
watchlog or life counter of the time elapsed since the last system reset. The
EZ-KIT Lite is equipped with a Sanyo (CR2430) lithium coin 3V battery
supplying 280 mAh. The 3V battery and 3.3V supply of the board are
connected to the RTC power pin of the processor. When the EZ-KIT Lite
is powered, the RTC circuit uses the board power to supply voltage to the
RTC pin. When the EZ-KIT Lite is not powered, the RTC circuit uses the
lithium battery to maintain the power to the RTC pin. After removing the
mylar, the battery will last for about one year with the EZ-KIT Lite
unpowered.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate the RTC features.
EZ-KIT Lite is shipped with a protective Mylar sheet placed
 The
between the coin battery and positive pin of the battery holder.
Please remember to remove the Mylar sheet before trying to use
RTC functionality of the processor.
For more information on the RTC and watchdog timer, refer to the
ADSP-BF52x Blackfin Processor Hardware Reference.
LEDs and Push Buttons
The EZ-KIT Lite provides two push buttons and three LEDs for general-purpose I/O.
The three LEDs, labeled LED1 through LED3, are accessed via the PF8, PG11,
and PG12 pins of the processor, respectively. For information on how to
program the pins, refer to the ADSP-BF52x Blackfin Processor Hardware
Reference.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-27
JTAG Interface
is shared with a touchscreen controller interrupt and PPI data pin 8.
LED1 is shared with the HOSTWR# signal, keypad controller interrupt, touchscreen controller interrupt, and LCD reset. LED2 is shared with the
HOSTACK signal. The LED1 signal can be used for the LCD reset by turning
SW5 positions 1 ON and 2 OFF. LED2 is shared with HOSTACK and PPI_SEL
functionality. Refer to “LCD Reset Switch (SW5)” on page 2-13, “Touchpad INT Switch (SW24)” on page 2-20, “LCD/KPAD CTL Switch
(SW25)” on page 2-20, and “GPIO Enable Switch (SW13)” on page 2-17
for configuration options.
LED0
The two general-purpose push buttons are labeled PB1 and PB2. The status
of each individual button can be read through programmable flag inputs,
PG0 and PG13. The flag reads 1 when a corresponding switch is being
pressed. When the switch is released, the flag reads 0. A connection
between the push button and processor input is established through the
SW13 DIP switch.
Push button 1 is shared with HWAIT. Push button 2 is shared with
HOSTADDR and also can be connected to USB_VRSEL by setting SW13 position
2 OFF and position 3 ON. USB_VRSEL allows the USB OTG to power an
external USB device with 5V. See “USB OTG Interface” on page 1-25
and “GPIO Enable Switch (SW13)” on page 2-17 for more information.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate functionality of the LEDs and push buttons.
JTAG Interface
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory through a six-pin interface. The JTAG emulator port of the processor can be accessed via the on-board USB debug
agent or with an external emulator via the JTAG connector (ZP4). When
an external emulator connects to the board, the on-board USB debug
agent is disabled. See “JTAG Connector (ZP4)” on page 2-35 for more
information.
1-28
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
For more information about emulators, contact Analog Devices or go to:
http://www.analog.com/processors/tools/blackfin.
Expansion Interface
The expansion interface consists of three 90-pin connectors (J1—3). These
connectors contain a majority of the ADSP-BF527 processor’s signals. For
the pinout of the connectors, go to “ADSP-BF527 EZ-KIT Lite Schematic” on page B-1. The expansion interface allows an EZ-Extender® or a
custom-design daughter board to be tested across various hardware
platforms. The mechanical dimensions of the expansion connectors can be
obtained by contacting Technical Support.
Analog Devices offers many EZ-Extender products. For more information
about EZ-Extenders, visit the Analog Devices Web site at:
http://www.analog.com/processors/tools/blackfin.
Limits to current and interface speed must be taken into consideration
when using the expansion interface. Current for the expansion interface is
sourced from the EZ-KIT Lite; therefore, the current should be limited to
1A for both the 5V and 3.3V planes. If more current is required, then a
separate power connector and a regulator must be designed on a daughter
card. Additional circuitry can add extra loading to signals, decreasing their
maximum effective speed.
Devices does not support and is not responsible for the
 Analog
effects of additional circuitry.
Power Measurements
Several locations are provided for measuring the current draw from various power planes. Precision 0.05 ohm shunt resistors are available on the
VDDINT, VDDEXT, and VDDMEM pins. For current draw measuments, the associated jumper (P14, P15, or P16) should be removed. Once the jumper is
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-29
Power-On-Self Test
removed, voltage across the resistor can be measured using an oscilloscope.
Once voltage is measured, current can be calculated by dividing the voltage by 0.05. For the highest accuracy, a differential probe should be used
for measuring the voltage across the resistor.
For more information, see “VDDINT Power Jumper (P14)”, “VDDEXT
Power Jumper (P15)”, and “VDDMEM Power Jumper (P16)” on
page 2-25.
Power-On-Self Test
The power-on-self program (POST) tests all EZ-KIT Lite peripherals and
validates functionality as well as connectivity to the processor. Once
assembled, each EZ-KIT Lite is fully tested for an extended period of time
with a POST. All EZ-KIT Lites are shipped with the POST preloaded
into parallel flash (U5) and SPI flash (U8) memories. The POST is executed
by resetting the board and pressing the proper push button(s). The POST
also can be used for reference for a custom software design or hardware
troubleshooting.
When running the POST, you may need to place switches and jumpers in
specific test modes. In some instances, such as Ethernet, you may need to
plug in an Ethernet loopback connector (provided with the EZ-KIT Lite)
to run the POST. The user LEDs (LED1—3) convey whether the specific
tests have passed or failed.
Note that the source code for the POST program is included in the
EZ-KIT Lite installation directory along with the readme file, which
describes how the board is configured to run POST.
 The POST program is only available when using VisualDSP++.
1-30
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Using the ADSP-BF527 EZ-KIT Lite
Example Programs
Example programs are provided with the ADSP-BF527 EZ-KIT Lite to
demonstrate various capabilities of the product. The programs are
included in the product installation kit and can be found in the Examples
folder of the installation. Refer to a readme file provided with each example for more information.
CCES users are encouraged to use the example browser to find examples
included with the EZ-KIT Lite Board Support Package.
Board Design Database
A .zip file containing all of the electronic information required for the
design, layout, fabrication and assembly of the product is available for
download from the Analog Devices board design database at:
http://www.analog.com/board-design-database.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
1-31
Board Design Database
1-32
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2 ADSP-BF527 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-BF527 EZ-KIT
Lite board.
The following topics are covered.
• “System Architecture” on page 2-2
Describes the ADSP-BF527 EZ-KIT Lite board configuration and
explains how the board components interface with the processor.
• “Programmable Flags” on page 2-3
Shows the locations and describes the programming flags (PFs).
• “Push Buttons and Switches” on page 2-10
Shows the locations and describes the on-board push buttons and
switches.
• “Jumpers” on page 2-23
Shows the locations and describes the on-board configuration
jumpers.
• “LEDs” on page 2-26
Shows the locations and describes the on-board LEDs.
• “Connectors” on page 2-28
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (Figure 2-1).
25 MHz
Oscillator
64 MB
SDRAM
(32M x 16)
USB
USB
OTG
Conn
Ethernet Phy
RMII
MAC
24 MHz
Oscillator
RJ45
RTC
JTAG
Port
USB
Conn
Debug
Agent
+3.0 LI-ION
RTC Battery
CLKIN
4 MB
Flash
(2M x 16 )
EBIU
4 Gb
NAND Flash
(512M x 8 )
ADSP-BF527
DSP
600 MHz
LFBGA-SS2, 12mmX12mm/0.5 pitch
289, 4L, (A02)
UARTs
SPI
SPORTs
PPI
Expansion
Connectors
(3)
NAND
UP/DOWN
CNTR
32.768 KHz
Oscillator
LEDs (3)
PBs (2)
IDC
Conn
TWI
4x4 Keypad Controller
ADP5520
16 Mb
SPI Flash
ADM3202
RS-232
TX/RX
IDC
Conn
Power
Regulation
Touch Screen
Controller AD7879-1
SPI
IDC
Conn
RS-232
Female
+7V
Connector
Rotary
HOST
PORT
JTAG
Header
12 MHz
Oscillator
(2)
IDC
Conn
Audio
Codec
Internal
PPI
IDC
Conn
IDC
Conn
LCD (16 bit max)
QVGA Landscape
Xilinx
XC95144XL
CPLD
Figure 2-1. System Architecture
The EZ-KIT Lite is designed to demonstrate the ADSP-BF527 processor
capabilities. The processor has an I/O voltage of 3.3V. The core voltage of
the processor is controlled by the internal voltage regulator.
2-2
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Hardware Reference
The core voltage and clock rate can be set on the fly by the processor. The
input clock is 25 MHz. A 32.768 kHz crystal supplies the real-time clock
(RTC) inputs of the processor. The default boot mode for the processor is
external parallel flash boot. See “Boot Mode Select Switch (SW2)” on
page 2-11 for information on how to change the default boot mode.
Programmable Flags
The processor has 50 general-purpose input/output (GPIO) signals spread
across four ports (PF, PG, PH, and PJ). The pins are multi-functional and
depend on the ADSP-BF527 processor setup. The following tables show
how the programmable flag pins are used on the EZ-KIT Lite.
•
PF
programmable flag pins in Table 2-1
•
PG
programmable flag pins in Table 2-2
•
PH
programmable flag pins in Table 2-3
•
PJ
programmable flag pins in Table 2-4
Table 2-1. PF Port Programmable Flag Connections
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PF0
PPID0/DR0PRI/ND_D0A
Default: LCD via CPLD.
Expansion interface via J1.72.
PPI connector via P8.8.
PF1
PPID1/RFS0/ND_D1A
Default: LCD via CPLD.
Expansion interface via J1.73.
PPI connector via P8.9.
PF2
PPID2/RSCLK0/ND_D2
Default: LCD via CPLD.
Expansion interface via J1.74.
PPI connector via P8.10.
PF3
PPID3/DT0PRI/ND_D3A
Default: LCD via CPLD.
Expansion interface via J1.75.
PPI connector via P8.11.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-3
Programmable Flags
Table 2-1. PF Port Programmable Flag Connections (Cont’d)
2-4
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PF4
PPID4/TFS0/ND_D4A/
TACLK0
Default: LCD via CPLD.
Expansion interface via J2.43.
PPI connector via P8.12.
PF5
PPID5/TSCLK0/ND_D5A/
TACLK1
Default: LCD via CPLD.
Expansion interface via J2.44.
PPI connector via P8.13.
PF6
PPID6/DT0SEC/ND_D6A/
TACI0
Default: LCD via CPLD.
Expansion interface via J2.45.
PPI connector via P8.14.
PF7
PPID7/DR0SEC/ND_D7A/
TACI1
Default: LCD via CPLD.
Expansion interface via J2.46.
PPI connector via P8.15.
PF8
PPID8/DR1PRI
Default: LED1.
LCD via CPLD, SW29, and JP15.
Touchscreen interrupt via SW24.1 and JP15.
Expansion interface via J1.79, J2.29, and J2.47.
Via a quick switch U30 and JP15 to the following connectors: SPORT0 P6.25, SPORT1 P7.8, SPI P9.14,
TWI P10.10, and PPI P8.24.
PF9
PPID9/RSCLK1/SPISEL6#
Default: KEYIRQ# (U35) via SW25.4.
LCD via CPLD and SW29.
Expansion interface via J2.48 and J2.33.
Via a quick switch U38 to SPORT1 connector P7.16
and PPI connector P8.17.
PF10
PPID10/PRFS1/SPISEL7#
Default: LCD_SPICS via SW25.1.
LCD via CPLD and SW29.
CTS UART1 U25 via SW10.3 and SW30.
Expansion interface via J2.31 and J2.49.
Via a quick switch U38 to SPORT1 connector P7.7 and
PPI connector P8.18.
PF11
PPID11/TFS1/CZM
Default: CZM rotary (SW3) via SW11.3.
LCD via CPLD and SW29.
Expansion interface via J2.32 and J2.50.
Via a quick switch U30 to PPI connector P8.19 and
SPORT1 connector P7.11.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Hardware Reference
Table 2-1. PF Port Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PF12
PPID12/DT1PRI/
SPISEL2#/CDG
Default: CDG rotary (SW3) via SW11.2.
LCD via CPLD and SW29.
Expansion interface via J2.30 and J2.51.
Via a quick switch U31 to the following connectors: SPI
P9.9, SPORT1 P7.14 and P7.19, PPI P8.20 and
P8.26, SPORT0 P6.19.
PF13
PPID13/TSCLK1/
SPISEL3#/CUD
Default: CUD rotary (SW3) via SW11.1.
LCD via CPLD and SW29.
Expansion interface via J2.34 and J2.52.
Via a quick switch U30 to the following connectors:
SPORT1 P7.6 and P7.21, SPORT0 P6.21, PPI P8.21
and P8.25, SPI P9.12.
PF14
PPID14/DT1SEC/UART1TX
Default: UART1 (U25) TX via SW30.
LCD via CPLD and SW30.
Expansion interface via J2.28, J2.53, J2.55, J3.8.
Via a quick switch U38 to SPORT1 connector P7.12,
and PPI connector P8.22.
PF15
PPID15/DR1SEC/UART1RX/T
ACI3
Default: UART1 (U25) RX via SW10.2 and SW30.
LCD via CPLD and SW30.
Expansion interface via J2.27, J2.54, J2.56, J3.7,
SPORT1 connector P7.10, and PPI connector P8.23
Table 2-2. PG Port Programmable Flag Connections
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PG0
HWAIT
Default: PB1 via SW13.1.
UART1 RTS (HWAIT) via SW10.1 and SW30, host connector P13.12, and expansion interface J1.84.
PG1
SPISS#/SPISEL1#
Default: SPI flash (U8) CS via SW9.4.
LCD CS via SW25.2, expansion interface J2.11, via
quick switch U31 to the following connectors: SPI
P9.10, PPI P8.27, SPORT0 P6.17, and SPORT1
P7.17.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-5
Programmable Flags
Table 2-2. PG Port Programmable Flag Connections (Cont’d)
2-6
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PG2
SPISCK
Default: SPI flash (U8), codec (U2) via SW19, and LCD.
Expansion interface J2.9, via quick switch U31 to the
following connectors: SPI P9.8, SPORT0 P6.22,
SPORT1 P7.22, and PPI P8.34.
PG3
SPIMISO/DR0SECA
Default: SPI flash (U8) and LCD.
Via a quick switch (U31) to the following connectors:
SPI P9.6, SPORT0 P6.10 and P6.20, SPORT1
P7.20, and PPI P8.32, and expansion interface J2.12,
J2.35.
PG4
SPIMOSI/DT0SECA
Default: SPI flash (U8), codec (U2) via SW19, and LCD.
Via a quick switch (U31) to the following connectors:
SPORT0 P6.12 and P6.18, SPORT1 P7.18, SPI
P9.5, PPI P8.30, and expansion interface J2.10,
J2.36.
PG5
TMR1/PPIFS2/TFS0A
Default: LCD via CPLD.
PPI connector P8.33, expansion interface J2.24.
PG6
DT0PRIA/TMR2/PPIFS3
Default: SPORT0 audio codec (U2) via SW20.2.
Via JP14 to PPI connector P8.29 and SPORT0 connector P6.14. Expansion interface via J2.38, J2.23.
PG7
TMR3/DR0PRIA/UART0TX
Default: SPORT0 audio codec (U2) via SW20.3.
Via a quick switch (U34) to the following connectors:
UART0 P5.6, SPORT0 P6.8 and P6.28, SPORT1
P7.28, timers P11.6, and expansion interface J2.37,
J3.6.
PG8
TMR4/RFS0A/UART0RX/
TACI4
Default: SPORT0 audio codec (U2) via SW20.4.
Via a quick switch (U34) to the following connectors:
SPORT0 P6.7 and P6.30, SPORT1 P7.30, timers
P11.8, UART0 P5.10, and expansion interface J2.39,
J3.5.
PG9
TMR5/RSCLK0A/TACI5
Default: SPORT0 audio codec (U2) via SW23.2.
Via a quick switch (U34) to the following connectors:
SPORT0 P6.32 and P6.16, SPORT1 P7.32, timers
P11.10, and expansion interface J2.41.
PG10
TMR6/TSCLK0A/TACI6
Default: SPORT0 audio codec (U2) via SW23.1.
SPORT0 connector P6.6, expansion interface J2.42.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Hardware Reference
Table 2-2. PG Port Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PG11
TMR7/HOST_WR#
Default: LED2.
Keypad interrupt via SW25.5, touchscreen interrupt via
SW24.2, LCD reset via SW5.1. Host connector P13.4,
via a quick switch to the following connectors:
SPORT0 P6.27, UART0 P5.3, SPORT1 P7.29, TWI
P10.9, timers P11.3, SPI P9.15, and expansion interface J1.80.
PG12
DMAR1/UART1TXA/
HOST_ACK
Default: LED3.
PPI_SEL via SW13.4, host connector P13.10, via a
quick switch (U30) to the following connectors:
UART0 P5.5, timers P11.5, TWI P10.12, SPORT0
P6.29, SPORT1 P7.31, SPI P9.16, and expansion
interface J1.81.
PG13
DMAR0/UART1RXA/
HOST_ADDR/TACI2
Default: PB2 via SW13.2.
OTG USB_VRSEL via SW13.3 ON and SW13.2 OFF, host
connector P13.8, and expansion interface J1.85.
PG14
TSCLK0A/MDC/HOST_RD#
Default: host connector P13.6.
MDIO PHY (U14) via SW1.2, expansion interface J3.41.
PG15
TFS0A/MIIPHYINT#/
RMIIMDINT#/HOST_CE#
Default: SPORT0 audio codec (U2) via SW20.1.
RMIIMDINT# PHY (U14), host connector P13.6,
SPORT0 connector P6.11, and expansion interface
J2.40, J3.31.
Table 2-3. PH Port Programmable Flag Connections
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PH0
ND_D0/MIICRS/
RMIICRSDV/HOST_D0
Default: NAND Data 0 (U4).
RMII carrier sense/receive data valid (U14.36), host
connector data 0 (P13.31), and expansion interface
(J3.40).
PH1
ND_D1/ERXER/HOST_D1
Default: NAND Data 1 (U4).
PHY receive error (U14.21), host connector data 1
(P13.29), expansion interface (J3.39).
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-7
Programmable Flags
Table 2-3. PH Port Programmable Flag Connections (Cont’d)
2-8
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PH2
ND_D2/MDIO/HOST_D2
Default: NAND Data 2 (U4).
PHY management bus MDIO via SW1.1, host connector
data 2 (P13.27), and expansion interface (J3.42).
PH3
ND_D3/ETXEN/HOST_D3
Default: NAND Data 3 (U4).
PHY transmit enable (U14.6), host connector data 3
(P13.25), and expansion interface (J3.15).
PH4
ND_D4/MIITXCLK/
RMIIREF_CLK/
HOST_D4
Default: NAND Data 4 (U4).
PHY RMII ref clock (U14.14) via SW1.3 OFF, oscillator
output U24, host connector data 4 (P13.23), and
expansion interface (J3.16).
PH5
ND_D5/ETXD0/HOST_D5
Default: NAND Data 5 (U4).
PHY RMII transmit data 0 (U14.23), host connector
data 5 (P13.21), and expansion interface (J3.11).
PH6
ND_D6/ERXD0/HOST_D6
Default: NAND Data 6 (U4).
PHY RMII receive data 0 (U14.18), PHY mode via
SW9.3, host connector data 6 (P13.19), and expansion
interface (J3.33).
PH7
ND_D7/ETXD1/HOST_D7
Default: NAND Data 7 (U4).
PHY RMII transmit data 1 (U14.24), host connector
data 7 (P13.17), and expansion interface (J3.12).
PH8
SPISEL4#/ERXD1/
HOST_D8/TACLK2
Default: NAND Data 7 (U4).
PHY RMII transmit data 1 (U14.24), keypad/touchscreen chip select via SW18.2, host connector data 8
(P13.17), and expansion interface (J3.12).
PH9
SPISEL5#/ETXD2/
HOST_D9/TACLK3
Default: SPI SEL5 audio codec U2.
Host connector data 9 (P13.13), expansion interface
(J3.13).
PH10
ND_CE#_ERXD2/HOST_D10
Default: NAND chip enable via SW11.4 ON.
Host connector data 10 (P13.17), expansion interface
(J3.35).
PH11
ND_WE/ETXD3/HOST_D11
Default: NAND write enable (U4).
Host connector data 11 (P13.9), expansion interface
(J3.14).
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Hardware Reference
Table 2-3. PH Port Programmable Flag Connections (Cont’d)
Processor Pin
Other Processor Function
EZ-KIT Lite Function
PH12
ND_RE/ERXD3/HOST_D12
Default: NAND output enable (U4).
Host connector data 12 (P13.7), expansion interface
(J3.36).
PH13
ND_BUSY/ERXCLK/
HOST_D13
Default: NAND busy (U4).
Host connector data 13 (P13.5), expansion interface
(J3.38).
PH14
ND_CLE/ERXDV/HOST_D14
Default: NAND command latch enable (U4).
Host connector data 14 (P13.3), expansion interface
(J3.37).
PH15
ND_ALE/COL/HOST_D15
Default: NAND address latch enable (U4).
Host connector data 15 (P13.1), expansion interface
(J3.32).
Table 2-4. PJ Port Programmable Flag Connections
Processor Pin
Other Processor Function EZ-KIT Lite Function
PJ0
PPIFS1/TMR0
Default: LCD via CPLD.
PPI connector (P8.31), expansion interface (J2.25).
PJ1
PPICLK/TMRCLK
Default: LCD via CPLD.
Output of switch (U20), PPI connector (P8.6), and
expansion interface (J1.71).
PJ2
SCL
Default: touchscreen (U37).
Codec via SW19.4, expansion interface (J2.57), the following connectors via a quick switch (U31): TWI
(P10.5), PPI (P8.38), SPORT0 (P6.26), and SPORT1
(P7.26).
PJ3
SDA
Default: touchscreen (U37).
Codec via SW19.4, expansion interface (J2.58), the following connectors via a quick switch (U31): TWI
(P10.6), PPI (P8.36), SPORT0 (P6.24), and SPORT1
(P7.24).
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Push Buttons and Switches
Push Buttons and Switches
This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-2.
Figure 2-2. Push Button and Switch Locations
ETH Enable Switch (SW1)
The Ethernet enable switch (SW1) allows the Ethernet to operate. Ethernet
and NAND flash share the same lines and cannot operate at the same
time. By default, SW1 is OFF, OFF, ON, OFF (see Table 2-5). Ethernet is
enabled by setting the switch to ON, ON, OFF, ON. SW1 positions 1 and 2 connect the management bus (MDIO and MDC). SW1 position 3 enables the
50 MHz RMII clock. SW1 position 4 holds the PHY in reset (set to OFF) or
connects the PHY reset to the EZ-KIT Lite reset (set to ON).
2-10
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Table 2-5. ETH Enable Switch (SW1)
SW1 Switch Setting
Ethernet Mode
OFF, OFF, ON, OFF
OFF (default)
ON, ON, OFF, ON
ON
Boot Mode Select Switch (SW2)
The rotary switch (SW2) determines the boot mode of the processor.
Table 2-6 shows the available boot mode settings. By default, the
ADSP-BF527 processor boots from the on-board parallel flash memory.
The selected position of
is marked by the notch down the
 entire
rotating portion of the switch, not the small arrow.
SW2
Table 2-6. Boot Mode Select Switch (SW2)
SW2 Position
Processor Boot Mode
0
Reserved
1
Boot from 8-bit external flash memory (default)
2
Boot from 16-bit asynchronous FIFO
3
Boot from serial SPI memory
4
Boot from SPI host device
5
Boot from serial TWI memory
6
Boot from TWI host
7
Boot from UART0 host
8
Boot from UART1 host
9
Reserved
A
Boot from SDRAM
B
Reserved
C
Boot from 8-bit NAND flash PORTF
D
Boot from 8-bit NAND flash PORTH
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Push Buttons and Switches
Table 2-6. Boot Mode Select Switch (SW2) (Cont’d)
SW2 Position
Processor Boot Mode
E
Boot from 16-bit host DMA
F
Boot from 8-bit host DMA
Rotary Encoder With Momentary Switch (SW3)
The rotary encoder (SW3) can be turned clockwise for an up count or
counter-clockwise for a down count. The encoder also features a momentary switch, activated by pushing down the switch and setting the counter
to zero. The rotary encoder is a two-bit quadrature (Gray code) encoder.
Refer to the “Rotary Counter” section in the ADSP-BF52x Hardware Reference Manual for additional information about interfacing with the rotary
encoder.
The rotary encoder can be disconnected from the processor by setting the
rotary enable switch SW11 positions 1, 2 and 3 to OFF. See “Rotary NAND
Enable Switch (SW11)” on page 2-16 for more information.
MIC Gain Switch (SW4)
The microphone gain switch (SW4) sets the gain of the MIC signal, which
is connected to the top 3.5 mm jack (J7). The gain can be set to 14 dB,
0 dB, or –6 dB by turning position 1, 2 or 3 of the switch ON
(see Table 2-7). When the corresponding position for the desired gain is
ON, the remaining positions should be OFF. Refer to “Audio Interface” on
page 1-23 for more information about the audio codec.
Table 2-7. MIC Gain Switch (SW4)
Gain
SW4 Switch Settings
5 (14 dB)
ON, OFF, OFF, OFF
1 (0 dB)
OFF, ON, OFF, OFF
2-12
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Table 2-7. MIC Gain Switch (SW4) (Cont’d)
Gain
SW4 Switch Settings
0.5 (–6 dB)
OFF, OFF, ON, OFF (default)
Unused
OFF, OFF, OFF, OFF
LCD Reset Switch (SW5)
The LCD reset switch (SW5) in default mode connects the general RESET
line to the LCD_RESET line. By default, SW5.2 is ON. When SW5.1 is set to
ON, LCD_RESET comes from HOSTWR#_LED1 (see Table 2-8).
Table 2-8. LCD Reset Switch (SW5)
SW5 Position
(Default)
From
To
Function
1 (OFF)
Processor
(U2, PG11)
LCD
RESET
Resets the LCD through the processor’s PG11 pin
2 (ON)
Main reset
(U27)
LCD
RESET
Reset the LCD through the main reset
Flash Enable Switch (SW7)
The flash enable switch (SW7) disconnects AMS signals from flash memory,
allowing other devices to utilize the signals via the expansion interface. For
each switch listed in Table 2-9 that is turned OFF, the size of available flash
memory is reduced by 1 MB.
Table 2-9. Flash Enable Switch (SW7)
SW7 Switch Position (Default)
Processor Signal
1 (ON)
AMS0
2 (ON)
AMS1
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Push Buttons and Switches
Table 2-9. Flash Enable Switch (SW7) (Cont’d)
SW7 Switch Position (Default)
Processor Signal
3 (ON)
AMS2
4 (ON)
AMS3
Mic/HP LPBK Audio Mode Switch (SW8)
The audio mode select switch SW8 places the EZ-KIT Lite in loopback
mode to test signal/circuit continuity and functionality (see
“Power-On-Self Test” on page 1-30).
positions 1 and 2 connect the MICIN signal to the headphone left and
right outputs for audio loopback. Do not turn SW8 positions 1 and 2 ON at
the same time.
SW8
positions 3 and 4 select the control interface for the audio codec.
SW8 position 3 ON and 4 OFF select SPI interface, while position 3 OFF and
position 4 ON select TWI mode. The SW8 default settings are OFF, OFF, ON,
OFF. See “SPI/TWI Switch (SW19)” on page 2-19 for more information.
SW8
ETH Mode Flash CS Switch (SW9)
The Ethernet mode flash CS switch (SW9) sets the bootstrapping options
for the LAN8700 RMII PHY chip (U14). Table 2-10 shows the SW9 default
as well as the alternate switch settings.
position 4 disconnects SPISEL1 from the SPI flash chip (U8). Setting
position 4 OFF is useful when using SPISEL1 on the expansion interface at connector J2 pin 11. By default, SW9 position 4 is ON.
SW9
SW9
2-14
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Table 2-10. ETH Mode Flash CS Switch (SW9)
SW9 Switch Setting MODE[2:0]
Setting
Mode Definitions
OFF, OFF, OFF
111
All capable, auto negotiation (default)
OFF, OFF, ON
110
Power down mode
OFF, ON, OFF
101
Repeater mode, auto negotiation
OFF, ON, ON
100
100Base-TX half duplex advertised, auto negotiation
ON, OFF, OFF
011
100Base-TX full duplex
ON, OFF, ON
010
100Base-TX half duplex
ON, ON, OFF
001
10Base-T full duplex
ON, ON, ON
000
10Base-T half duplex
UART Enable Switch (SW10)
The UART enable switch (SW10) disconnects UART1 signals from the GPIO
pins of the processor (see Table 2-11). When SW10 is OFF, its associated
GPIO signals can be used for other functions. By default, SW10 is OFF, ON,
OFF, OFF, OFF, OFF, OFF, OFF. Flow control is not implemented in POST
programs, so SW10 positions 1 and 3 are OFF. Refer to the ADM3202 data
sheet for more information about the UART interface.
Table 2-11. UART Enable Switch (SW10)
POS
From
To
SW10.1
HWAIT_PUSHBUTTON1 (PG0)
(U2)
T2IN
UART1RX (PF15)
U25
SW10.2
in U25
Default
Alternate Function
OFF
Ties URT1RTS to T2IN
ON
Disconnects UART1RX
OFF
CTS
OFF
Loopback of CTS to RTS
(U2)
SW10.3
UART1CTS_LCDSPICS (PF10)
(U2)
R2OUT
SW10.4
R2OUT
T2IN
in U25
in U25
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
flow control signal
2-15
Push Buttons and Switches
Table 2-11. UART Enable Switch (SW10) (Cont’d)
POS
From
To
Default
Alternate Function
SW10.5
R2OUT
SOFT_RESET
OFF
Soft resets the processor
through UART
SW10.6
Pin 7 in J4
R2IN
in U25
OFF
Ties pin 7 in J4 to R2IN
SW10.7
Pins 1, 4, 6 in J4
R2IN
in U25
OFF
Ties pins 1, 4, 6 in J4 to
R2IN
SW10.8
UART1TX
UART1RX
OFF
Loopback of TX to RX
Rotary NAND Enable Switch (SW11)
The rotary NAND enable switch (SW11) disconnects the rotary encoder
signals from the GPIO pins of the processor. When SW11 is OFF, its associated GPIO signals can be used on the host interface (see Table 2-12).
Position 4 of SW11 disconnects the chip enable for NAND flash memory
(U4).
Table 2-12. Rotary NAND Enable Switch (SW11)
SW11 Position
(Default)
From
To
Alternate Function/OFF Mode
1 (ON)
Encoder
(SW3)
Processor
(U2, PF13)
Expansion interface (J2.34, J2.52) STAMP buffer
(U34)
2 (ON)
Encoder
(SW3)
Processor
(U2, PF12)
CS audio codec (U2), CS keypad/touch controller
(U16), expansion interface (J2.30, J2.51), STAMP
buffer (U30)
3 (ON)
Encoder
(SW3)
Processor
(U2, PF11)
Expansion interface (J2.32, J2.50), STAMP buffer (U34)
4 (ON)
Processor
(U2, PH10)
NAND
(U4)
Host connector (P13.11), expansion interface
(J3.35)
2-16
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GPIO Enable Switch (SW13)
The general-purpose input/output (GPIO) switch (SW13) disconnects the
associated push buttons and LED circuits from the GPIO pins of the processor and allows the signals to be used for other functions. Depending on
the switch configuration, the signals can be used as PPI clock select,
keypad_busy, or OTG host mode 5V select (see Table 2-13).
Table 2-13. GPIO Enable Switch (SW13)
SW13
Position
(Default)
From
To
Function
1 (ON)
Push
button 1
Processor
(U2, PG0)
ON (PB1), OFF (UART1 CTS U25, host connector
P13.12, keypad busy SW13.8, expansion interface
J1.84)
2 (ON)
Push
button 2
Processor
(U2, PG13)
ON (PB2), OFF (host connector P13.8, OTG voltage
select SW13.7, expansion interface J1.85)
3 (OFF)
OTG PWR
(VR3, U28)
Processor
(U2, PG13)
OFF (host connector P13.8, expansion interface
J1.85), ON (PB2 SW13.11, OTG power VR3, U28)
4 (OFF)
Processor
(U2, PG12)
PPI CLK
(U20)
OFF (LED2, host connector P13.10, expansion interface J1.81, STAMP buffer U34), ON (PPI CLK U20)
To select an on-board or external PPI clock through software, set SW13
position 4 ON. Drive the PG12 programmable flag to low (0) to connect an
external expansion interface clock. Drive PG12 high to select the on-board
PPI oscillator. By default, SW13 position 4 is OFF, and the PPI clock source
is on-board.
The USB_VRSEL signal is used to provide 5V to a device connected over the
USB OTG interface when running in host mode. Signal USB_VRSEL is connected by setting SW13 position 2 OFF and position 3 ON. Then the PG13
programmable flag pin of the processor can be used to control the 5V regulator (VR3). Refer to “USB OTG Interface” on page 1-25 for more
information.
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2-17
Push Buttons and Switches
Programmable Flag Push Buttons (SW14–15)
Two momentary push buttons (SW14—15) are provided for general-purpose
user input. The push buttons are connected to the PG0 and PG13 GPIO
pins of the processor. The push buttons are active high and, when pressed,
send a high (1) to the processor. The GPIO enable switch (SW13) disconnects the push buttons from the corresponding PB signal. Refer to “GPIO
Enable Switch (SW13)” on page 2-17 for more information.
Reset Push Button (SW16)
The reset push button (SW16) resets the following ICs.
• Processor (U2), parallel flash (U5), PHY (U14) if SW1 position 4 is ON
• LCD (P12) if SW5 position 1 is OFF and 2 is ON
• CPLD (U34)
The reset push button does not reset the following ICs.
• SDRAM (U7), NAND flash (U4), SPI flash (U8)
• Audio codec (U2), keypad controller (U35), touchscreen
controller (U37)
• UART1 (U25)
The reset push button does not reset the debug agent once it has been
connected to a PC. The USB chip is not reset when the push button is
pressed after the USB cable has been plugged in and communication with
the PC has been initialized correctly. After USB communication has been
initialized, the only way to reset the USB chip is by powering down the
board.
2-18
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SPI/TWI Switch (SW19)
The SPI/TWI switch (SW19) selects the control interface for the audio
codec. By default, SW19 is ON, OFF, ON, OFF (SPI interface is selected). TWI
is selected by setting SW19 to OFF, ON, OFF, ON. See “Mic/HP LPBK Audio
Mode Switch (SW8)” on page 2-14 for more information on how to set
up the audio mode.
SPORT0A ENBL Switches (SW20 and SW27)
The SPORT0A enable switches (SW20 and SW27) connect the SPORT0A interface of the processor to the audio codec. When SPORT0A is needed at the
expansion interface, turn SW20, SW27.1, and SW27.2 all OFF. By default, the
switches are all ON.
TFS0A/HOSTCE Enable Switch (SW21)
The TFS0A/HOSTCE enable switch (SW21) disconnects the PG15 programmable flag signal TFS0A_RMIIMDINT#_HOSTCE# from SPORT0 (position 1)
connector P6 pin 11 and host connector (position 2) P13 pin 6. By default,
SW21 is OFF, OFF.
Touch ADD Switch (SW22)
The touchscreen address switch (SW22) sets the I2C address of the
AD7879-1 controller (U37) as shown in Table 2-14.
Table 2-14. AD7879-1 (U37) I2C Address Options
SW22.1 Setting
SW22.2 Setting
I2C Address
ON
ON
0101 100
ON
OFF
0101 101
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2-19
Push Buttons and Switches
Table 2-14. AD7879-1 (U37) I2C Address Options (Cont’d)
SW22.1 Setting
SW22.2 Setting
I2C Address
OFF
ON
0101 110
OFF
OFF
0101 111 (default)
Touchpad INT Switch (SW24)
The touchpad interrupt switch (SW24) selects a GPIO signal as the
AD7879-1 controller’s (U37) interrupt signal. The signal options are:
•
LED0 (PF8)
on position 1
•
HOSTWR#_LED1 (PG11)
•
SPISEL5#_HOSTD9 (PH9)
on position 2
on position 3
Position 4 is not connected to any signals. By default, SW24 is ON, OFF, OFF,
OFF.
LCD/KPAD CTL Switch (SW25)
The LCD/keypad control switch (SW25) selects the LCD SPI chip select
and interrupt line signals for the ADP5520 keypad controller (U35).
The signal options for the LCD SPI chip select are:
2-20
•
UART1CTS_LCDSPICS (PF10)
•
SPISEL1 (PG1)
•
SPISEL5#_HOSTD9 (PH9)
on position 1
on position 2
on position 3.
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ADSP-BF527 EZ-KIT Lite Hardware Reference
The signal options for the keypad interrupt are:
•
KEYIRQ# (PF9)
on position 4
•
HOSTWR#_LED1 (PG11)
•
SPISEL5#_HOSTD9 (PH9)
on position 5
on position 6.
By default, SW25 is ON, OFF, OFF, ON, OFF, OFF.
other board settings before making a selection for this
 Check
switch. Many signals are multiplexed with other functions and may
cause a conflict if not handled appropriately.
Mode Switch (SW26)
The mode switch (SW26) selects the mode between the LCD and CPLD
interfaces. See Table 2-15.
Table 2-15. LCD Mode Interface Select Switch (SW26)
SW26 Positions 2, 1
Mode Definition
ON, ON
16-bit PPI pass through
ON, OFF
16-bit PPI pass through
OFF, ON
RGB565 input mMode 16BPP
OFF, OFF
RGB888 input mode 24BPP (default)
positions 3, 4, and 5 are not used and available for future use. SW26
position 6 enables a PPI data buffer between the processor and LCD
(active low). By default, SW26 is OFF, OFF, ON, ON, ON, ON.
SW26
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-21
Push Buttons and Switches
Line In-Out LPBK Switch (SW28)
The line in/out loopback switch (SW28) disconnects LINEIN audio signals
from LINEOUT (the signals are no longer looped back). The loopback also
can be broken by plugging a cable into the bottom of the J7 or J8 connector. SW28 is ON when a POST example is running.
CPLD D8–13 Switch (SW29)
The CPLD D8–13 switch (SW29) connects PPI data lines 8–13 to the
CPLD. By default, SW29 is all OFF.
CPLD 14–15/DCE ENB Switch (SW30)
The CPLD 14–15/DCE enable switch (SW30) disconnects the processor’s
signals from the EZ-KIT Lite’s peripherals:
• Positions 1 and 2 disconnect PPI data lines 14-15 from the CPLD.
• Positions 3 and 4 disconnect UART1TX and UART1RX signals from the
DCE (UART) interface.
• Positions 5 and 6 disconnect flow control signals from the DCE
(UART) interface.
By default, SW30 is OFF, OFF, ON, ON, OFF, OFF.
2-22
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ADSP-BF527 EZ-KIT Lite Hardware Reference
Jumpers
This section describes functionality of the configuration jumpers.
Figure 2-3 shows the jumper locations.
Figure 2-3. Configuration Jumper Locations
MIC Select Jumper (JP6)
The MIC select jumper (JP6) connects the MICBIAS signal to the MICIN
(JP6 on 1 and 2) or the 3.5 mm connector J7 pin 3 (JP6 on 2 and 3). By
default, JP6 is installed on 2 and 3.
STAMP Enable Jumper (JP7)
STAMP connectors have a number of nets connected by enabling quick
switches at locations U30, U31, and U38. When installed, the STAMP
enable jumper (JP7) enables the quick switches. Table 2-16 lists the
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-23
Jumpers
signals that are connected when JP7 is installed. By default. JP7 is
uninstalled.
Table 2-16. STAMP Enable Jumper (JP7)
STAMP Signals Connected through Quick Switches U30–31, U38
SCL
DR0PRIA
SDA
RFS0A
SPISCK
CZM
SPISEL1
CUD
SPISEL2#_CDG
LED0
SPIMISO
HOSTWR#_LED1
SPIMOSI
HOSTACK_LED2
RSCLK0A
KEYIRQ#, UART1CTS_LCDSPICS, UART1TX
Flash WP Jumper (JP10)
The flash WP jumper (JP10) is used to write-protect block 70 of the
parallel flash chip. Block 70 contains 64 KB of configuration data at
address range 0x203 F0000—0x203 FFFFF. When the jumper is installed on
JP10, and the parallel flash driver from Analog Devices is used, block 70 is
read-only. By default, JP10 is not installed.
STP ENB Enable Jumper (JP14)
The stamp enable jumper (JP14) connects the DT0PRIA_PPIFS3 signal to
the STAMP interface connectors. By default, JP14 is uninstalled.
LED0 OFF Jumper (JP15)
The LED0 OFF jumper (JP15) disconnects the LED0 signal from the
following switches: SW24, SW29, and a quick switch U38.
2-24
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VDDINT Power Jumper (P14)
The VDDINT power jumper (P14) is used to measure the core voltage and
current supplied to the processor core. By default, P14 is ON, and the power
flows through the two-pin IDC header. To measure power, remove the
jumper and measure voltage across the 0.05 ohm resistor. Once voltage is
measured, the power can be calculated. For more information, refer to
“Power Measurements” on page 1-29.
VDDEXT Power Jumper (P15)
The VDDEXT power jumper (P15) is used to measure the processor’s I/O
voltage and current. By default, JP15 is ON, and the power flows through
the two-pin IDC header. To measure power, remove the jumper and measure voltage across the 0.05 ohm resistor. Once voltage is measured, the
power can be calculated.
VDDMEM Power Jumper (P16)
The VDDMEM power jumper (P16) is used to measure the voltage and current
supplied to the memory interface of the processor. By default, P16 is ON,
and the power flows through the two-pin IDC header. To measure power,
remove the jumper and measure voltage across the 0.05 ohm resistor.
Once voltage is measured, the power can be calculated.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-25
LEDs
LEDs
This section describes the on-board LEDs. Figure 2-4 shows the LED
locations.
Figure 2-4. LED Locations
User LEDs (LED1–3)
Three LEDs are connected to the three general-purpose I/O pins of the
processor (see Table 2-17). The LEDs are active high and are lit by writing a 1 to the correct PF signal.
Table 2-17. User LEDs
LED Reference Designator
Processor Programmable Flag Pin
LED1
PF8
LED2
PG11
LED3
PG12
2-26
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Power LED (LED4)
When LED4 is lit (green), it indicates that power is being properly supplied
to the board.
Reset LED (LED5)
When LED5 is lit, it indicates that the master reset of all major ICs is
active. The reset LED is controlled by the Analog Devices ADM708
supervisory reset circuit. You can assert the reset push button (SW16) to
assert a master reset and to activate LED5. For more information, see “Reset
Push Button (SW16)” on page 2-18.
Ethernet LEDs (LED6–7)
When LED6 is lit solid, it indicates that the SMSC LAN8700 chip (U14)
detects a valid link. When transmit or receive activity is sensed, LED7
flashes as an activity indicator. For more information about LEDs, refer to
the LAN8700 chip data sheet provided by the product manufacturer.
Keypad Current Sink LED (LED8)
can be used as a keypad current sink LED. It is programmable up to
14 mA and can be turned on and off. The sink current can be set up using
LED1_CURRENT in register 0 x 14. The LED sink can be enabled with the
LED1_EN register 0 x 11 in the ADP5520 keypad controller (U35). For
details, refer to the ADP5520 data sheet.
LED8
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2-27
Connectors
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in
Figure 2-5.
Figure 2-5. Connector Locations
Expansion Interface Connectors (J1–3)
Three board-to-board connector footprints provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information, see “Expansion Interface” on
page 1-29. For availability and pricing of the J1—3 connectors, contact
Samtec.
2-28
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ADSP-BF527 EZ-KIT Lite Hardware Reference
Part Description
Manufacturer
Part Number
90-position 0.05” spacing,
SMT
SAMTEC
SFC-145-T2-F-D-A
Mating Connector
90-position 0.05” spacing
(through hole)
SAMTEC
TFM-145-x1 series
90-position 0.05” spacing
(surface mount)
SAMTEC
TFM-145-x2 series
90-position 0.05” spacing
(low cost)
SAMTEC
TFC-145 series
DCE (RS-232) Connector (J4)
Part Description
Manufacturer
Part Number
DB9, female, vertical mount
NORCOMP
191-009-213-L-571
Mating Cable
2m female-to-female cable
DIGI-KEY
AE1020-ND
Battery Holder (J5)
Part Description
Manufacturer
Part Number
24 mm battery holder
KEYSTONE
105
Mating Battery (shipped with EZ-KIT Lite)
3V 280MAH 24 mm LI-COIN
SANYO
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
CR2430
2-29
Connectors
Power Connector (J6)
The power connector (J6) provides all of the power necessary to operate
the EZ-KIT Lite board.
Part Description
Manufacturer
Part Number
2.5 mm power jack
SWITCHCRAFT
RAPC712X
Mating Power Supply (shipped with EZ-KIT Lite)
7.0VDC@2.14A power supply
CUI INC
DMS070214-P6P-SZ
Dual Audio Connectors (J7–8)
Part Description
Manufacturer
Part Number
3.5 mm dual stereo jack
SWITCHCRAFT
35RAPC7JS
Mating Cable (shipped with EZ-KIT Lite)
3.5 mm male/male 6’ cable
RANDOM
10A3-01106
Mating Headphone (shipped with EZ-KIT Lite)
3.5 mm stereo headphones
KOSS
151225 UR5
Ethernet Connector (J9)
Part Description
Manufacturer
Part Number
RJ-45 Ethernet jack
STEWART
SS-6488-NF
Mating Cable (shipped with EZ-KIT Lite)
Cat 5E patch cable
2-30
RANDOM
PC10/100T-007
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ADSP-BF527 EZ-KIT Lite Hardware Reference
USB OTG Connector (P1)
The pinout of the P1 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
USB 5-pin mini AB
MOLEX
56579-0576
Mating Keypad (shipped with EZ-KIT Lite)
5-in-1 USB 2.0 cable
JO-DAN INTERNAT
GXQU-06
Keypad Connector (P2)
Part Description
Manufacturer
Part Number
IDC header female
SAMTEC
SSW-109-01-TM-S
Mating Keypad (shipped with EZ-KIT Lite)
4 x 4 keypad
ACT COMPONENTS
ACT-07-30008-000-R
UART0 Connector (P5)
The pinout of the P5 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
DIGI-KEY
S4205-ND
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-31
Connectors
SPORT0 Connector (P6)
The pinout of the P6 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-434HLF
Mating Connector
IDC socket
DIGI-KEY
S4217-ND
SPORT1 Connector (P7)
The pinout of the P7 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-434HLF
Mating Connector
IDC socket
DIGI-KEY
S4217-ND
PPI Connector (P8)
The pinout of the P8 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-440HLF
Mating Connector
IDC socket
2-32
DIGI-KEY
S4220-ND
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Hardware Reference
SPI Connector (P9)
The pinout of the P9 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-420HLF
Mating Connector
IDC socket
DIGI-KEY
S4210-ND
TWI Connector (P10)
The pinout of the P10 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-420HLF
Mating Connector
IDC socket
DIGI-KEY
S4210-ND
TIMERS Connector (P11)
The pinout of the P11 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
DIGI-KEY
S4205-ND
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-33
Connectors
Host Interface Connector (P13)
The pinout of the P13 connector can be found in “ADSP-BF527 EZ-KIT
Lite Schematic” on page B-1.
Part Description
Manufacturer
Part Number
IDC header
SAMTEC
TSW-116-26-T-D
Mating Connector
IDC socket
SAMTEC
TSW-116-01-T-D
CPLD JTAG Connector (P17)
The CPLD JTAG connector (P17) is not populated; CPLD code should
not be altered for LCD operations.
Part Description
Manufacturer
Part Number
IDC header
FCI
68737-410HLF
Mating Connector
IDC socket
DIGI-KEY
S4205-ND
LCD Data Connector (P18)
Part Description
Manufacturer
Part Number
FPC 67PIN CON063
KYOCERA ELCO
046281267212846+
Mating LCD Display Module (shipped with EZ-KIT Lite)
3.5” TFT LCD with touchscreen
2-34
Sharp
LQ035Q1DH02
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Hardware Reference
USB Debug Agent Connector (ZJ1)
The USB debug agent connector (ZJ1) is the connecting point for the
JTAG USB debug agent interface. The JTAG header (ZP4) should not be
used whenever ZJ1 and its mating cable are used to communicate to the
processor via CCES or VisualDSP++.
JTAG Connector (ZP4)
The JTAG header (ZP4) is the connecting point for a JTAG in-circuit
emulator pod. When an emulator connects to the JTAG header, the USB
debug interface is disabled.
Pin 3 is missing to provide keying. Pin 3 in the mating connector should
have a plug.
When using an emulator with the EZ-KIT Lite board, follow the connection instructions provided with the emulator.
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
2-35
Connectors
2-36
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A ADSP-BF527 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-BF527 EZ-KIT Lite Schematic” on page B-1.
Ref.
Qty.
Description
Reference Designator
Manufacturer
1
1
74LVC14A
SOIC14
U17
TI
74LVC14AD
2
1
IDT74FCT324
4APY SSOP20
U22
IDT
IDT74FCT3244APYG
3
1
SN74AHC1G0
0 SOT23-5
U6
TI
SN74AHC1G00DBVR
4
1
32.768KHZ
OSC008
U1
EPSON
MC-156-32.7680KAA0:ROHS
5
1
25MHZ
OSC003
U3
EPSON
SG-8002CA MP
6
5
SN74LVC1G08
SOT23-5
U9-11,U29,U36
TI
SN74LVC1G08DBVR
7
1
FDS9431A
SOIC8
U21
FAIRCHILD
FDS9431A
8
1
MT48LC32M1
6A2TG-75
TSOP54
U7
MICRON
MT48LC32M16A2P-75
9
2
SI4411DY SO-8
U18,U23
VISHAY
Si4411DY-T1-E3
10
1
HX1188
ICS007
U26
DIGI-KEY
553-1340-ND
11
1
24MHZ
OSC003
U12
EPSON
SG-8002CA-MP
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Part Number
A-1
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
12
1
LAN8700
QFN36
U14
SMSC
LAN8700C-AEZG
13
1
BF527 M25P16
“U8”
U8
NUMONYX
M25P16-VMW6G
14
1
BF527
M29W320EB
"U5"
U5
NUMONYX
M29W320EB70ZE6E
15
1
NAND04
TSOP48
U4
NUMONYX
NAND04GW3B2BN6E
16
1
MIC2025-1
SOIC8
U28
DIGI-KEY
576-1057-ND
17
1
12MHZ
OSC003
U13
EPSON
SG-8002CA-MP
18
3
74CBTLV3244
TSSOP20
U30-31,U38
IDT
IDT74CBTLV3244PGG
19
1
15MHZ
OSC003
U19
EPSON
SG-8002CA-MPT
20
1
BF527
XC95144XL
U34
U34
XILINX
XC95144XL-10TQ100C
21
1
50MHZ
OSC003
U24
DIGI-KEY
SG-8002CA-PCB-ND(5
0.000M)
22
1
ADM708SARZ
SOIC8
U27
ANALOG
DEVICES
ADM708SARZ
23
2
ADP3336ARM
Z MSOP8
VR3-4
ANALOG
DEVICES
ADP3336ARMZ-REEL7
24
1
ADG752BRTZ
SOT23-6
U20
ANALOG
DEVICES
ADG752BRTZ-REEL
25
1
ADM3202ARN
Z SOIC16
U25
ANALOG
DEVICES
ADM3202ARNZ
26
1
ADSPBF527KB
CZENGC1
MBGA28
U2
ANALOG
DEVICES
ADSP-BF527KBCZ6C2
A-2
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
27
2
ADP1864AUJZ
SOT23-6
VR1-2
ANALOG
DEVICES
ADP1864AUJZ-R7
28
1
ADP5520
LFCSP_VQ24
U35
ANALOG
DEVICES
ADP5520ACPZ-RL
29
1
AD7879-1
LFCSP16
U37
ANALOG
DEVICES
AD7879-1ACPZ-RL
30
1
ADP1613
MSOP8
VR5
ANALOG
DEVICES
ADP1613ARMZ-R7
31
1
PWR
2.5MM_JACK
CON005
J6
SWITCHCRAFT
RAPC712X
32
3
.05 45X2
CON019
J1-3
SAMTEC
SFC-145-T2-F-D-A
33
1
DIP8 SWT016
SW10
C&K
TDA08H0SB1
34
4
DIP6 SWT017
SW25-26,SW29-30
CTS
218-6LPST
35
10
DIP4 SWT018
SW1,SW4,SW7-9,
SW11,SW13,SW19-20,
SW24
ITT
TDA04HOSB1
36
1
DB9 9PIN
CON038
J4
NORCOMP
191-009-213-L-571
37
5
DIP2 SWT020
SW5,SW21-22,SW2728
C&K
CKN9064-ND
38
2
IDC 2X1
IDC2X1
JP7,JP10
FCI
90726-402HLF
39
3
IDC 2X1
IDC2X1
P14-16
FCI
90726-402HLF
40
1
IDC 3X1
IDC3X1
JP6
FCI
90726-403HLF
41
2
IDC 5X2
IDC5X2
P5,P11
FCI
68737-410HLF
42
2
IDC 10X2
IDC10X2
P9-10
BURG-FCI
54102-T08-10LF
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A-3
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
43
2
IDC 17X2
IDC17X2
P6-7
BURG-FCI
54102-T08-17LF
44
1
IDC 20X2
IDC20X2
P8
BURG-FCI
54102-T08-20LF
45
4
IDC
2PIN_JUMPER
_SHORT
SJ7-10
DIGI-KEY
S9001-ND
46
1
5A RESETABLE FUS005
F2
MOUSER
650-RGEF500
47
1
ROTARY
SWT023
SW2
DIGI-KEY
563-1047-ND
48
1
ROTARY_ENC
ODER
SWT022
SW3
CTS
290UAB0R201B2
49
1
IDC 16x2
IDC16x2
P13
SAMTEC
TSW-116-26-T-D
50
1
USB_MINI-AB
5PIN CON052
P1
MOLEX
56579-0576
51
1
RJ45 8PIN
CON_RJ45_12
P
J9
DIGI-KEY
380-1022-ND
52
3
MOMENTARY SWT024
SW14-16
PANASONIC
EVQ-Q2K03W
53
1
IDC 9X1
IDC9X1
P2
SAMTEC
SSW-109-01-TM-S
54
1
BATT_HOLDE
R 24MM
CON054
J5
KEYSTONE
ELEC
105
55
1
FPC 67PIN
CON063
P18
KYOCERA
ELCO
046281267212846+
56
2
3.5MM
DUAL_STERE
O CON066
J7-8
SWITCHCRAFT
35RAPC7JS
A-4
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
57
1
IDC
2PIN_JUMPER
_SHORT
SJ13
DIGI-KEY
3M9414-ND
58
2
IDC 2X1
IDC2X1_2MM
JP14-15
SAMTEC
TMM-101-01-T-D
59
4
YELLOW
LED001
LED1-3,LED6
DIGI-KEY
P512TR-ND
60
1
22PF 50V 5%
0805
C307
AVX
08055A220JAT
61
6
0.22UF 25V
10% 0805
C112,C283-287
AVX
08053C224KAT2A
62
1
0.1UF 50V 10%
0805
C277
AVX
08055C104KAT
63
4
10K 1/10W 5%
0805
R319-322
VISHAY
CRCW080510K0JNEA
64
2
100 1/10W 5%
0805
R122,R124
VISHAY
CRCW0805100RJNEA
65
15
600 100MHZ
200MA 0603
FER2-16
DIGI-KEY
490-1014-2-ND
66
3
600 100MHZ
500MA 1206
FER1,FER19-20
STEWARD
HZ1206B601R-10
67
5
1UF 16V 10%
0805
C92,C144,C148,C159,
C178
KEMET
C0805C105K4RAC TU
68
1
10 1/10W 5%
0805
R64
VISHAY
CRCW080510R0FKEA
69
2
10UF 16V 20%
CAP002
CT5,CT8
PANASONIC
EEE1CA100SR
70
1
10UH 20%
IND001
L1
TDK
445-2014-1-ND
71
2
0 1/10W 5%
0805
R58,R188
VISHAY
CRCW08050000Z0EA
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A-5
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
72
1
190 100MHZ
5A FER002
FER17
MURATA
DLW5BSN191SQ2
73
2
1A ZHCS1000
SOT23-312
D7,D9
ZETEX
ZHCS1000TA
74
4
1UF 10V 10%
0805
C164-165,C302-303
AVX
0805ZC105KAT2A
75
11
10UF 6.3V 10%
0805
C7,C22,C33,C43,C52,
C59,C68,C99,C101102,C186
AVX
08056D106KAT2A
76
2
4.7UF 6.3V
10% 0805
C143,C171
AVX
08056D475KAT2A
77
48
0.1UF 10V 10%
0402
C12-19,C27-30,C3841,C47-50,C56-57,
C64-66,C78,C81,C83,
C88,C98,C100,C103,
C105,C111,C132,
C135-136,C146,C157158,C160-161,C249,
C280,C300-301,C305,
C308
AVX
0402ZD104KAT2A
78
76
0.01UF 16V
10% 0402
C2,C4-6,C8-11,C2021,C23-26,C31-32,
C34-37,C42,C44-46,
C51,C53-55,C58,C6063,C67,C69-77,C7980,C82,C84-87,C9091,C93,C97,C116-117,
C121-127,C137-138,
C155-156,C163,C166168,C187-188,C248,
C250,C306
AVX
0402YC103KAT2A
A-6
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
79
69
10K 1/16W 5%
0402
R2-3,R11-14,R16-22,
R24-27,R34,R53-55,
R59,R65,R69-70,R7376,R89,R91,R104-105,
R107,R118-121,R125126,R129-131,R140,
R144,R157-158,R160,
R164,R166,R169,R176178,R196,R198,R213,
R305,R318,R324-325,
R329,R332-333,R335,
R342-343,R345,R351
VISHAY
CRCW040210K0FKED
80
2
4.7K 1/16W 5%
0402
R23,R212
VISHAY
CRCW04024K70JNED
81
12
0 1/16W 5%
0402
R6-7,R110,R116,R149,
R172,R192,R215,R302,
R310,R336-337
PANASONIC
ERJ-2GE0R00X
82
2
1.2K 1/16W 5%
0402
R87-88
PANASONIC
ERJ-2GEJ122X
83
3
22 1/16W 5%
0402
R193-195
PANASONIC
ERJ-2GEJ220X
84
17
33 1/16W 5%
0402
R1,R8-10,R31,R46,
R139,R167,R311,R344,
R346-347,R350,R352353,R356-357
VISHAY
CRCW040233R0JNEA
85
2
18PF 50V 5%
0805
C1,C3
AVX
08055A180JAT2A
86
3
100UF 10V
10% C
CT6,CT9-10
AVX
TPSC107K010R0075
87
1
150UF 10V
10% D
CT16
AVX
TPSD157K010R0050
88
10
2.2UF 10V 10%
0805
C288-290,C293-299
AVX
0805ZD225KAT2A
89
1
64.9K 1/10W
1% 0805
R145
VISHAY
CRCW080564K9FKEA
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A-7
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
90
1
210.0K 1/4W
1% 0805
R146
VISHAY
CRCW0805210KFKEA
91
2
1.5K 1/10W 5%
0603
R71-72
PANASONIC
ERJ-3GEYJ152V
92
3
0.1UF 16V 10%
0603
C169,C273-274
AVX
0603YC104KAT2A
93
3
1UF 16V 10%
0603
C96,C104,C109
KEMET
C0603C105K4PACTU
94
2
68PF 50V 5%
0603
C141,C183
AVX
06035A680JAT2A
95
1
4.7UF 6.3V
20% 0603
C131
PANASONIC
ECJ-1VB0J475M
96
2
470PF 50V 5%
0603
C140,C182
AVX
06033A471JAT2A
97
3
220UF 6.3V
20% D2E
CT1,CT7,CT11
SANYO
10TPE220ML
98
2
10K 1/10W 5%
0603
R314-315
VISHAY
CRCW060310K0JNEA
99
1
10M 1/10W 5%
0603
R15
VISHAY
CRCW060310M0FNEA
100
1
100K 1/10W
5% 0603
R317
VISHAY
CRCW0603100KJNEA
101
5
330 1/10W 5%
0603
R111-113,R115,R123
VISHAY
CRCW0603330RJNEA
102
1
1M 1/10W 5%
0603
R33
VISHAY
CRCW06031M00FNEA
103
7
0 1/10W 5%
0603
R102,R109,R133,R168,
R308-309,R334
PHYCOMP
232270296001L
104
10
49.9 1/16W 1%
0603
R60-63,R78-80,R83-85
VISHAY
CRCW060349R9FNEA
105
2
10 1/10W 5%
0603
R127-128
VISHAY
CRCW060310R0JNEA
A-8
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
106
8
100PF 50V 5%
0603
C260-267
PANASONIC
ECJ-1VC1H101J
107
1
12.4K 1/10W
1% 0603
R67
DIGI-KEY
311-12.4KHRTR-ND
108
2
75.0 1/10W 1%
0603
R81-82
DALE
CRCW060375R0FKEA
109
2
100 1/16W 5%
0402
R44-45
DIGI-KEY
311-100JRTR-ND
110
1
390PF 25V 5%
0603
C270
AVX
06033A391FAT2A
111
2
24.9K 1/10W
1% 0603
R98,R150
DIGI-KEY
311-24.9KHTR-ND
112
5
10UF 10V 10%
0805
C89,C94,C128,C170,
C279
PANASONIC
ECJ-2FB1A106K
113
1
105.0K 1/16W
1% 0603
R137
PANASONIC
ERJ-3EKF1053V
114
4
0.05 1/2W 1%
1206
R134,R141-143
SEI
CSF 1/2 0.05 1%R
115
2
10UF 16V 10%
1210
C147,C184
AVX
1210YD106KAT2A
116
2
GREEN
LED001
LED4,LED7
PANASONIC
LN1361CTR
117
2
RED LED001
LED5,LED8
PANASONIC
LN1261CTR
118
2
1000PF 50V
5% 1206
C179-180
AVX
12065A102JAT2A
119
1
255.0K 1/10W
1% 0603
R152
VISHAY
CRCW06032553FK
120
2
80.6K 1/10W
1% 0603
R99,R151
DIGI-KEY
311-80.6KHRCT-ND
121
4
5A
MBRS540T3G
SMC
D5,D10-12
ON SEMI
MBRS540T3G
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A-9
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
122
3
15KV
PGB1010603
0603
D2-4
LITTLEFUSE
PGB1010603MR
123
1
VARISTOR
V5.5MLA 30A
0603
R37
LITTLEFUSE
V5.5MLA0603
124
1
THERM 0.5A
0.4 1206
R36
LITTLEFUSE
1206L050-C
125
1
20MA
MA3X717E
DIO005
D1
PANASONIC
MA3X717E
126
2
2.5UH 30%
IND013
L2,L4
COILCRAFT
MSS1038-252NLB
127
2
330.0 1/16W
1% 0402
R68,R77
DIGI-KEY
541-330LCT-ND
128
5
47.0K 1/16W
1% 0402
R38-39,R50-52
ROHM
MCR01MZPF4702
129
3
1.0K 1/16W 1%
0402
R197,R199-200
PANASONIC
ERJ-2RKF1001X
130
2
1000PF 2000V
10% 1206
C133-134
AVX
1206GC102KAT1A
131
1
1UF 50V 10%
0603
C304
DIGI-KEY
587-1257-2-ND
132
1
10.0K 1/16W
1% 0402
R312
DIGI-KEY
541-10.0KLCT-ND
133
2
0.027 1/2W 1%
1206
R101,R103
SUSUMU
RL1632T-R027-F-N
134
4
5.6K 1/16W
0.5% 0402
R40-43
SUSUMU
RR0510P-562-D
135
1
680 1/16W 1%
0402
R47
BC COMPONENTS
2312 275 16801
136
1
90.9K 1/16W
5% 0402
R90
DIGI-KEY
541-90.9KLCT-ND
A-10
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
ADSP-BF527 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
137
1
40.2K 1/16W
5% 0402
R57
DIGI-KEY
541-40.2KLCT-ND
138
4
3.3UF 16V 10%
0805
C113,C118,C120,C129
DIGI-KEY
490-3337-2-ND
139
3
22UF 10V 10%
1210
C139,C142,C145
DIGI-KEY
490-1876-2-ND
140
1
95K 1/10W 1%
0603
R136
DIGI-KEY
311-95.3KHRTR-ND
141
5
15PF 50V 5%
0402
C119,C130,C197-199
DIGI-KEY
399-1014-2-ND
142
1
422K 1/10W
1% 0603
R100
PANASONIC
ERJ-3EKF4223V
143
1
15uH 20%
IND015
L5
COILCRAFT
MSS4020-153ML
144
3
.5A B0540W
SOD-123
D17-19
DIODES
INC
B0540W-7-F
145
1
.5A
BZT52C33S
SOD-323
D20
DIODES
INC
BZT52C33S-7-F
146
5
2.2UF 25V 10%
0805
C275-276,C278,C291292
DIGI-KEY
490-3331-1-ND
147
11
33 1/16W 5%
RNS003
RN2-12
PANASONIC
EXB-2HV330JV
148
2
33 1/32W 5%
RNS005
RN13-14
PANASONIC
EXB-28V330JX
149
2
51.1 1/16W 1%
0402
R316,R348
DIGI-KEY
541-51.1LCT-ND
150
1
30A GSOT05
SOT23-3
D15
VISHAY
GSOT05-GS08
151
1
30A GSOT03
SOT23-3
D14
VISHAY
GSOT03-GS08
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A-11
Ref.
Qty.
Description
Reference Designator
Manufacturer
Part Number
152
1
40A
ESD5Z2.5T1
SOD-523
D13
ON SEMI
ESD5Z2.5T1G
153
1
30A GSOT08
SOT23-3
D16
VISHAY
GSOT08-GS08
A-12
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-BF527 EZ-KIT LITE
SCHEMATIC
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
TITLE
Title
Size
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
1
of
15
A
B
C
D
3.3V
R89
10K
0402
R87
1.2K
0402
R88
1.2K
0402
TP3
A[1:19]_Z
ARDY
U2
1
A1_Z
AB8
A2_Z
AC8
A3_Z
A4_Z
A5_Z
A1
AB4
A8_Z
AB5
D1_Z
A3
D2
A4
D3
A5
D4
AC6
AB6
D0_Z
V2
D1
AC7
A7_Z
Y1
D0
A2
AB7
A6_Z
D[0:15]_Z
W1
U1
D5_Z
T2
D6_Z
DSP_RTXO
T1
D7_Z
R1
D8_Z
P1
D9_Z
AB3
P2
D10_Z
A12_Z
AC3
R2
D11_Z
A13_Z
AB2
N1
D12_Z
A14_Z
AC2
N2
D13_Z
A15_Z
AA2
M2
D14_Z
A16_Z
W2
M1
D15_Z
A17_Z
Y2
A18_Z
AA1
A19_Z
AB1
D8
A11_Z
A9
AC4
D7
AC5
A10
D9
A11
D10
A12
D11
A13
D12
A14
D13
A15
D14
A16
PJ2/SCL
D4_Z
D5
A8
D15
U23
V23
A7
PPID0_Z
B8
PPID1_Z
A8
PPID2_Z
B9
PPID3_Z
B11
PPID4_Z
B10
PPID5_Z
B12
PPID6_Z
B13
PPID7_Z
A17
B16
LED0_Z
A18
AC9
ABE1#/SDQM1
A19
A20
KEYIRQ#_Z
ABE1#/SDQM1_Z
AB9
ABE0#/SDQM0
B15
UART1CTS_LCDSPICS_Z
ABE0#/SDQM0_Z
B17
CZM_Z
SCKE_Z
2
SWE_Z
SA10_Z
SCAS_Z
SRAS_Z
3.3V
TP2 SMS_Z
AB13
SCKE
AB10
SWE
AMS2
SA10
AMS1
SCAS
AMS0
AC10
AC11
AB12
AB15
AMS3
AB16
AC17
AC15
AOE
AC13
SMS
R29
10K
0402
DNP
R3
10K
0402
UART1RX_Z
SPISCK
ARDY
R9
0402
33
A9
A10
H2
G1
SPISEL1_Z
R8
0402
33
SPIMISO_Z
D1
SPIMOSI_Z
D2
PPIFS2_Z
C2
DT0PRIA_PPIFS3_Z
U22
GND54
AB22
NMI
VRSEL
WAKEUP_OUT
V22
RESET
RESET
R196
10K
0402
CLKBUF
VROUT
TP13
AC20
SS/PG
B1
DR0PRIA_Z
AC18
VROUT
TP1
AC19
AB19
C1
RFS0A_Z
VREFFLT
B2
RSCLK0A_Z
R4
0402
0
DNP
B4
TSCLK0A_Z
CLKBUF
B3
HOSTWR#_LED1_Z
ADSP-BF527
MBGA289
A2
HOSTACK_LED2_Z
HOSTADDR_PUSHBUTTON2_Z
R10
MDC_HOSTRD#
0402
A3
33
K2
TRST
L2
TMS
EMU
R310
0402
0
J2
L1
TCK
TDO
R192
0402
0
K1
J1
TDI
PJ3/SDA
PPIFS1_Z
A6
R7
0402
R311
0402
B22
C22
0
PPICLK
33
SCL
SDA_Z
RTXO
PF0/PPID0/DR0PRI/ND_D0A
PH0/ND_D0/MIICRS/RMIICRSDV/HOST_D0
PF1/PPID1/RFS0/ND_D1A
PH1/ND_D1/ERXER/HOST_D1
PF2/PPID2/RSCLK0/ND_D2A
PH2/ND_D2/MDIO/HOST_D2
PF3/PPID3/DT0PRI/ND_D3A
PF4/PPID4/TFS0/ND_D4A/TACLK0
PH3/ND_D3/ETXEN/HOST_D3
PH4/ND_D4/MIITXCLK/RMIIREF_CLK/HOST_D4
PF5/PPID5/TSCLK0/ND_D5A/TACLK1
PH5/ND_D5/ETXD0/HOST_D5
PF6/PPID6/DT0SEC/ND_D6A/TACI0
PH6/ND_D6/ERXD0/HOST_D6
PF7/PPID7/DR0SEC/ND_D7A/TACI1
PH7/ND_D7/ETXD1/HOST_D7
PF8/PPID8/DR1PRI
PH8/SPISEL4#/ERXD1/HOST_D8/TACLK2
PF9/PPID9/RSCLK1/SPISEL6#
PH9/SPISEL5#/ETXD2/HOST_D9/TACLK3
PF10/PPID10/RFS1/SPISEL7#
PF11/PPID11/TFS1/CZM
PH10/ND_CE#/ERXD2/HOST_D10
PH11/ND_WE/ETXD3/HOST_D11
PF12/PPID12/DT1PRI/SPISEL2#/CDG
PF13/PPID13/TSCLK1/SPISEL3#/CUD
PF14/PPID14/DT1SEC/UART1TX
PH12/ND_RE/ERXD3/HOST_D12
PH13/ND_BUSY/ERXCLK/HOST_D13
PH14/ND_CLE/ERXDV/HOST_D14
PF15/PPID15/DR1SEC/UART1RX/TACI3
PH15/ND_ALE/COL/HOST_D15
A11
NDD0_RMIICRSDV_HOSTD0_Z
A12
NDD1_ERXER_HOSTD1_Z
A13
NDD2_MDIO_HOSTD2_Z
B14
R6
0
0402
NDD3_ETXEN_HOSTD3_Z
A14
NDD4_RMIIREFCLK_HOSTD4
K23
NDD5_ETXD0_HOSTD5_Z
K22
NDD6_ERXD0_HOSTD6_Z
L23
NDD7_ETXD1_HOSTD7_Z
L22
ERXD1_HOSTD8_Z
T23
SPISEL5#_HOSTD9_Z
M22
NDCE#_HOSTD10_Z
R22
NDWR#_HOSTD11_Z
M23
NDRE#_HOSTD12_Z
N22
2
NDBUSY#_HOSTD13_Z
N23
NDCLE_HOSTD14_Z
P22
NDALE_HOSTD15_Z
PG0/HWAIT
PG1/SPISS#/SPISEL1#
PG2/SPISCK
PG3/SPIMISO/DR0SECA
PG4/SPIMOSI/DT0SECA
PG5/TMR1/PPIFS2/TFS0A
PG6/DT0PRIA/TMR2/PPIFS3
PG7/TMR3/DR0PRIA/UART0TX
PG8/TMR4/RFS0A/UART0RX/TACI4
PG9/TMR5/RSCLK0A/TACI5
"BOOT MODE"
PG10/TMR6/TSCLK0A/TACI6
PG11/TMR7/HOST_WR#
3.3V
PG12/DMAR1/UART1TXA/HOST_ACK
PG13/DMAR0/UART1RXA/HOST_ADDR/TACI2
PG14/TSCLK0A1/MDC/HOST_RD#
PG15/TFS0A/MIIPHYINT#/RMIIMDINT#/HOST_CE#
BMODE0
BMODE1
TRST
BMODE2
TMS
BMODE3
G2
1
F2
2
E1
4
E2
8
EMU
SW2
54 3
2
7
1
8
0
9
F
A
E
BCD
C
6
3
SWT023
ROTARY
TCK
TDO
R14
10K
0402
TDI
R11
10K
0402
R12
10K
0402
R13
10K
0402
SW2: Boot Mode Select Switch
3.3V
DSP_RTXI
DSP_RTXO
POSITION
R147
100K
0402
DNP
R15
10M
0603
1
U3
R1
33
0402
4
VDD
1
OE
OUT
GND
25MHZ 2
OSC003
3
2
DSP_CLKIN
C3
18PF
0805
TERM1 TERM2
NC1
Default
VREFFLT
U1
R2
10K
0402
4
RTXI
B7
ADSP-BF527
MBGA289
3.3V
3.3V
A4
A5
TFS0A_RMIIMDINT#_HOSTCE#_Z
3
H1
F1
CLKOUT
R5
10K
0402
DNP
T22
R34
10K
0402
AMS0_Z
AWE_Z
AB18
CLKOUT
UART1TX_Z
HWAIT_PUSHBUTTON1_Z
AC14
ARDY
CUD_Z
AMS1_Z
ARE_Z
AB14
AWE
AMS2_Z
B19
AOE_Z
AB17
ARE
B18
CDG_Z
AMS3_Z
AC16
SRAS
PJ0/PPIFS1/TMR0
XTALO
PJ1/PPICLK/TMRCLK
DSP_RTXI
D6
A9_Z
P23
1
XTALI
D3_Z
V1
A7
A10_Z
DSP_CLKIN
D2_Z
U2
A6
U2
R23
NC2
32.768KHZ
OSC008
4
R138
33.0K
0402
DNP
3
C1
18PF
0805
C2
0.01UF
0402
RTC
U3
C95
220PF
0402
DNP
BOOT MODE
0
Reserved
1
Boot from 8 or 16-bit external flash memory
2
Boot from 16-bit asynchronous FIFO
3
Boot from serial SPI memory
4
Boot from SPI host device
5
Boot from serial TWI memory
6
Boot from TWI host
7
Boot from UART0 host
8
Boot from UART1Host
9
Reserved
A
Boot from SDRAM
B
Reserved
C
Boot from 8-bit NAND flash PORTF
D
Boot from 8-bit NAND flash PORTH
E
Boot from 16-Bit Host DMA
Size
F
Boot from 8-Bit Host DMA
C
ANALOG
DEVICES
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
DSP EBIU + CONTROL
Title
Date
20 Cotton Road
Board No.
Rev
A0208-2006
2.2
Sheet
1-20-2010_14:13
D
2
of
15
A
B
D[0:15]
C
D
D[0:15]_Z
RN6
RN7
RN13
D6
D7
D3
D5
1
R1A
2
R2A
3
R3A
4
R4A
D1
5
D4
6
R5A
R6A
7
R7A
D2
8
R8A
1
16
R1B
15
R2B
14
R3B
13
R4B
D6_Z
D7_Z
UART1RX
D5_Z
D1_Z
11
D4_Z
R6B
PPID4
D3_Z
12
R5B
PPID5
UART1TX
PPID3
10
R7B
9
PPID2
D2_Z
R8B
1
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
NDD0_RMIICRSDV_HOSTD0
PPID1
33
RNS003
16
R1B
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
NDD0_RMIICRSDV_HOSTD0_Z
1
R1A
2
R2A
3
R3A
4
R4A
CZM_Z
PPID4_Z
CDG_Z
UART1RX_Z
CUD_Z
PPID5_Z
KEYIRQ#_Z
R1B
R2B
R3B
R4B
8
CZM
7
CDG
6
CUD
5
KEYIRQ#
UART1TX_Z
33
RNS005
PPID3_Z
PPID2_Z
PPID1_Z
1
33
RNS003
RN4
RN5
D14
D15
D13
D12
D10
D9
D11
D8
1
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
16
R1B
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
UART1CTS_LCDSPICS
D15_Z
NDD4_RMIIREFCLK_HOSTD4
D13_Z
NDD3_ETXEN_HOSTD3
D12_Z
NDD2_MDIO_HOSTD2
D10_Z
PPID7
D9_Z
NDD1_ERXER_HOSTD1
D11_Z
PPID6
D8_Z
R8B
1
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
LED0
D14_Z
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
LED0_Z
RN12
UART1CTS_LCDSPICS_Z
NDD4_RMIIREFCLK_HOSTD4_Z
SPISEL5#_HOSTD9
NDD3_ETXEN_HOSTD3_Z
NDWR#_HOSTD11
NDD2_MDIO_HOSTD2_Z
NDALE_HOSTD15
PPID7_Z
NDCLE_HOSTD14
NDD1_ERXER_HOSTD1_Z
NDBUSY#_HOSTD13
PPID6_Z
NDRE#_HOSTD12
NDCE#_HOSTD10
33
RNS003
33
RNS003
A[1:19]
16
R1B
NDD7_ETXD1_HOSTD7
16
R1B
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
SPISEL5#_HOSTD9_Z
NDWR#_HOSTD11_Z
NDALE_HOSTD15_Z
NDCLE_HOSTD14_Z
NDBUSY#_HOSTD13_Z
NDRE#_HOSTD12_Z
NDCE#_HOSTD10_Z
NDD7_ETXD1_HOSTD7_Z
33
RNS003
A[1:19]_Z
RN10
1
RN2
A7
2
1
R1A
A9
2
A8
3
A5
4
A6
5
A4
6
A3
7
A2
8
R2A
R3A
R4A
R5A
R6A
R7A
R8A
16
R1B
A7_Z
RN14
15
A9_Z
DR0PRIA
14
A8_Z
DT0PRIA_PPIFS3
13
A5_Z
RFS0A
12
A6_Z
PPIFS2
11
A4_Z
SPIMOSI
10
A3_Z
SPIMISO
9
A2_Z
R2B
R3B
R4B
R5B
R6B
R7B
R8B
1
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
SPISEL1
HWAIT_PUSHBUTTON1
33
RNS003
16
R1B
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
DR0PRIA_Z
SDA_Z
DT0PRIA_PPIFS3_Z
NDD6_ERXD0_HOSTD6_Z
RFS0A_Z
NDD5_ETXD0_HOSTD5_Z
PPIFS2_Z
ERXD1_HOSTD8_Z
1
R1A
2
R2A
3
R3A
4
R4A
R1B
R2B
R3B
R4B
8
7
6
5
SDA
NDD6_ERXD0_HOSTD6
NDD5_ETXD0_HOSTD5
2
ERXD1_HOSTD8
SPIMOSI_Z
33
RNS005
SPIMISO_Z
SPISEL1_Z
HWAIT_PUSHBUTTON1_Z
33
RNS003
RN11
RN3
A18
1
R1A
A15
2
A19
3
A14
4
R2A
R3A
R4A
A13
5
A12
6
R5A
R6A
A11
7
A10
8
R7A
R8A
16
R1B
A18_Z
15
A15_Z
PPID0
14
A19_Z
PPIFS1
13
A14_Z
TFS0A_RMIIMDINT#_HOSTCE#
12
A13_Z
TSCLK0A
11
A12_Z
HOSTADDR_PUSHBUTTON2
10
A11_Z
HOSTWR#_LED1
9
A10_Z
HOSTACK_LED2
R2B
R3B
R4B
R5B
R6B
R7B
R8B
1
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
RSCLK0A
33
RNS003
33
SA10
D0
R347
0402
33
A16
A17
3
PPID0_Z
PPIFS1_Z
TFS0A_RMIIMDINT#_HOSTCE#_Z
TSCLK0A_Z
HOSTADDR_PUSHBUTTON2_Z
HOSTWR#_LED1_Z
HOSTACK_LED2_Z
RSCLK0A_Z
33
RNS003
R353
0402
R352
0402
R346
0402
R357
0402
A1
16
R1B
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
33
33
33
A1_Z
A16_Z
A17_Z
3
SA10_Z
D0_Z
RN8
SCKE
AWE
AOE
AMS3
AMS2
AMS1
AMS0
ARE
1
R1A
2
R2A
3
R3A
4
R4A
5
R5A
6
R6A
7
R7A
8
R8A
16
R1B
15
R2B
14
R3B
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
SCKE_Z
AWE_Z
AOE_Z
AMS3_Z
AMS2_Z
AMS1_Z
AMS0_Z
ARE_Z
33
RNS003
RN9
1
R1A
ABE1#/SDQM1
ABE0#/SDQM0
4
2
R2A
3
R3A
4
R4A
SWE
SCAS
SRAS
SMS
5
R5A
6
R6A
7
R7A
8
R8A
16
R1B
15
R2B
14
R3B
ANALOG
DEVICES
ABE1#/SDQM1_Z
ABE0#/SDQM0_Z
13
R4B
12
R5B
11
R6B
10
R7B
9
R8B
Nashua, NH 03063
4
PH: 1-800-ANALOGD
SWE_Z
ADSP-BF527 EZ-KIT Lite
SERIES TERMINATION
Title
SCAS_Z
SRAS_Z
SMS_Z
Size
33
RNS003
Board No.
C
Date
A
20 Cotton Road
B
C
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
3
of
15
A
B
C
D
VDDEXT
VDDEXT
U2
1
VDDMEM
G7
VDDEXT1
G8
VDDEXT2
G9
VDDEXT3
G10
VDDEXT4
G11
VDDEXT5
G12
VDDEXT6
G13
VDDEXT7
G14
VDDEXT8
G15
VDDEXT9
H7
VDDEXT10
J17
VDDEXT11
K17
VDDEXT12
L17
VDDEXT13
M17
VDDEXT14
N17
VDDEXT15
P17
VDDEXT16
R17
VDDEXT17
A1
GND1
A23
GND2
C67
0.01UF
0402
C72
0.01UF
0402
J10
GND7
J11
1
GND8
J12
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND18
L7
GND19
VDDMEM3
M7
GND20
N7
GND21
P7
GND22
R7
GND23
T7
GND24
VDDMEM5
VDDMEM6
VDDMEM7
VDDMEM8
U7
GND25
U8
GND26
U9
GND27
U10
GND28
U11
GND29
U12
GND30
U13
GND31
VDDMEM9
VDDMEM10
VDDMEM11
VDDMEM12
VDDMEM13
VDDMEM14
VDDMEM15
GND32
VDDMEM16
GND33
VDDMEM17
GND34
U16
VDDMEM18
GND35
B5
VDDINT1
GND36
H8
VDDINT2
GND37
H9
VDDINT3
GND38
H10
VDDINT4
GND39
H11
VDDINT5
GND40
H12
VDDINT6
GND41
H13
VDDINT7
GND42
H14
VDDINT8
GND43
H15
VDDINT9
GND44
H16
VDDINT10
GND45
J8
VDDINT11
GND46
VDDINT12
GND47
K8
VDDINT13
GND48
K16
VDDINT14
GND49
VDDINT15
GND50
L8
C71
0.01UF
0402
J9
VDDMEM4
3
C69
0.01UF
0402
GND6
VDDMEM2
J16
C70
0.01UF
0402
B6
K7
U15
C64
0.1UF
0402
GND5
GND17
VDDINT
C65
0.1UF
0402
AC23
J7
U14
C66
0.1UF
0402
GND4
VDDMEM1
2
C68
10UF
0805
AC1
GND3
L16
VDDINT16
GND51
M8
VDDINT17
GND52
M16
VDDINT18
GND53
VDDEXT
J13
J14
K9
K10
K11
C59
10UF
0805
K12
C57
0.1UF
0402
C56
0.1UF
0402
C61
0.01UF
0402
C60
0.01UF
0402
C62
0.01UF
0402
C58
0.01UF
0402
C63
0.01UF
0402
K13
K14
K15
L9
L10
VDDINT
L11
L12
L13
L14
C33
10UF
0805
L15
C30
0.1UF
0402
C29
0.1UF
0402
C28
0.1UF
0402
C27
0.1UF
0402
C35
0.01UF
0402
C34
0.01UF
0402
C36
0.01UF
0402
C32
0.01UF
0402
C37
0.01UF
0402
C31
0.01UF
0402
M9
M10
M11
2
M12
M13
M14
VDDINT
M15
N9
N10
N11
N12
C22
10UF
0805
C19
0.1UF
0402
C18
0.1UF
0402
C17
0.1UF
0402
C16
0.1UF
0402
C24
0.01UF
0402
C23
0.01UF
0402
C25
0.01UF
0402
C21
0.01UF
0402
C26
0.01UF
0402
C20
0.01UF
0402
C7
10UF
0805
C12
0.1UF
0402
C13
0.1UF
0402
C14
0.1UF
0402
C15
0.1UF
0402
C9
0.01UF
0402
C8
0.01UF
0402
C10
0.01UF
0402
C6
0.01UF
0402
C11
0.01UF
0402
C5
0.01UF
0402
N13
N14
N15
P9
P10
P11
VDDINT
P12
P13
P14
P15
R9
R10
R11
3
R12
R13
R14
R15
VDDMEM
N8
VDDINT19
N16
VDDINT20
P8
VDDINT21
P16
VDDINT22
C52
10UF
0805
R8
VDDINT23
C43
10UF
0805
C50
0.1UF
0402
C49
0.1UF
0402
C48
0.1UF
0402
C47
0.1UF
0402
C41
0.1UF
0402
C40
0.1UF
0402
C39
0.1UF
0402
C38
0.1UF
0402
C54
0.01UF
0402
C53
0.01UF
0402
C55
0.01UF
0402
C51
0.01UF
0402
C45
0.01UF
0402
C44
0.01UF
0402
C46
0.01UF
0402
C42
0.01UF
0402
R16
VDDINT24
T8
VDDINT25
T9
VDDINT26
T10
VDDINT27
"RTC BATTERY"
T11
3.3V
VDDINT28
2.5V
T12
VDDINT29
VDDEXT
T13
VDDINT30
T14
VDDINT31
D1
MA3X717E
DIO005
T15
VDDINT32
EVDD_VREG
EVDD_VREG_N
VDDINT33
J5
2
U17
ANALOG
DEVICES
T16
AVDD_OTP
4
T17
W23
VDDRTC
ADSP-BF527
MBGA289
1
C4
0.01UF
0402
OTP_VPP
AC12
AB11
C111
0.1UF
0402
C146
0.1UF
0402
C136
0.1UF
0402
C135
0.1UF
0402
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
DSP POWER
Title
CON054
BATTHOLDER
Size
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
4
of
15
A
B
C
4 MB FLASH
(2M x 16)
A1
G2
A2
F2
A0
A1
E2
A2
C2
A3
D2
A4
F3
A5
E3
A6
C3
A7
D6
A8
C6
A9
E6
A10
F6
A11
D7
A12
C7
A13
E7
A14
F7
A15
G7
A16
D3
A17
E4
A18
F5
A19
F4
A20
A3
FROM
TO
DEFAULT
ALTERNATE FUNCTION / OFF MODE
A4
SW7.1
DSP (U2)
FLASH (U5)
ON
J2.65 (Expansion Interface)
SW7.2
DSP (U2)
FLASH (U5)
ON
J2.63 (Expansion Interface)
A5
1
A6
A7
SW7.3
DSP (U2)
FLASH (U5)
ON
J2.61 (Expansion Interface)
A8
A9
SW7.4
DSP (U2)
FLASH (U5)
ON
J2.59 (Expansion Interface)
A10
A11
A12
3.3V
A13
A14
A15
A16
A17
A18
R20
10K
0402
R19
10K
0402
R18
10K
0402
R17
10K
0402
R16
10K
0402
64MB SDRAM (32M x 16)
J5
VDD
SW7: FLASH Enable
POS.
3.3V
U5
A[1:19]
R333
10K
0402
A19
D
D[0:15]
G3
D0
K3
D1
G4
D2
D0
D1
D2
K4
D3
K5
D4
G5
D5
D3
D4
D5
K6
D6
G6
D7
J3
D9
H4
D10
D9
D10
J4
D11
H5
D12
D11
D12
J6
D13
H6
D14
J7
D15/A-1
D15
D13
D14
A1
23
A2
24
A3
25
A4
26
A5
29
A6
30
A7
31
A8
32
A9
33
A10
34
A0
A10
D5
RESET
H7
BYTE
C4
RY/BY~
H2
CE
J2
OE
C5
WE
D4
VPP/WP~
U10
4
2
SW7
ON
AMS0
1
2
1
2
7
3
6
2
AMS1
3
AMS2
U9
1
4
2
1
SN74LVC1G08
SOT23-5
U6
4
4
5
4
AMS3
SN74LVC1G08
SOT23-5
8
2
SN74AHC1G00
SOT23-5
DIP4
SWT018
BA0
1
DQ14
BA1
DQ15
16
13
D7
42
D8
44
D9
45
D10
47
D11
48
D12
50
D13
51
D14
53
D15
19
CS
37
CKE
38
CLK
WE
17
CAS
18
RAS
SMS
SCKE
CLKOUT
15
DQML
ABE0#/SDQM0
R312
10.0K
0402
39
DQMH
ABE1#/SDQM1
2
MT48LC32M16A2TG-75
TSOP54
M29W320EB
TFBGA63_80
U11
DQ12
DQ13
SCAS
D6
1
K2
K7GND1
GND2
1
DQ11
A12_NC
SRAS
"FLASH ENABLE"
DQ10
A11
SWE
D5
11
DQ9
22
21
10
DQ8
A9
A19
D4
DQ7
A8
20
D3
8
DQ6
A7
A18
7
DQ5
A6
36
D2
DQ4
A5
A13
5
DQ3
A4
35
D1
DQ2
A3
A12
D0
4
DQ1
A2
SA10
2
DQ0
A1
D7
D8
D[0:15]
U7
D6
H3
D8
A[1:19]
MEMORY MAP
4
2
ADDRESS RANGE
SN74LVC1G08
SOT23-5
SELECT LINE
TYPE
RESET
0x2030 0000 - 0x203F FFFF
ASYNC BANK 3
FLASH
ARE
0x2020 0000 - 0x202F FFFF
ASYNC BANK 2
FLASH
0x2010 0000 - 0x201F FFFF
ASYNC BANK 1
FLASH
0x2000 0000 - 0x200F FFFF
ASYNC BANK 0
FLASH
AWE
JP10
1
SJ12
SHORTING
JUMPER
DEFAULT=UNINSTALLLED
2
0x0000 0000 - 0x03FF FFFF
NONE
3.3V
C83
0.1UF
0402
SDRAM
C81
0.1UF
0402
C82
0.01UF
0402
C84
0.01UF
0402
C86
0.01UF
0402
C85
0.01UF
0402
C87
0.01UF
0402
IDC2X1
JP10 allows blocks of Flash to be locked
3.3V
U7
3
C76
0.01UF
0402
C75
0.01UF
0402
C74
0.01UF
0402
C73
0.01UF
0402
C77
0.01UF
0402
16 Mb SPI FLASH
4Gb NAND FLASH
U5, U6, U9, U10, U11
3
3.3V
3.3V
3.3V
3.3V
R24
10K
0402
3.3V
R26
10K
0402
R27
10K
0402
3.3V
U8
SPIMOSI
R22
10K
0402
3.3V
NDCE#
NDRE#_HOSTD12
NDWR#_HOSTD11
C78
0.1UF
0402
C79
0.01UF
0402
NDALE_HOSTD15
NDCLE_HOSTD14
9
8
18
17
16
19
NDBUSY#_HOSTD13
4
7
CS
WP
HOLD
29
OE
D1
WE
D2
NDD0_RMIICRSDV_HOSTD0
30
NDD2_MDIO_HOSTD2
32
D3
NDD3_ETXEN_HOSTD3
41
D4
R/~B
D6
U8
GND
4
R25
10K
0402
ANALOG
DEVICES
NDD4_RMIIREFCLK_HOSTD4
42
D5
M25P16
SO8W
NDD1_ERXER_HOSTD1
31
WP
NAND04
TSOP48
U4
SCK
1
7
D0
CL
C80
0.01UF
0402
SPIMISO
3
CE
AL
SO
6
SPI_FLASH_CS
U4
2
SI
SPISCK
12
VCC137
VCC2
R23
4.7K
0402
NDD5_ETXD0_HOSTD5
43
13
36GND1
GND2
R21
10K
0402
8
VCC
5
NDD6_ERXD0_HOSTD6
44
D7
NDD7_ETXD1_HOSTD7
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
MEMORY
Title
Size
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
5
of
15
A
B
C
D
1
1
3.3V
3.3V
C88
0.1UF
0402
CLKBUF
C89
10UF
0805
5V_USB
3.3V
R30
0
0402
DNP
"USB CLK"
OUT
AB23
USBXI
GND
24MHZ 2
OSC003
AA23
AC21
AC22
2
3.3V
C90
0.01UF
0402
R28
10K
0402
DNP
C92
1UF
0805
USBXO
USBRSET
USBVREF
ADSP-BF527
MBGA289
R36
THERM
1206
W22
U2
3
USBVDD
4
VDD
Y23
R31
33
0402
USBAVDD
U12
C94
10UF
0805
USBVBUS
USBID
USBDM
USBDP
AB20
Y22
P1
1
VBUS
2
D3
D+
4
ID
5
GND
6
SHELL
CON052
AB21
USB_OTG_GM
AA22
USB_OTG_GP
C91
0.01UF
0402
D2
D4
D3
PGB1010603
0603
PGB1010603
0603
PGB1010603
0603
2
"USB OTG"
R37
VARISTOR
V5.5MLA
0603
FER1
600
1206
R33
1M
0603
C93
0.01UF
0402
U12
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
DSP USB OTG
Title
Size
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
6
of
15
A
B
J7
J8
MIC IN
C
"MIC GAIN"
SW4: MIC GAIN
3.3V
HP OUT
ON
SW4
1
1
R57
40.2K
0402
7
3
6
3
GAIN
1
5 (14dB)
2
1 (0dB)
R109
0
0603
5
4
4
POS.
8
2
2
R90
90.9K
0402
3.3V
"MIC/HP LPBK"
"AUDIO MODE"
3.3V
3
R54
10K
0402
0.5 (-6dB)
SJ10
C99
10UF
0805
C110
220PF
0402
DNP
SHORTING
JUMPER
DEFAULT=2&3
C98
0.1UF
0402
J15
AGND
JP6
MICIN_RDIV
J23
MICBIAS_Z
H23
CVDD
AVDD
CGND
AGND
C100
0.1UF
0402
MICBIAS
HPVDD
HPGND
C108
220PF
0402
DNP
"MIC SELECT"
J7
G16
HPVDD
C102
10UF
0805
C103
0.1UF
0402
LLINEIN_RDIV
E23
RLINEIN_RDIV
F23
LLINEIN
RLINEIN
LHPOUT
AGND
MICBIAS
FER2
600
0603
1
R43
5.6K
0402
RHPOUT
C96
1UF
0603
A17
CODEC_DACLRC
LLINEIN
A18
CODEC_DACDAT
LEFT_IN_LPBK
FER8
600
0603
RIGHT_IN_LPBK
RLINEIN
5
AUDIO_MODE
AUDIO CODEC INTERFACE MODE:
SW8.3 ON and SW8.4 OFF = SPI MODE
SW8.3 OFF and SW8.4 ON = TWI MODE
CT1
220UF
D2E
AGND
8
1
G17
MICIN
7
5
SW8 allows the MICIN signal to be looped back,
for test purposes, to the Left and Right headphone.
DO NOT switch positions 1 & 2 ON at the same time.
Ensure that JP6 is on 2&3 or OFF when using SW8.
FER10
600
0603
AGND
2
IDC3X1
4
4
RHPOUT_RDIV
H22
3
2
6
R160
10K
0402
J22
MICIN
R47
680
0402
1
FER4
600
0603
C101
10UF
0805
U2
H17
FER3
600
0603
3
3
LHPOUT_RDIV
DIP4
SWT018
R50
47.0K
0402
2
7
4
LINE OUT
AVDD
8
2
3
FER9
600
0603
C109
1UF
0603
1
ON
NC
2
4
SW8
1
MICIN
1
DIP4
SWT018
LINE IN
D
R42
5.6K
0402
C104
1UF
0603
A16
CODEC_ADCDAT
A15
CODEC_ADCLRC
A19
BCLK
6
B20
LHPOUT
B21
RHPOUT
DACLRC
R308
0
0603
LHPOUT_RDIV
CT7
220UF
D2E
J8
ADCDAT
LOUT
ADCLRC
ROUT
F22
LOUT
G22
ROUT
R309
0
0603
CT8
10UF
CAP002
1
R39
47.0K
0402
C262
100PF
0603
R41
5.6K
0402
C263
100PF
0603
R40
5.6K
0402
E22
AUDIO_MODE
D23
CSB
C23
SDIN
AGND
CSB
C_CLKOUT
SDIN
VMID
R51
47.0K
0402
D22
G23
4
7
LEFT_OUT_LPBK
8
RIGHT_OUT_LPBK
ROUT_RDIV
5
6
VMID
A21
A22
SCLK
ADSP-BF527
MBGA289
XTO
B23
SCLK
3.3V
C_MODE
XTI/MCLK
C260
100PF
0603
3
LOUT_RDIV
CON066
C261
100PF
0603
FER11
600
0603
RHPOUT_RDIV
BCLK
2
2
CT5
10UF
CAP002
DACDAT
FER5
600
0603
CON066
AGND
AGND
AGND
3.3V
AGND
"AUDIO CLK"
R53
10K
0402
3.3V
U13
3.3V
4
VDD
1
OE
3
OUT
FER6
600
0603
R45
100
0402
FER7
600
0603
AGND
AUDIO_CLK
GND
12MHZ 2
OSC003
R163
0
0402
DNP
3
R46
33
0402
R44
100
0402
R164
10K
0402
CDG
R52
47.0K
0402
C97
0.01UF
0402
R172
0
0402
SPISEL5#_HOSTD9
3
R38
47.0K
0402
C264
100PF
0603
C265
100PF
0603
C266
100PF
0603
C267
100PF
0603
"LINE IN-OUT LPBK"
CSB
SW28
RIGHT_IN_LPBK
ON
U13
2
2
R165
10K
0402
DNP
1
1
LEFT_IN_LPBK
4
LEFT_OUT_LPBK
3
AGND
RIGHT_OUT_LPBK
AGND
DIP2
SWT020
"SPORT"
"0A"
"ENBL"
SW28 disconnect the audio loopback
SW20
1
7
3
6
4
5
3
DR0PRIA
4
RFS0A
8
2
2
DT0PRIA_PPIFS3
ON
1
TFS0A_RMIIMDINT#_HOSTCE#
CODEC_DACLRC
CODEC_DACDAT
CODEC_ADCLRC
SW19
4
SCL
BCLK
2
3
3
6
4
5
4
2
RSCLK0A
ON
1
TSCLK0A
1
4
7
3
SPISCK
SW27
1A
SDIN
C268
1000PF
0805
DNP
C186
10UF
0805
SCLK
DIP4
SWT018
ANALOG
DEVICES
C105
0.1UF
0402
C269
1000PF
0805
DNP
DIP2
SWT020
SW20 and SWXX disconnect DSP from AUDIO CODEC
VMID
8
2
2
SDA
1
ON
SPIMOSI
1
DIP4
SWT018
W1
COPPER
"SPI/TWI"
CODEC_ADCDAT
AGND
Size
Date
A
B
Board No.
C
AGND
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
INTERNAL AUDIO CODEC
Title
AUDIO CODEC MODE INTERFACE:
SPI MODE: ON, OFF, ON, OFF
TWI MODE: OFF, ON, OFF, ON
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-19-2010_15:47
D
7
of
15
A
B
C
D
3.3V
3.3V
FER14
600
0603
R86
10K
0402
DNP
FER16
600
VDD33
0603
FER12
600
VDDA33
0603
FER13
600
0603
C118
3.3UF
0805
FER15
600
0603
R91
10K
0402
C117
0.01UF
0402
C113
3.3UF
0805
C116
0.01UF
0402
VDDIO
1
1
20
21
NDD1_ERXER_HOSTD1
22
6
NDD3_ETXEN_HOSTD3
23
NDD5_ETXD0_HOSTD5
24
NDD7_ETXD1_HOSTD7
26
2
27
36
NDD0_RMIICRSDV_HOSTD0
3
5
PHY_RESET
14
NDD4_RMIIREFCLK_HOSTD4
13
VDD33A3 35
VDD33A2 33
VDD33A1 30
7
MDIO
C130
15PF
0402
MDC
RXD3/NINTSEL
TXN
28
3
TD+
16
TX+
1
2
TCT
TD1CT:1CT
TXTCM
TXN
14
3
15
4
5
RXD2/MODE2
6
RXD1/MODE1
7
RXD0/MODE0
RXP
32
RXP
8
RX_DV
RD+
RX+
RX_ER/RXD4
TX_CLK
RXN
31
7
RD-
TXD0
SPEED100/PHYAD0
TXD1
LINK/PHYAD1
TXD2
ACTIVITY/PHYAD2
TXD3
FDUPLEX/PHYAD3
9
RX-
RXN
HX1188
ICS007
CON_RJ45_12P
R82
75.0
0603
9
10
LINKLED
11
ACTIVITYLED
R70
10K
0402
1
R59
10K
0402
R65
10K
0402
NRST
R66
10K
0402
DNP
R83
49.9
0603
R80
49.9
0603
R79
49.9
0603
R78
49.9
0603
3.3V
PHY ADDRESS 0x01
R69
10K
0402
CLKIN/XTAL1
LAN8700
QFN36
R85
49.9
0603
2
C133
1000PF
1206
CRS/PHYAD4
VDD_CORE
R84
49.9
0603
C112
0.22UF
0805
VDDIO
NINT/TX_ER/TX4
R81
75.0
0603
12
COL/RMII/CRS_DV
XTAL2
8
10
TCM_
TX_EN
6
RCT
C119
15PF
0402
RX_CLK/REGOFF
11
NC4
19
2
J9
NC3
18
NDD6_ERXD0_HOSTD6
1
13
ERXD1_HOSTD8
TXP
TXP
NC2
17
U26
29
12
16
MODE2
"ETHERNET"
R64
10
0805
NC1
15
R63
49.9
0603
5
MDC
R62
49.9
0603
4
2
VSS/FLAG
MDIO
R61
49.9
0603
SHGND2
C134
1000PF
1206
8
C155
0.01UF
0402
TFS0A_RMIIMDINT#_HOSTCE#
37
4
VDD33
U14
EXRES1
R72
1.5K
0603
34
R71
1.5K
0603
VDDIO 25
R73
10K
0402
R60
49.9
0603
SHGND2
3.3V
R158
10K
0402
R157
10K
0402
R76
10K
0402
C131
4.7UF
0603
R67
12.4K
0603
C132
0.1UF
0402
"ETH ENABLE"
"RMII CLK"
ON
7
3
6
4
5
3
110
Power Down Mode
101
Repeater Mode, Auto Negotiation
SW9
1
100Base-TX Half duplex Advertised, Auto Negotiaion
7
3
6
4
5
3
100Base-TX Full Duplex
4
SPISEL1
100Base-TX Half Duplex
8
2
2
010
1
OE
PHY_RESET
R167
33
0402
4
VDD
OUT
3
NDD4_RMIIREFCLK_HOSTD4
GND
50MHZ 2
OSC003
3
R169
10K
0402
1
011
U24
MDC
DEFAULT
ON
All Capable, Auto Negotiation
100
MDIO
MODE DEFINITIONS
111
R166
10K
0402
DIP4
SWT018
"ETH MODE"
"FLASH CS"
SW9: Ethernet Mode Select (SW9.1, SW9.2, SW9.3)
MODE[2:0]
4
RESET
8
2
2
MDC_HOSTRD#
SW1
1
1
NDD2_MDIO_HOSTD2
3
U24
3.3V
MODE2
ERXD1_HOSTD8
NDD6_ERXD0_HOSTD6
SPI_FLASH_CS
SW1: ETH Enable
ACTIVITYLED
DIP4
SWT018
001
10Base-T Full Duplex
000
10Base-T Half Duplex
R74
10K
0402
Internal LAN8700 pullups are used for mode pins
R55
10K
0402
R75
10K
0402
POS.
FROM
TO
DEFAULT
FUNCTIONS
LINKLED
SW1.1
DSP (U2, PH2)
PHY (U14)
OFF
ON (MDIO PHY U14), OFF (NAND U4, HOST connector P13.27, Expansion Interface J3.42)
SW1.2
DSP (U2, PG14)
PHY (U14)
OFF
ON (MDC PHY U14), OFF ( HOST connector P13.2, Expansion Interface J3.41)
SW1.3
GND
RMII CLK (U24)
ON
ON (RMII CLK disabled), OFF (RMII CLK enabled)
SW1.4
RESET IC (U27)
PHY (U14)
OFF
ON (PHY not held in reset), OFF (PHY held in reset)
SW9.4 discconnects SPISEL1, for use on expansion interface (J2.11)
LED6
YELLOW
LED001
R68
330.0
0402
VDDIO
4
VDD33
LED7
GREEN
LED001
R77
330.0
0402
VDDA33
ANALOG
DEVICES
R58
0
0805
C128
10UF
0805
C121
0.01UF
0402
C120
3.3UF
0805
C127
0.01UF
0402
C122
0.01UF
0402
C129
3.3UF
0805
C126
0.01UF
0402
C125
0.01UF
0402
C124
0.01UF
0402
C123
0.01UF
0402
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
RMII PHY
Title
SHGND2
Size
Board No.
C
Date
A
B
C
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
8
of
15
A
B
C
D
TP19
D18
B0540W
SOD-123
C278
2.2UF
0805
5V
LED+
BACKLIGHT POWER
L5
15UH
IND015
SOD-123
B0540W
D19
1
R314
10K
0603
C276
2.2UF
0805
D20
BZT52C33S
SOD-323
D17
B0540W
SOD-123
R318
10K
0402
5
C304
1UF
0603
C273
0.1UF
0603
R315
10K
0603
SW
7
FREQ
FB
2
3
EN
SS
4
GND
LED-
8
R316
51.1
0402
1
COMP
R317
100K
0603
ADP1613
MSOP8
C271
0.1UF
0603
DNP
SW25
1
ON
1
UART1CTS_LCDSPICS
2
11
3
10
4
9
5
8
6
7
2
SPISEL1
3
SPISEL5#_HOSTD9
4
KEYIRQ#
5
HOSTWR#_LED1
12
C277
0.1UF
0805
VR5
6
VIN
"LCD/KPAD CTL"
C274
0.1UF
0603
C275
2.2UF
0805
C270
390PF
0603
LCD_SPICS
NINT
6
"TOUCHPAD INT"
DIP6
SWT017
SW24
1
SW25 positions 1, 2 and 3 allows selection of DSP SPI CS for LCD_SPICS
1
LED0_SHUTOFF
SW25 positions 4, 5 and 6 allows selection of DSP GPIO for keypad interrupt
7
3
6
4
5
3
SPISEL5#_HOSTD9
8
2
2
HOSTWR#_LED1
ON
2
1
TP18
2
AD7879_1_PENIRQ
4
DIP4
SWT018
SW24 positions 1, 2 and 3 allows selection of DSP GPIO for touch screen interrupt
"TOUCH ADD"
I2C address is "0110101"
3.3V
3.3V
3.3V
3.3V
I2C Address Bit[0:1]
U35
21
16
R96
10K
0402
DNP
R97
10K
0402
DNP
SW22
1
2
NINT
3
15
RESET
14
1
3.3V
17
SDA
18
19
R348
51.1
0402
24
NINT
NRST
ILED
PGND
CMP_IN
GND1
GND2
GND3
4
ADD0
3
ADD1
R320
10K
0805
12
PENIRQ/INT/DAV
ADD0
ADD1
14
CS/ADD0
6
DIN/ADD1
DIP2
SWT020
SCL
SDA
ON
R95
10K
0402
DNP
23
LED8
RED
LED001
C137
0.01UF
0402
VDDIO
BL_SNK
4
C138
0.01UF
0402
AUX/VBAT/GPIO
R319
10K
0805
R321
10K
0805
5
VCC/REF
13
R94
10K
0402
DNP
SCL
U37
15
I2C address is "0101111"
2
R322
10K
0805
C302
1UF
0805
VBAT
1
3
R334
0
0603
2
SW
22
BST
P2
1
12
C3
11
C2
10
C1
9
C0
13
R3
6
R2
7
R1
8
R0
20
CAP_OUT
25
EP
SCL
2
SDA
16
X+
4
X1
Y+
5
Y-
AD7879_1_PENIRQ
X+
X3.3V
Y+
3
Y-
8
SCL
9
SDA
3
17
EP
4
C280
0.1UF
0402
7
GND
C279
10UF
0805
5
AD7879-1
LFCSP16
6
7
8
9
IDC9X1
C303
1UF
0805
ADP5520
LFCSP_VQ24
R188
0
0805
C307
22PF
0805
U35
ANALOG
DEVICES
TP11
4
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
TOUCHSCREEN, KEYPAD AND BACKLIGHT
Board No.
C
Date
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
9
of
15
A
B
MODE[1:0]
R335
10K
0402
D
SW26 positions 1 and 2: LCD MODE select
3.3V
R329
10K
0402
C
R340
10K
0402
DNP
R341
10K
0402
DNP
R342
10K
0402
R343
10K
0402
MODE DEFINITIONS
00
16-bit PPI Pass Through Mode
01
16-bit PPI Pass Through Mode
10
RGB565 Input Mode 16BPP
11
RGB888 Input Mode 24BPP
DEFAULT
P18
1
LED-
SW26 positions 3, 4 and 5 are not used
2
LED+
SW26 position 6 enables PPI data buffer between DSP and LCD (active low)
3
"MODE"
1
ON
1
MODE0
4
9
HOSTWR#_LED1
5
8
RESET
6
7
4
SEL1
6
ENABLE2
2
6
X+
7
Y+
4
8
3
2
5
ENABLE1
SW5
1
ON
10
1
3
5
Y-
"LCD RESET"
11
3
SEL2
12
2
2
MODE1
4
X-
SW26
1
LCD_RESET
C287
0.22UF
0805
DIP2
SWT020
9
VGH
10
SW5 allows selection of board RESET or GPIO to reset LCD
SWT017
DIP6
11
12
C286
0.22UF
0805
3.3V
3.3V
13
3.3V
14
VGL
15
C284
0.22UF
0805
U34
26
38
R140
10K
0402
51
U19
R139
33
0402
4
VDD
1
88
3
OE
22
OUT
GND
15MHZ 2
OSC003
23
R356
0402
LCD_PPICLK
33
27
3
2
4
1
2
99
RESET
PPID[0:7]
PPID0
PPID1
7
PPID2
8
PPID3
CPLD_LED0
CPLD_KEYIRQ#
CPLD_UART1CTS_LCDSPICS
CPLD_CZM
CPLD_CDG
CPLD_CUD
6
9
PPID4
10
PPID5
11
PPID6
12
PPID7
13
14
15
16
17
18
19
20
3
CPLD_UART1RX
CPLD_UART1TX
LCD_PPICLK
3.3V
ENABLE1
ENABLE2
24
25
28
29
30
32
33
2
LCD_TCK
LCD_TDO
83
5
LCD_TDI
45
6
LCD_TMS
47
IDC6X1
DNP
"CPLD JTAG"
21
31
44
62
69
4
75
84
100
20
VCCIO_4
C285
0.22UF
0805
IO_GCK1
21
22
SPIMISO
IO_GCK2
IO_GCK3
IO_GTS1
IO_GTS2
IO_GTS3
IO_GTS4
IO_GSR
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
IO16
IO17
IO18
IO19
IO20
IO21
IO22
IO23
IO24
IO25
TCK
TDO
TDI
TMS
GND1
GND2
GND3
GND4
GND5
GND6
GND7
23
39
IO26
40
IO27
41
IO28
42
IO29
43
IO30
46
IO31
49
IO32
50
IO33
52
IO34
53
IO35
54
IO36
55
IO37
56
IO38
58
IO39
61
IO40
63
IO41
64
IO42
65
IO43
66
IO44
67
IO45
68
IO46
70
IO47
71
IO48
72
IO49
73
IO50
74
IO51
76
IO52
77
IO53
78
IO54
79
IO55
80
IO56
81
IO57
82
IO58
85
IO59
86
IO60
87
IO61
89
IO62
90
IO63
91
IO64
92
IO65
93
IO66
94
IO67
95
IO68
96
IO69
97
IO70
MODE0
24
VCIM
MODE1
25
SEL1
26
SEL2
C283
0.22UF
0805
3.3V
TP20
27
28
LCD_RESET
29
30
31
32
C290
2.2UF
0805
C289
2.2UF
0805
33
SHUT
34
LCD_SPICS
LED_C(-)
SDI
LED_A(+)
SCK
DGND1
NC
X1(R)
DEN
Y2(B)
B5
X2(L)
B4
Y1(T)
B3
AGND1
B2
VGH
B1
C2P
B0
C2N
G5
C1P
G4
C1N
G3
VGL
G2
C3N
G1
C3P
G0
AGND2
R5
VCIX2
R4
CYP
R3
CYN
R2
VCI
R1
SDO
R0
AGND3
VSYNC
VCIM
HSYNC
CXP
DOTCLK
CXN
CDUM0
ID
DGND4
RESB
VLCD63
DGND2
VCOMH
VDDIO
VCOML
VCORE
DGND5
DGND3
CSVCMP
SHUT
CSVCMN
35
SPIMOSI
36
SPISCK
37
38
1
39
LCD_PPI15
40
LCD_PPI14
41
LCD_PPI13
42
LCD_PPI12
43
R336
0
0402
LCD_PPI11
44
LCD_B0
45
LCD_PPI10
46
LCD_PPI9
47
R338
0
0402
DNP
LCD_PPI8
48
LCD_PPI7
49
LCD_PPI6
50
LCD_PPI5
51
LCD_PPI4
52
LCD_PPI3
53
LCD_PPI2
54
LCD_PPI1
55
R337
0
0402
LCD_PPI0
56
LCD_R0
57
LCD_FS2
58
LCD_FS1
59
R339
0
0402
DNP
LCD_CLK
60
CDUM0
2
61
62
VLCD63
63
VCOMH
64
VCOML
65
66
67
C288
2.2UF
0805
CSB
3.3V
SHUT
AGND2
C294 should be very close to pin21=VCI in P18
3.3V
VGH
VGL
VCIM
VCIX2
CDUM0
VLCD63
VCOMH
R325
10K
0402
VCOML
LCD_B0
LCD_R0
R344
0402
33
C291
2.2UF
0805
LCD_CLK
C292
2.2UF
0805
C293
2.2UF
0805
C294
2.2UF
0805
C295
2.2UF
0805
C296
2.2UF
0805
C297
2.2UF
0805
C298
2.2UF
0805
C299
2.2UF
0805
3
R326
10K
0402
DNP
LCD_FS2
LCD_FS1
"CPLD D8-13"
LCD_PPI0
AGND2
LCD_PPI1
LCD_PPI2
LCD_PPI3
LED0_SHUTOFF
LCD_PPI4
KEYIRQ#
LCD_PPI5
UART1CTS_LCDSPICS
LCD_PPI6
CZM
LCD_PPI7
CDG
LCD_PPI8
SW29
1
CUD
12
2
11
3
10
4
9
5
8
6
7
CPLD_LED0
W5
COPPER
CPLD_KEYIRQ#
CPLD_UART1CTS_LCDSPICS
1A
CPLD_CZM
CPLD_CDG
CPLD_CUD
AGND2
SWT017
DIP6
LCD_PPI9
LCD_PPI10
LCD_PPI11
LCD_PPI12
LCD_PPI13
3.3V
LCD_PPI14
LCD_PPI15
ANALOG
DEVICES
STAMP_DT0PRIA_PPIFS3
PPIFS1
PPIFS2
C305
0.1UF
0402
GND8
C249
0.1UF
0402
C250
0.01UF
0402
R305
10K
0402
C248
0.01UF
0402
Size
Board No.
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
LCD, CPLD
Title
XC95144XL
TQ100
A
R324
10K
0402
CON063
6
4
48
19
5
3
98
4
37
VCC3
18
VCIX2
3
36
1
VCCIO_3
57
ON
35
VCC2
3.3V
17
2
P17
34
VCC1
VCCIO_2
16
5
1
R302
0
0402
VCCIO_1
3.3V
"LCD"
Rev
A0208-2006
2.2
Sheet
1-19-2010_15:47
D
10
of
15
A
B
C
D
3.3V
R197
1.0K
0402
"ENCODER"
R199
1.0K
0402
R200
1.0K
0402
"ROTARY"
"NAND"
"ENABLE"
1
1
SW3
4
3
6
5
4
5
NDCE#_HOSTD10
ON
7
4
COMMON
ROTARY_ENCODER
SWT022
2
3
SW2
3
2
B
SW1
1
1
A
SW11
1
8
CUD
CDG
CZM
NDCE#
DIP4
SWT018
2
SW11: Rotary NAND enable
POS.
FROM
TO
DEFAULT
ALTERNATE FUNCTION / OFF MODE
"CPLD 14-15"
SW11.1
Encoder (SW3)
DSP (U2, PF13)
ON
Expansion Interface (J2.34, J2.52) Stamp buffer (U34)
SW11.2
Encoder (SW3)
DSP (U2, PF12)
ON
Expansion Interface (J2.30, J2.51), Stamp buffer (U30)
SW11.3
Encoder (SW3)
DSP (U2, PF11)
ON
Expansion Interface (J2.32, J2.50), Stamp buffer (U30)
"DCE ENB"
SW30
1
DSP (U2, PH10)
NAND (U4)
ON
Host connector (P13.11), Expansion Interface (J3.35)
UART1RX
11
3
10
4
9
5
8
6
7
3
UART1TX
4
UART1RX
5
UART1CTS_LCDSPICS
6
HWAIT_PUSHBUTTON1
12
2
2
SW11.4
1
UART1TX
ON
2
2
CPLD_UART1TX
CPLD_UART1RX
DCE_UART1TX
DCE_UART1RX
DCE_UART1CTS
DCE_HWAIT_PUSHBUTTON1
SWT017
DIP6
3.3V
3.3V
R351
10K
0402
R345
10K
0402
R105
10K
0402
SW10: UART Setup
R104
10K
0402
C158
0.1UF
0402
"DCE"
U25
C160
0.1UF
0402
1
C1+
3
C1-
3
2
V+
C157
0.1UF
0402
4
C2+
5
C2-
1
6
6
V-
2
11
SW10
1
ON
1
DCE_HWAIT_PUSHBUTTON1
2
15
3
14
4
13
5
12
6
11
7
10
8
9
2
DCE_UART1RX
3
DCE_UART1CTS
4
5
CTS
16
R350
33
0402
3
Disconnects the UART_RX signal from the processor;
the UART_RX signal can be used for another function
4
Connects the RTS and CTS signals
5
Allows the host to reset the EZ-KIT Lite via the CTS signal
6 and 7
Select the source for the CTS signal
8
Loopback RX and TX data
4
9
5
6
7
8
C161
0.1UF
0402
ANALOG
DEVICES
SERIAL PORT
(UART 1)
Board No.
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
ROTARY SWITCH, RS232
Title
Size
A
3
DEFAULT OFF, ON, OFF, OFF, OFF, OFF, OFF, OFF
"UART SETUP"
U25
2
8
C156
0.01UF
0402
4
Enable flow control
CON038
DIP8
SWT016
3.3V
14
T1OUT
10
7
T2IN
T2OUT
12
13
R1OUT
R1IN
9
8
R2OUT
R2IN
ADM3202ARNZ
SOIC16
T1IN
Function
1 and 3
J4
7
DCE_UART1TX
Position
Rev
A0208-2006
2.2
Sheet
1-20-2010_14:13
D
11
of
15
A
B
C
D
3.3V
3.3V
3.3V
R178
10K
0402
R121
10K
0402
"PB1"
R176
10K
0402
U22
R124
100
0805
1
R177
10K
0402
R127
10
0603
U17
1
C163
0.01UF
0402
LED0
HOSTWR#_LED1
SW15
MOMENTARY
SWT024
2
HOSTACK_LED2
74LVC14A
SOIC14
C164
1UF
0805
U22
"GPIO ENABLE"
R128
10
0603
74LVC14A
SOIC14
USB_VRSEL
7
3
6
4
5
4
HOSTACK_LED2
C165
1UF
0805
8
2
3
SW14
MOMENTARY
SWT024
12
2
13
1
ON
U17
11
2A1
13
2A2
15
2A3
17
2A4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
3.3V
1
LED3
YELLOW
LED001
R113
330
0603
LED2
YELLOW
LED001
R112
330
0603
LED1
YELLOW
LED001
LED4
GREEN
LED001
R115
330
0603
"POWER"
R111
330
0603
IDT74FCT3244APY
SSOP20
SW13
1
R122
100
0805
18
1Y1
16
1Y2
14
1Y3
12
1Y4
1
OE1
19
OE2
R120
10K
0402
"PB2"
2
1A1
4
1A2
6
1A3
8
1A4
HWAIT_PUSHBUTTON1
HOSTADDR_PUSHBUTTON2
HOSTADDR_PUSHBUTTON2
PPI_SEL
DIP4
SWT018
2
2
SW13: GPIO enable
POS.
FROM
TO
DEFAULT
FUNCTIONS
SW13.1
push button 1
DSP (U2, PG0)
ON
ON (PB1), OFF (UART 1 RTS U25, HOST connector P13.12, Keypad busy SW13.8, Expansion Interface J1.84)
SW13.2
push button 2
DSP (U2, PG13)
ON
ON ( PB2), OFF (HOST connector P13.8, OTG voltage select SW13.7, Expansion Interface J1.85)
"HOST"
P13
NDALE_HOSTD15
SW13.3
SW13.4
OTG PWR(VR3, U28)
DSP (U2, PG13)
DSP(U2, PG12)
OFF
PPI CLK (U20)
OFF (HOST connector P13.8, Expansion Interface J1.85), ON (PB2 SW13.11, OTG power VR3, U28)
OFF
NDCLE_HOSTD14
NDBUSY#_HOSTD13
OFF (LED2, Host connector P13.10, Expansion Interface J1.81, STAMP buffer U34), ON (PPI CLK U20)
NDRE#_HOSTD12
NDWR#_HOSTD11
NDCE#_HOSTD10
SPISEL5#_HOSTD9
ERXD1_HOSTD8
NDD7_ETXD1_HOSTD7
NDD6_ERXD0_HOSTD6
3.3V
NDD5_ETXD0_HOSTD5
NDD4_RMIIREFCLK_HOSTD4
NDD3_ETXEN_HOSTD3
NDD2_MDIO_HOSTD2
3
"RESET"
NDD1_ERXER_HOSTD1
LED5
RED
LED001
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
NDD0_RMIICRSDV_HOSTD0
MDC_HOSTRD#
HOSTWR#_LED1
HOST_TFS0A_RMIIMDINT#_HOSTCE#
HOSTADDR_PUSHBUTTON2
HOSTACK_LED2
HWAIT_PUSHBUTTON1
RESET
3
32
IDC16X2
3.3V
R130
10K
0402
R123
330
0603
"RESET"
R118
10K
0402
R125
10K
0402
U17
9
R126
10K
0402
U17
8
R119
10K
0402
U17
3
4
DA_SOFT_RESET
5
CTS
1
R129
10K
0402
U36
6
11
1
MR
4
PFI
4
SN74LVC1G08
SOT23-5
74LVC14A
SOIC14
74LVC14A
SOIC14
1
7
RESET
U29
4
SW16
MOMENTARY
SWT024
8
RESET
R195
22
0402
C197
15PF
0402
RESET
5
10
74LVC14A
SOIC14
R194
22
0402
C198
15PF
0402
PFO
ADM708SARZ
SOIC8
2
74LVC14A
SOIC14
R193
22
0402
U27
2
U17
R131
10K
0402
C199
15PF
0402
SN74LVC1G08
SOT23-5
3.3V
3.3V
C167
0.01UF
0402
4
3.3V
C306
0.01UF
0402
3.3V
C168
0.01UF
0402
ANALOG
DEVICES
C166
0.01UF
0402
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
LEDS, PUSHBUTTONS, RESET, HOST PORT
Title
U17
U36
U29
Size
U27
C
Date
A
B
Board No.
C
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
12
of
15
A
B
C
D
3.3V
R198
10K
0402
"EXPANSION INTERFACE = TYPE B"
U20
5V
3.3V
5V
3
EXPANSION_PPI_CLK
3.3V
1
1
PPICLK
1
6
LCD_PPICLK
4
PPI_SEL
ADG752BRTZ
SOT23-6
D[0:15]
3.3V
3.3V
A[1:19]
A1
6
8
7
A2
10
9
A4
A7
12
11
A6
SPIMOSI
A9
14
13
A8
SPIMISO
15
18
17
A12
A15
20
19
A14
A17
22
21
A16
A19
24
23
A18
2
D1
D3
28
27
30
29
UART1TX
32
31
CDG
34
33
CZM
35
CUD
38
37
SPIMOSI
40
39
42
41
44
43
D4
46
45
D6
D9
48
47
D8
D11
50
49
D10
D13
52
51
D12
D15
54
53
D14
KEYIRQ#
CZM
CUD
58
57
UART1RX
60
59
SCL
3
4
3
6
5
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
24
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
8
7
9
12
11
14
13
16
15
18
17
20
19
21
22
21
23
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
40
39
42
41
44
43
46
45
48
47
50
49
52
51
54
53
56
55
58
57
60
59
62
61
64
63
63
65
ABE1#/SDQM1
67
ABE0#/SDQM0
AOE
69
72
71
74
73
76
75
78
77
80
79
82
81
84
83
86
85
88
87
90
89
DR0PRIA
10
61
70
R168
0
0603
PPID7
UART1RX
68
HWAIT_PUSHBUTTON1
PPID5
55
66
HOSTWR#_LED1
TSCLK0A
56
64
PPID2
TFS0A_RMIIMDINT#_HOSTCE#
D2
D7
PPID0
DT0PRIA_PPIFS3
D0
D5
62
3
PPIFS2
25
36
1
4
UART1TX
SPISCK
SPISEL1
NDD7_ETXD1_HOSTD7
NDWR#_HOSTD11
A10
A13
26
J3
2
5
A5
16
1
3
A3
A11
J2
2
PPICLK
AWE
PPID1
PPID3
SMS
66
65
68
67
70
69
72
74
NDD4_RMIIREFCLK_HOSTD4
NMI
DT0PRIA_PPIFS3
PPIFS1
UART1RX
RESET
LED0
UART1CTS_LCDSPICS
NDALE_HOSTD15
KEYIRQ#
ERXD1_HOSTD8
SPIMISO
NDRE#_HOSTD12
DR0PRIA
NDBUSY#_HOSTD13
RFS0A
RSCLK0A
PPID4
PPID6
LED0
UART1CTS_LCDSPICS
CDG
UART1TX
UART1TX
SDA
AMS3
AMS2
AMS1
NDD0_RMIICRSDV_HOSTD0
NDD2_MDIO_HOSTD2
46
45
48
47
50
49
52
51
54
53
56
55
58
57
60
59
62
61
64
63
SPISEL5#_HOSTD9
U19
NDD3_ETXEN_HOSTD3
U20
EXPANSION_PPI_CLK
2
CLKOUT
TFS0A_RMIIMDINT#_HOSTCE#
NDD6_ERXD0_HOSTD6
All USB interface circuitry is considered proprietary and has
NDCE#_HOSTD10
been omitted from this schematic.
NDCLE_HOSTD14
NDD1_ERXER_HOSTD1
When designing your JTAG interface please refer to the
MDC_HOSTRD#
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
R215
0
0402
3.3V
R212
4.7K
0402
"JTAG"
3V
68
67
70
69
71
72
71
73
74
73
ARE
NDD5_ETXD0_HOSTD5
3.3V
65
ARDY
C188
0.01UF
0402
UART1RX
3.3V
66
AMS0
C187
0.01UF
0402
RFS0A
ZP4
1
2
3
4
5
6
7
76
75
76
75
78
77
78
77
9
10
12
13
14
ABE0#/SDQM0
HOSTACK_LED2
SRAS
SA10
HOSTADDR_PUSHBUTTON2
SWE
80
79
80
79
82
81
82
81
84
83
84
83
86
85
86
85
88
90
87
88
87
89
90
89
ABE1#/SDQM1
SCKE
SCAS
CLKOUT
TRST
TRST
TDI
TDI
TDO
TDO
EMU
EMU
DA_EMULATOR_TCK
3
DA_EMULATOR_TRST
DA_EMULATOR_TDI
DA_EMULATOR_TDO
DA_GP0
R213
10K
0402
DA_GP1
RESET
RESET
DA_GP2
DA_SOFT_RESET
DA_SOFT_RESET
DA_GP3
DEBUG_AGENT
DSP JTAG HEADER
CON019
CON019
TCK
DA_EMULATOR_TMS
IDC7X2
LED0
TMS
TCK
DA_EMULATOR_EMU
8
11
TMS
DA_EMULATOR_SELECT
SHGND
4
1
GND
J1
2
CON019
SHGND
ANALOG
DEVICES
4
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
EXPANSION INTERFACE & JTAG
Board No.
C
Date
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-13-2010_14:04
D
13
of
15
A
B
5V
C
D
3.3V
5V
3.3V
UNREG_IN
UNREG_IN
"SPORT 0"
STAMP_DR0PRIA
1
STAMP_MISO
STAMP_MOSI
STAMP_DT0PRIA_PPIFS3
STAMP_RSCLK0A
STAMP_MOSI
STAMP_MISO
STAMP_SPISCK
STAMP_SDA
STAMP_SCL
STAMP_DR0PRIA
STAMP_RFS0A
STAMP_RSCLK0A
3.3V
SDA
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
P7
2
1
SPISCK
4
3
SPISEL1
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
RESET
STAMP_RFS0A
STAMP_CUD
STAMP_LED0
STAMP_TFS0A_RMIIMDINT#_HOSTCE#
STAMP_UART1RX
STAMP_UART1TX
STAMP_CDG
STAMP_SPISEL1#
STAMP_KEYIRQ#
STAMP_CDG
STAMP_MOSI
STAMP_CUD
STAMP_MISO
STAMP_SPISCK
STAMP_LED0
STAMP_SDA
STAMP_HOSTWR#_LED1
STAMP_SCL
STAMP_HOSTACK_LED2
STAMP_DR0PRIA
STAMP_RFS0A
STAMP_RSCLK0A
IDC17X2
RESET
21
24
23
26
25
28
27
30
29
32
31
34
33
11
CDG
R332
10K
0402
STAMP_UART1CTS_LCDSPICS
22
2
1A1
4
1A2
6
1A3
8
1A4
SCL
"SPORT 1"
P6
2
TSCLK0A
U31
13
STAMP_MISO
15
SPIMOSI
17
STAMP_CZM
STAMP_SPISEL1#
JP7
1
STAMP_CDG
2
STAMP_CUD
STAMP_LED0
STAMP_RSCLK0A
STAMP_HOSTACK_LED2
STAMP_DR0PRIA
STAMP_RFS0A
HOSTWR#_LED1
PPID0
PPID2
PPID4
PPID6
STAMP_LED0
STAMP_UART1CTS_LCDSPICS
STAMP_CDG
STAMP_UART1TX
STAMP_LED0
STAMP_CDG
RESET
STAMP_MOSI
STAMP_MISO
STAMP_SPISCK
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
STAMP_SCL
STAMP_LED0
PPID1
STAMP_HOSTACK_LED2
PPID3
PPID5
PPID7
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
STAMP_KEYIRQ#
STAMP_CZM
STAMP_MOSI
SJ11
SHORTING
JUMPER
DEFAULT=NOT INSTALLLED
DNP
Populating JP7 enables signals from U34
and U30 to connectors on this page.
2
1A1
4
1A2
6
1A3
8
1A4
18
1Y1
16
1Y2
14
1Y3
12
1Y4
11
2A1
13
2A2
15
2A3
17
2A4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
RSCLK0A
DR0PRIA
RFS0A
STAMP_CZM
STAMP_CUD
STAMP_LED0
STAMP_HOSTWR#_LED1
STAMP_HOSTACK_LED2
2
74CBTLV3244
TSSOP20
STAMP_SCL
RESET
U38
STAMP_HOSTWR#_LED1
KEYIRQ#
UART1CTS_LCDSPICS
UART1TX
2
1A1
4
1A2
6
1A3
8
1A4
18
1Y1
16
1Y2
14
1Y3
12
1Y4
11
2A1
13
2A2
15
2A3
17
2A4
9
2Y1
7
2Y2
5
2Y3
3
2Y4
STAMP_KEYIRQ#
STAMP_UART1CTS_LCDSPICS
STAMP_UART1TX
19
STAMP_CUD
UNREG_IN
STAMP_UART1RX
3.3V
STAMP_CUD
5V
"SPI"
1
OE1
19
OE2
STAMP_SPISEL1#
STAMP_DT0PRIA_PPIFS3
PPIFS1
PPIFS2
STAMP_MISO
38
37
STAMP_SPISCK
40
39
STAMP_SPISEL1#
STAMP_CUD
IDC20X2
2A4
1
SPIMISO
1
OE1
19
OE2
IDC10X2
35
36
STAMP_SDA
STAMP_SDA
1
2A3
STAMP_CDG
5V
"PPI"
PPICLK
3
HOSTACK_LED2
5V 3.3V
P10
2
STAMP_SPISEL1#
U30
STAMP_HOSTWR#_LED1
UNREG_IN
P8
2
2A2
"STAMP ENABLE"
LED0_SHUTOFF
"TWI"
STAMP_SPISCK
74CBTLV3244
TSSOP20
CUD
3.3V
STAMP_SDA
1
OE1
19
OE2
CZM
2
STAMP_SCL
9
2Y1
7
2Y2
5
2Y3
3
2Y4
2A1
IDC2X1
IDC17X2
UNREG_IN
18
1Y1
16
1Y2
14
1Y3
12
1Y4
STAMP_LED0
STAMP_HOSTACK_LED2
P9
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
20
74CBTLV3244
TSSOP20
STAMP_MOSI
3
SJ13
RESET
STAMP_CDG
LED0
JP15
1
2
SHORTING
JUMPER
DEFAULT=INSTALLED
LED0_SHUTOFF
IDC2X1_2MM
DT0PRIA_PPIFS3
STAMP_HOSTWR#_LED1
JP14
1
SJ14
2
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
DNP
STAMP_DT0PRIA_PPIFS3
IDC2X1_2MM
17
19
3.3V
3.3V
3.3V
IDC10X2
5V
3.3V
5V
C308
0.1UF
0402
3.3V
C301
0.1UF
0402
C300
0.1UF
0402
"UART 0"
"TIMERS"
STAMP_DR0PRIA
4
3
5
8
7
10
9
STAMP_DR0PRIA
STAMP_HOSTWR#_LED1
STAMP_HOSTACK_LED2
STAMP_RFS0A
3
6
5
8
7
10
9
"TFS0A/HOSTCE"
"ENABLE"
STAMP_HOSTWR#_LED1
U38
U31
HOST_TFS0A_RMIIMDINT#_HOSTCE#
IDC5X2
STAMP_TFS0A_RMIIMDINT#_HOSTCE#
IDC5X2
SW21
1
2
4
ANALOG
DEVICES
TFS0A_RMIIMDINT#_HOSTCE#
3
TFS0A_RMIIMDINT#_HOSTCE#
DIP2
SWT020
SW21 disconnects TFS0A_RMIIMDINT#_HOSTCE#
from SPORT conn P6.11 and HOST conn P13.6
Size
Board No.
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
STAMP CONNECTORS
Title
A
U30
STAMP_HOSTACK_LED2
ON
6
STAMP_LED0
4
2
STAMP_RSCLK0A
1
1
1
STAMP_RFS0A
4
P11
2
P5
2
Rev
A0208-2006
2.2
Sheet
1-20-2010_14:13
D
14
of
15
A
B
C
D
5V_USB
F2
5A
FUS005
FER17
190
FER002
4
1
D8
ZHCS1000
SOT23-312
DNP
D12
MBRS540T3G
5A
SMC
3
UNREG_IN
R170
0
0805
DNP
2
J6
1
C180
1000PF
1206
2
C147
10UF
1210
D11
MBRS540T3G
5A
SMC
3
7_0V_POWER
CON005
D7
ZHCS1000
SOT23-312
2.5V @ 20mA
D16
GSOT08
SOT23-3
3.3V
TP22
2.5V
R110
0
0402
1
VR3
7
IN1
8
IN2
R135
10K
0402
DNP
6
SD
USB_VRSEL
R107
10K
0402
FER19
600
1206
C179
1000PF
1206
VR4
7
IN1
8
IN2
6
SD
FER20
600
1206
R108
10K
0402
DNP
1
OUT1
2
OUT2
3
OUT3
5
FB
GND
4 ADP3336ARMZ
MSOP8
R144
10K
0402
R137
105.0K
0603
"5V USB"
R116
0
0402
UNREG_IN
USB_VRSEL
5V_USB
U28
1
OUT1
2
OUT2
3
OUT3
5
FB
GND
4 ADP3336ARMZ
MSOP8
7
1
EN
R146
210.0K
0805
2
FLG
GND
3 MIC2025-1
SOIC8
C148
1UF
0805
R117
1K
0603
DNP
CT16
150UF
D
C178
1UF
0805
C143
4.7UF
0805
6
OUT1
8
OUT2
IN1
C159
1UF
0805
1
R145
64.9K
0805
C144
1UF
0805
SHGND
R136
95K
0603
SHGND
Unpopulate P14 when measuring VDDINT
SJ9
SHORTING
JUMPER
DEFAULT=INSTALLLED
UNREG_IN
C184
10UF
1210
Unpopulate P15 when measuring VDDEXT
C181
10UF
0805
DNP
"VDDINT"
VROUT
TP5
3.3V
SJ8
TP15
TP16
SHORTING
JUMPER
DEFAULT=INSTALLLED
3.3V @ 2A
P14
1
2
IDC2X1
2
R149
0
0402
PGND
TP6
R150
24.9K
0603
R134
0.05
1206
VR1
5
IN
1
"VDDEXT"
3.3V
R132
0.05
1206
DNP U18
1
2
IDC2X1
C182
470PF
0603
C183
68PF
0603
3
FB
PGATE
GND
2
R151
80.6K
0603
4
6
R133
0
0603
ADP1864AUJZ
SOT23-6
L1
10UH
IND001
1
5
2
6
3
7
4
8
2
R143
0.05
1206
VDDINT
P15
COMP
CS
U21
1
5
2
6
3
7
4
8
L2
2.5UH
IND013
VDDEXT
R142
0.05
1206
D10
MBRS540T3G
SMC
SI4411DY
SO-8
CT11
220UF
D2E
CT12
2.2UF
B
DNP
C171
4.7UF
0805
D14
GSOT03
TP17
C169
0.1UF
0603
R141
0.05
1206
SOT23-3
R152
255.0K
0603
C170
10UF
0805
CT10
100UF
C
SOD-523
FDS9431A
SOIC8
CT9
100UF
C
D9
ZHCS1000
SOT23-312
D13
ESD5Z2.5T1
VDDMEM
PGND
P16
1
2
PGND
IDC2X1
"VDDMEM"
W3
COPPER
3
4A
3
SJ7
SHORTING
JUMPER
DEFAULT=INSTALLLED
UNREG_IN
MH1
MH2
MH3
MH4
MH6
MH7
MH14
MH5
MH8
MH9
MH10
MH11
MH12
MH13
MH15
PGND
C142
22UF
1210
C139
22UF
1210
Unpopulate P16 when measuring VDDMEM
R103
0.027
1206
PGND2
R98
24.9K
0603
VR2
TP14
5
CS
C141
68PF
0603
3
FB
PGATE
GND
2
R99
80.6K
0603
4
6
ADP1864AUJZ
SOT23-6
5V
U23
IN
1
COMP
C140
470PF
0603
"5V"
R101
0.027
1206
1
R102
0
0603
5V @ 2A
5
2
6
3
7
4
8
L4
2.5UH
IND013
D5
MBRS540T3G
SMC
SI4411DY
SO-8
"GND"
CT6
100UF
C
C145
22UF
1210
CT14
47UF
D
DNP
D15
GSOT05
SOT23-3
TP12 TP8
TP7
TP4
TP9
ANALOG
DEVICES
R100
422K
0603
4
PGND2
W4
COPPER
PGND2
Size
PGND2
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-BF527 EZ-KIT Lite
POWER
Title
4A
20 Cotton Road
Rev
A0208-2006
2.2
Sheet
1-19-2010_15:47
D
15
of
15
I
INDEX
A
AD7879_1_PENIRQ interrupt signal, 1-21
ADM3202 (U25) line driver/receiver, 1-26
AMS0-3 select lines, 1-17
analog audio interface, See audio interface
architecture, of this EZ-KIT Lite, 2-2
ASYNC (asynchronous memory control)
external memory banks 0-3, 1-14
audio
interface, xiii, 1-23
dual connectors (J7-8), 1-24, 2-30
SPORT connect switch (SW20), 1-23, 2-19
SPORT connect switch (SW27), 1-23, 2-19
B
battery holder (J5), 2-29
bill of materials, A-1
board design database, 1-31
board schematic (ADSP-BF527), B-1
boot
modes, 2-11
mode select switch (SW2), 1-17, 1-18, 2-11
C
CCLK register, 1-16
clock in (CLK IN) signal, 2-3
audio codec, See audio interface
code security, 1-11
configuration, of this EZ-KIT Lite, 1-3
connectors
diagram of locations, 2-28
J1-3 (expansion), 1-29, 2-28
J4 (RS-232), 2-29
J5 (battery), 2-29
J6 (power), 2-30
J7-8 (dual audio), 1-24, 2-30
J9 (Ethernet), 1-23, 2-30
P10 (TWI) interface, 2-33
P11 (timers), 2-33
P13 (host interface), 1-17, 2-34
P17 (JTAG CPLD), 2-34
P18 (LCD data), 2-34
P1 (USB OTG), 1-8, 1-25, 2-31, 2-35
P2 (keypad), 2-31
P5 (UART0), 1-26, 2-31
P6 (SPORT0), 2-32
P7 (SPORT1), 2-32
P8 (PPI), 2-32
P8 (PPI interface), 1-19
P9 (SPI), 2-33
ZJ1 (USB), 2-35
ZP4 (JTAG), 1-28, 2-35
contents, of this EZ-KIT Lite package, 1-3
core voltage, 2-2
CPLD 14-15/DCE enable switch (SW30),
1-24, 2-22
CPLD D8-13 switch (SW29), 2-22
CTS signal, 1-26
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
I-1
Index
D
G
DCE (RS-232) connector (J4), 2-29
debugger interface (ZJ1), 1-8
default configuration, of this EZ-KIT Lite, 1-3
DIP switch (SW13), 1-19, 1-25, 1-28, 2-17,
2-18
down signal (CDG), 1-22
DT0PRIA_PPIFS3 signal, 2-24
general-purpose IO pins, 1-27, 2-10, 2-15,
2-16, 2-17, 2-18, 2-26
E
EBIU_DDRCTL0-2 registers, 1-15
Ethernet
interface, xiv, 1-22
connector (J9), 1-23, 2-30
enable switch (SW1), 1-22, 2-10
LEDs (LED6-7), 2-27
mode switch (SW9), 1-23, 2-14
PHY IC (U14), 1-17
evaluation license
CCES, 1-10
example programs, 1-31
expansion interface, 1-17, 1-18, 1-22, 1-29,
2-13, 2-14, 2-28
external memory, 1-12, 1-14
F
features, of this EZ-KIT Lite, xiii
FET switch (U28), 1-25
flag pins, See programmable flags by name (PFx,
PGs, PHx, PJx)
flash memory
See also parallel flash memory
enable switch (SW7), 2-13
flash WP jumper (JP10), 2-24
I-2
H
HOSTACK_LED2 signal, 1-19
HOSTACK signal, 1-28
HOSTADDR signal, 1-25, 1-28
HOSTCE# signal, 1-23
HOSTD9 signal, 1-18
host interface connector (P13), 1-17, 2-34
HOSTWR#_LED1 signal, 1-20, 2-13
HOSTWR signal, 1-28
HWAIT port, 1-26, 1-28
I
I2C address, 1-21
ILED pin, 1-21
installation, of this EZ-KIT Lite, 1-4, 1-8
CCES, 1-4
IO voltage, 2-2
J
JTAG
interface, 1-28
connector (ZP4), 1-28, 2-35
CPLD connector (P17), 2-34
jumpers
diagram of locations, 2-23
JP10 (flash WP), 2-24
JP14 (stamp enable), 2-24
JP15 (LED0 off), 2-24
JP5 (UART1 loopback), 2-24
JP6 (mic select), 1-24, 2-23
JP7 (STAMP enable), 2-23
P14 (VDDINT power), 1-29, 2-25
P15 (VDDEXT power), 1-29, 2-25
P16 (VDDMEM power), 1-29, 2-25
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Index
K
M
KEYIRQ signal, 1-21
keypad interface
connections, 1-21
components, xiv
connector (P2), 2-31
current sink LED (LED8), 2-27
LCD reset switch (SW5), 1-28, 2-13
LCD SPI/IRQ select switch (SW25), 1-18,
1-21, 2-20
MAC address, 1-23
media independent interface (MII), 1-22
Media Instruction Set Computing (MISC), xi
memory map, of this EZ-KIT Lite, 1-12
MICBIAS signal, 1-24, 2-23
MICIN signal, 1-24, 2-23
microphone
gain switch (SW4), 2-12
loopback switch (SW8), 1-24, 2-14
select jumper (JP6), 1-24, 2-23
Micro Signal Architecture (MSA), xi
momentary switch (SW3), 1-22, 2-12
L
LCD module
See also touchscreen
interface, xiv, 1-19
data connector (P18), 2-34
mode switch (SW26), 1-20, 2-21
SPI/keypad control switch (SW25), 1-18,
1-21, 2-20
LCD_RESET line, 2-13
LED0 off jumper (JP15), 2-24
LED1_CURRENT signal, 2-27
LED1_EN register, 2-27
LEDs
diagram of locations, 2-26
LED0 (SW24 switch), 1-21
LED1-3 (PF8, PG11-12), 1-27, 1-30, 2-26
LED4 (power), 2-27
LED5 (reset), 2-27
LED6-7 (Ethernet), 2-27
LED8 (keypad current sink), 1-21, 2-27
ZLED3 (USB monitor), 1-8
license restrictions, 1-11
line in-out loopback switch (SW28), 2-22
LINEIN signal, 1-24
LINOUT signal, 1-24
Lockbox secure technology, 1-11
loopback switch (SW28), 2-22
N
NAND flash memory
interface, xiii, 1-17
enable switch (SW11), 1-17, 2-16
NDCE#_HOSTD10 signal, 1-17
NINT keypad interrupt signal, 1-21
notation conventions, xxi
O
oscilloscope, 1-30
P
package contents, 1-3
parallel flash memory, xiii, 1-17
parallel peripheral interface (PPI), See PPI
interface
PF0-7 signals, 2-3
PF8 signal, 2-3
PF9-15 signals, 2-3
PG0-10 signals, 2-5
PG11-12 (IO) signals, 1-19, 1-20, 2-5, 2-26
PG13 (IO) signal, 1-25, 2-5
PG14-15 (IO) signals, 2-5
PG8 (IO) signal, 2-26
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
I-3
Index
PH0-9 signals, 2-7
PH10 signal, 2-7
PH11-15 signals, 2-7
PJ0-3 signals, 2-9
PLL_CTL register, 1-16
PLL_DIV register, 1-16
POST (power-on-self test) program, 1-17, 1-18,
1-30, 2-23
power
connector (J6), 2-30
LED (LED4), 2-27
measurements, 1-29
supply, 1-3
PPI interface
connections, 1-19
connector (P8), 1-19, 2-32
PPI_SEL signal, 1-19
product information, xviii
push buttons (PB1-2), 1-28
push buttons (SW14-15), 2-18
S
schematic, of ADSP-BF527 EZ-KIT Lite, B-1
SDRAM interface, 1-14, 1-15
serial peripheral interconnect (SPI) ports, See
SPI
SPI interface
codec control, 1-24
config switch (SW19), 1-24
connector (P9), 2-33
SPISEL1 signal, 1-18
SPISEL5 signal, 1-18
SPISEL7 signal, 1-18
SPORT0A
enable switch (SW20), 1-23, 2-19
enable switch (SW27), 1-23, 2-19
SPORT0 connector (P6), 2-32
SPORT1 connector (P7), 2-32
SRAM memory, 1-12
STAMP connectors
enable jumper (JP7), 2-23
UART0 (P5), 1-26
stamp enable jumper (JP14), 2-24
R
startup, of this EZ-KIT Lite, 1-8
real-time clock (RTC) interface, 1-27, 2-3
CCES, 1-4
Reduced Instruction Set Computing (RISC), xi
SW10
(UART1 enable) switch, 1-26, 2-15
reduced media independent interface (RMII),
SW11
(NAND enable) switch, 1-22, 2-16
1-22
SW13
(push
button enable) DIP switch, 1-19,
reset
1-25,
1-28,
2-17, 2-18
LED (LED5), 2-27
SW14-15
(PF)
push
buttons, 2-18
push button (SW16), 2-18
SW16
(reset)
push
button,
2-18
RESET line, 2-13
SW19
(SPI/TWI
config)
switch,
1-24
RMIIMDINT signal, 1-23
SW1
(Ethernet
enable)
switch,
1-22,
2-10
rotary encoder
SW20
(audio
and
SPORT
enable)
switch,
1-23,
interface, 1-22
2-19
enable switch (SW11), 1-22, 2-16
SW21 (TFS0A/HOSTCE enable) switch, 1-23,
switch (SW3), 1-22, 2-12
2-19
RS-232 connector (J4), 2-29
SW22
(touch address) switch, 1-21, 2-19
RTC power pin, 1-27
SW24
(touchpad
interrupt) switch, 1-21, 2-20
RTS signal, 1-26
SW25 (LCD/keypad control) switch, 1-18,
1-21, 2-20
I-4
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
Index
SW26 (LCD mode) switch, 1-20, 2-21
SW27 (audio and SPORT enable) switch, 1-23,
2-19
SW28 (line in-out loopback) switch, 2-22
SW29 (CPLD D8-13) switch, 2-22
SW2 (boot mode select) switch, 1-17, 1-18,
2-11
SW30 (CPLD 14-15/DCE enable) switch,
1-24, 2-22
SW3 (rotary) switch, 1-22, 2-12
SW4 (mic gain) switch, 1-24, 2-12
SW5 (LCD reset) switch, 1-28, 2-13
SW7 (flash enable) switch, 2-13
SW8 (mic loopback) switch, 1-24, 2-14
SW9 (Ethernet mode) switch, 1-23, 2-14
switches
See also switches by name (SWx)
diagram of locations, 2-10
synchronous dynamic random access memory,
See SDRAM
system architecture, of this EZ-KIT Lite, 2-2
T
technical support, xvii
TFS0A/HOSTCE enable switch (SW21), 1-23,
2-19
TFS0A signal, 1-23
TFSOA_RMIIMDINT#_HOSTCE# signal,
1-24
thumbwheel control, xiv
timers connector (P11), 2-33
touchpad interrupt switch (SW24), 1-21, 2-20
touchscreen address switch (SW22), 1-21, 2-19
two-wire interface (TWI)
config switch (SW19), 1-24
connector (P10), 2-33
selecting for codec, 1-24
U
UART0 interface connector (P5), 1-26, 2-31
UART1 interface
enable switch (SW10), 1-26, 2-15
loopback jumper (JP5), 2-24
UART1_RX signal, 2-23
UART1_TX signal, 2-23, 2-24
universal asynchronous receiver transmitter, See
UART0, UART1
up signal (CUD), 1-22
USB
debug agent connector (ZJ1), 2-35
OTG interface connector (P1), 1-8, 1-25,
2-31, 2-35
voltage regulators, 1-25
USB_VRSEL signal, 1-25, 1-28
V
VDDEXT
pin, 1-29
power jumper (P15), 1-29, 2-25
VDDINT
pin, 1-29
power jumper (P14), 1-29, 2-25
VDDMEM
pin, 1-29
power jumper (P16), 1-29, 2-25
very-long instruction word (VLIW), xi
VisualDSP++ environment, 1-8
voltage planes, 1-27, 1-29, 2-17
VR3 (USB voltage) regulator, 1-25
W
watchdog timer, 1-27
ADSP-BF527 EZ-KIT Lite Evaluation System Manual
I-5