ADSP-21161N EZ-KIT Lite Evaluation System Manual (Rev. 4.0)

ADSP-21161N EZ-KIT Lite®
Evaluation System Manual
Revision 4.0, October 2006
Part Number
82-000530-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
©2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices icon bar and logo, VisualDSP++, the VisualDSP++
logo, SHARC, CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite
are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21161N EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE”
mark.
The ADSP-21161N EZ-KIT Lite evaluation system had been appended to
Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE
Certification by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Purpose of This Manual ................................................................. xiv
Intended Audience ......................................................................... xiv
Manual Contents ............................................................................ xv
What’s New in This Manual ............................................................ xv
Technical or Customer Support ...................................................... xvi
Supported Processors ...................................................................... xvi
Product Information ..................................................................... xvii
MyAnalog.com ........................................................................ xvii
Processor Product Information ................................................. xvii
Related Documents ................................................................ xviii
Online Technical Documentation ............................................. xix
Accessing Documentation From VisualDSP++ ....................... xx
Accessing Documentation From Windows ............................. xx
Accessing Documentation From Web ................................... xxi
Printed Manuals ....................................................................... xxi
VisualDSP++ Documentation Set ......................................... xxi
Hardware Tools Manuals ..................................................... xxii
Processor Manuals ............................................................... xxii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
v
CONTENTS
Data Sheets ........................................................................ xxii
Notation Conventions .................................................................. xxii
USING ADSP-21161N EZ-KIT LITE
Package Contents ......................................................................... 1-2
Default Configuration .................................................................. 1-3
Installation and Session Startup ..................................................... 1-5
Evaluation License Restrictions ..................................................... 1-7
Memory Map ............................................................................... 1-8
SDRAM Memory ......................................................................... 1-9
Flag Pins ...................................................................................... 1-9
Interrupt Pins ............................................................................. 1-10
Audio Interface ........................................................................... 1-11
Example Programs ...................................................................... 1-13
Flash Programmer Utility ............................................................ 1-13
ADSP-21161N EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Port ........................................................................... 2-3
Host Processor Interface (HPI) ................................................ 2-4
SPORT Audio Interface .......................................................... 2-4
SPI Audio Interface ................................................................. 2-4
JTAG Emulation Port ............................................................. 2-5
Switch and Jumper Settings ........................................................... 2-5
Clock Mode Selection Switch (SW10) ..................................... 2-5
vi
ADSP-21161N EZ-KIT Lite Evaluation System Manual
CONTENTS
Boot Mode Selection Switch (SW11) ....................................... 2-7
~BMS Enable Jumper (JP22) ................................................... 2-7
SDRAM Disable Jumper (P17) ................................................ 2-8
S/PDIF Selection Jumper (P2) ................................................. 2-8
MCLK Selection Jumper (JP3) ................................................ 2-8
FLAG0 Enable Jumper (JP1 and JP4) ...................................... 2-9
FLAG1 Enable Jumper (JP5) ................................................... 2-9
Sample Frequency Jumper (JP6) ............................................... 2-9
ADC2 Input Mode Selection Jumpers (JP7 and JP8) .............. 2-10
MIC Gain Selection Jumpers (JP9 and JP10) ......................... 2-10
ADC2 Input Selection Jumper (JP11) .................................... 2-10
AD1836 Control Selection Jumper (JP23) ............................. 2-11
SW1 Enable Jumper (JP26) ................................................... 2-11
SW2 Enable Jumper (JP27) ................................................... 2-12
Processor ID Settings .................................................................. 2-12
LEDs and Push Buttons .............................................................. 2-13
Reset LED (LED1) ................................................................ 2-13
FLAG LEDs (LED2–7) ......................................................... 2-14
VERF LED (LED12) ............................................................ 2-14
Power LED (LED11) ............................................................. 2-14
USB Monitor LED (ZLED3) ................................................. 2-15
Programmable Flag Push Buttons (SW1–4) ............................ 2-15
Interrupt Push Buttons (SW5–7) ........................................... 2-15
Board Reset Push Button (SW12) .......................................... 2-16
ADSP-21161N EZ-KIT Lite Evaluation System Manual
vii
CONTENTS
Connectors ................................................................................. 2-17
USB Connector (ZJ1) ........................................................... 2-17
Audio Connectors (J2–6, P4) ................................................ 2-18
External Port Connector (P9) ................................................ 2-18
Host Processor Interface Connector (P10) ............................. 2-19
Voltage Connector (P11) ....................................................... 2-19
SPORT1 and SPORT3 Connector (P12) ............................... 2-19
Link Port Connectors (P13 and P14) ..................................... 2-20
Power Input Connector (P16) ............................................... 2-20
SPI Connector (P18) ............................................................. 2-21
JTAG Connector (ZP4) ......................................................... 2-21
Specifications ............................................................................. 2-22
Power Supply ........................................................................ 2-22
Board Current Measurements ................................................ 2-22
ADSP-21161N EZ-KIT LITE BILL OF MATERIALS
ADSP-21161N EZ-KIT LITE SCHEMATIC
Title Page ..................................................................................... B-1
ADSP-21161N Processor .............................................................. B-2
Memory ....................................................................................... B-3
S/PDIF Receiver ........................................................................... B-4
Audio Codec ................................................................................ B-5
Audio In 1 .................................................................................... B-6
Audio In 2 .................................................................................... B-7
viii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
CONTENTS
Audio In MIC/LINE, Headphone Out ......................................... B-8
Audio Out 1 ................................................................................ B-9
Audio Out 2 .............................................................................. B-10
Audio Out 3 .............................................................................. B-11
Audio Out 4 .............................................................................. B-12
Push Buttons ............................................................................. B-13
LEDs, RESET, and Oscillators ................................................... B-14
Connectors ................................................................................ B-15
Power ........................................................................................ B-16
INDEX
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ix
CONTENTS
x
ADSP-21161N EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21161N EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for SHARC® digital signal processors
(DSPs).
SHARC processors are based on a 32-bit super Harvard architecture that
includes a unique memory architecture comprised of two large on-chip,
dual-ported SRAM blocks coupled with a sophisticated IO processor,
which gives a SHARC processor the bandwidth for sustained high-speed
computations. SHARC processors represent today’s de facto standard for
floating-point processor targeted for premium audio applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++® development environment to test the capabilities of
ADSP-21161N SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21161N assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xi
Access to the ADSP-21161N processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface provides unrestricted access to the ADSP-21161N processor and
the evaluation board peripherals. Analog Devices JTAG emulators offer
faster communication between the host PC and target hardware. Analog
Devices carries a wide range of in-circuit emulation products. To learn
more about Analog Devices emulators and processor development tools,
go to http://www.analog.com/dsp/tools/.
The ADSP-21161N EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board.
ADSP-21161N EZ-KIT Lite installation is part of the VisuL The
alDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
to “Evaluation License Restrictions” on page 1-7.
The board features:
• Analog Devices ADSP-21161N SHARC processor
D
D
100 MHz core clock speed
Configurable core clock switch
• Analog Devices AD1836 96 kHz audio codec
D
D
D
D
Jumper selectable line-in or mic-in 3.5 mm stereo jack
Line-out 3.5 mm stereo jack
Four RCA jacks for audio input
Eight RCA jacks for audio output
• Analog Devices AD1852 192 kHz auxiliary digital-to-analog converter (DAC)
xii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
• Crystal Semiconductor CS8416 192 kHz Sony/Philips Digital
Interface Format (SPDIF) receiver
D
Optical and coaxial connectors for SPDIF input
• Flash memory
D
512K x 8-bits
• Synchronous dynamic random access memory (SDRAM)
D
48 MB (8M x 48 bit)
• Interface connectors
D
D
D
D
14-pin emulator connector for JTAG interface
SPORT connectors
Link port 0 and link port 1
External port connectors (not populated)
• General-purpose IO
D
D
D
Four push button flags
Three push button interrupts
Six LED outputs
• Analog Devices ADP1864, ADP3338 and ADP3339 voltage
regulators
The EZ-KIT Lite board has a flash memory device that can be used to
store user-specific boot code. By configuring the switch for EPROM boot,
the board can run as a stand-alone unit. The ADSP-21161N EZ-KIT Lite
package contains a flash programmer utility, which allows you to program
the flash memory. The “Flash Programmer Utility” is described
on page 1-13.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xiii
Purpose of This Manual
and SPORT2 connect to the audio codec, facilitating creation of
audio-signal processing applications. SPORT1 and SPORT3 connect to
off-board connectors of other serial devices.
SPORT0
Additionally, the EZ-KIT Lite board provides un-installed expansion connector footprints to connect to the processor’s external port (EP) and host
processor interface (HPI).
Purpose of This Manual
The ADSP-21161N EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board) and describes the
operation and configuration of the board components. The product software component is detailed in the VisualDSP++ Installation Quick
Reference Card. The manual provides guidelines for running your own
code on the ADSP-21161N EZ-KIT Lite. Finally, a schematic and a bill
of materials are provided as a reference for future designs.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-21161 SHARC Processor Hardware Reference and
ADSP-21160 SHARC Processor Instruction Set Reference) that describe your
target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and the VisualDSP++ user’s or getting started
guides. For the locations of these documents, see “Related Documents” on
page -xviii.
xiv
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Manual Contents
The manual consists of:
• Chapter 1, “Using ADSP-21161N EZ-KIT Lite” on page 1-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and provides a simplified memory map.
• Chapter 2, “ADSP-21161N EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the hardware aspects of the evaluation
system.
• Appendix A, “ADSP-21161N EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
• Appendix B, “ADSP-21161N EZ-KIT Lite Schematic” on
page B-1
Provides the resources to allow EZ-KIT Lite board-level debugging
or to use as a reference design.
B now is part of the online Help. The PDF version of
L Appendix
the ADSP-21161N EZ-KIT Lite Evaluation System Manual is
located in the Docs\EZ-KIT Lite Manuals folder on the installation
CD. Alternatively, the book can be found on the Analog Devices
Web site, www.analog.com/processors.
What’s New in This Manual
This edition of the ADSP-21161N EZ-KIT Lite Evaluation System Manual
documents the ADSP-21161N EZ-KIT Lite compliance with the RoHS
and WEEE directives.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xv
Technical or Customer Support
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
[email protected]
• E-mail processor questions to
[email protected] (World wide support)
[email protected] (Europe support)
[email protected] (China support)
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This EZ-KIT Lite evaluation system supports Analog Devices
ADSP-21161N SHARC processors.
xvi
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from printed publications (manuals).
Analog Devices is online at www.analog.com. Our website provides information about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration:
Visit www.analog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as means for you to select
the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publications, data sheets, application notes, product overviews, and product
announcements.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xvii
Product Information
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
[email protected] (World wide support)
[email protected] (Europe support)
[email protected] (China support)
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
Related Documents
For information on product related development software, see the following publications.
Table 1. Related Processor Publications
Title
Description
ADSP-21161N DSP Data Sheet
General functional description, pinout, and
timing
ADSP-21161 SHARC Processor Hardware Refer- Description of internal processor architecture,
ence
registers, and all peripheral functions
ADSP-21160 SHARC Processor Instruction Set
Reference
Description of all allowed processor assembly
instructions
Table 2. Related VisualDSP++ Publications
xviii
Title
Description
VisualDSP++ User’s Guide
Description of VisualDSP++ features and usage
VisualDSP++ Assembler and Preprocessor Manual
Description of the assembler function and
commands
VisualDSP++ C/C++ Complier and Library
Manual for SHARC Processors
Description of the complier function and commands for SHARC processors
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Table 2. Related VisualDSP++ Publications (Cont’d)
Title
Description
VisualDSP++ Linker and Utilities Manual
Description of the linker function and commands
VisualDSP++ Loader and Utilities Manual
Description of the loader function and commands
The listed documents can be found through online Help or in the Docs
folder of your VisualDSP++ installation. Most documents are available in
printed form.
you plan to use the EZ-KIT Lite board in conjunction with a
L IfJTAG
emulator, also refer to the documentation that accompanies
the emulator.
All documentation is available online. Most documentation is available in
printed form.
Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/technicalSupport/technicalLibrary/.
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary .pdf files of most manuals are provided in the
Docs folder on the VisualDSP++ installation CD.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xix
Product Information
Each documentation file type is described as follows.
File
Description
.chm
Help system files and manuals in Help format
.htm or
.html
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the .html files requires a browser, such as
Internet Explorer 5.01 (or higher).
.pdf
VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat
Reader (4.0 or higher).
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows® Explorer, or the Analog Devices
Web site.
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
To view ADSP-21161N EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
xx
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Help system files (.chm) are located in the Help folder, and .pdf files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows® interface. These help files provide information about VisualDSP++
and the ADSP-21161N EZ-KIT Lite evaluation system.
Accessing Documentation From Web
Download manuals at the following Web site:
http://www.analog.com/processors/technicalSupport/technicalLibrary/.
Select a processor family and book title. Download archive (.zip) files,
one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xxi
Notation Conventions
Hardware Tools Manuals
To purchase EZ-KIT Lite and in-circuit emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
conventions, which apply only to specific chapters, may
L Additional
appear throughout this document.
xxii
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Preface
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
[this,…]
Optional item lists in syntax descriptions appear within brackets
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
L
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
a
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
[
Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
xxiii
Notation Conventions
xxiv
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1 USING ADSP-21161N EZ-KIT
LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-21161N EZ-KIT Lite evaluation system.
The information appears in the following sections.
• “Package Contents” on page 1-2
Lists the items contained in the ADSP-21161N EZ-KIT Lite
package.
• “Default Configuration” on page 1-3
Shows the default configuration of the ADSP-21161N EZ-KIT
Lite.
• “Installation and Session Startup” on page 1-5
Instructs how to start a new or open an existing ADSP-21161N
EZ-KIT Lite session using VisualDSP++.
• “Evaluation License Restrictions” on page 1-7
Describes the restrictions of the VisualDSP++ license shipped with
the EZ-KIT Lite.
• “Memory Map” on page 1-8
Defines the memory map of the ADSP-21161N EZ-KIT Lite.
• “SDRAM Memory” on page 1-9·
Describes the synchronous dynamic random access memory
(SDRAM) settings.
• “Flag Pins” on page 1-9
Describes the board’s flag pins.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-1
Package Contents
• “Interrupt Pins” on page 1-10
Describes the board’s interrupt pins.
• “Audio Interface” on page 1-11
Describes the board’s audio interface.
• “Example Programs” on page 1-13
Provides information about example programs included in the
ADSP-21161N EZ-KIT Lite.
• “Flash Programmer Utility” on page 1-13
Provides information on the Flash Programmer utility included
with the EZ-KIT Lite software.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For detailed information on how to program the ADSP-21161N SHARC
processor, refer to the documents referenced in “Related Documents”.
Package Contents
Your ADSP-21161N EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21161N EZ-KIT Lite board
• VisualDSP++ Installation Quick Reference Card
1-2
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using ADSP-21161N EZ-KIT Lite
• CD containing:
D
VisualDSP++ software
D
ADSP-21161N EZ-KIT Lite debug software
D
USB driver files
D
Example programs
D
ADSP-21161N EZ-KIT Lite Evaluation System Manual (this
document)
• Universal 7V DC power supply
• USB 2.0 cable
• Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic
charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards
in the protective shipping package.
The ADSP-21161N EZ-KIT Lite board is designed to run outside your
personal computer as a stand-alone unit. You do not have to open your
computer case.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-3
Default Configuration
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when
handling the board to avoid the discharge of static electricity,
which may damage some components.
2. Figure 1-1 shows the default jumper settings, switches, connector
locations, and LEDs used in installation. Confirm that your board
is set up in the default configuration before continuing.
Figure 1-1. EZ-KIT Lite Hardware Setup
1-4
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using ADSP-21161N EZ-KIT Lite
3. Plug the provided power supply into P16 on the EZ-KIT Lite
board. Visually verify that the green power LED (LED11) is on. Also
verify that the red reset LED (LED1) goes on for a moment and then
goes off, and, finally, LED2 through LED8 are sequentially blinking.
4. Connect one end of the USB cable to an available full speed USB
port on your PC and the other end to ZJ1 on the ADSP-21161N
EZ-KIT Lite board.
Installation and Session Startup
correct operation, install the software and hardware in the
L For
order presented in the VisualDSP++ Installation Quick Reference
Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start –> Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-5
Installation and Session Startup
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Session from the Session List dialog box.
• From the Session menu, Connect to Target. Then click
New Session from the Session List dialog box.
4. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target
processor, select ADSP-21161N. Click Next.
5. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen.
In the Select your platform list, select ADSP-21161N EZ-KIT
Lite via Debug Agent. In Session name, highlight or specify the
session name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and to open a
new session.
Click Next.
1-6
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using ADSP-21161N EZ-KIT Lite
7. The Finish page of the wizard appears on the screen. The page displays your selections. If you are satisfied, click Finish. If not, click
Back to make changes.
disconnect from a session, click the disconnect button
L Toor select
Session –> Disconnect from Target.
To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK.
Evaluation License Restrictions
The ADSP-21161N EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
• VisualDSP++ allows a connection to the ADSP-21161N EZ-KIT
Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed.
• The linker restricts a users program to 5K words of internal memory for code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-7
Memory Map
Memory Map
The ADSP-21161N processor includes 1 MB of internal SRAM for program storage or data storage. The configuration of internal SRAM is
detailed in the ADSP-21161 SHARC Processor Hardware Reference.
The ADSP-21161N EZ-KIT Lite board contains 512K x 8-bits of external flash memory. The flash memory connects to the processors’s ~MS1 and
~BMS memory select pins. The flash memory can be accessed in either the
boot memory space or the external memory space. The external memory
interface also connects to three 8M x 16-bit synchronous dynamic random
access memory (SDRAM). The SDRAM memory connects to the ~MS0
memory select pin.
Table 1-1. EZ-KIT Lite Evaluation Board Memory Map
Internal
Memory
External
Memory
1-8
Start Address
End Address
Content
0x0000 0000
0x0001 FFFF
IOP registers (internal)
0x0002 0000
0x0002 1FFF
Block 0 long word addressing
0x0002 8000
0x0002 9FFF
Block 1 long word addressing
0x0004 0000
0x0004 3FFF
Block 0 normal word addressing
0x0005 0000
0x0005 3FFF
Block 1 normal word addressing
0x0008 0000
0x0008 7FFF
Block 0 short word addressing
0x000A 0000
0x000A 7FFF
Block 1 short word addressing
0x0010 0000
0x001F FFFF
Multiprocessor memory space
0x0020 0000
0x009F FFFF
External memory space bank 0 (SDRAM)
0x0400 0000
0x0407 FFFF
External memory space bank 1 (flash)
0x0800 0000
0x0BFF FFFF
External memory space bank 2
0x0C00 0000
0x0FFF FFFF
External memory space bank 3
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using ADSP-21161N EZ-KIT Lite
SDRAM Memory
The SDRAM memory connects to the SDRAM controller of the processor. A set of programmable timing parameters is available to configure the
SDRAM banks to support slower memory accesses. Care must be taken
when configuring the SDRAM control registers. For more information
regarding the setup of the SDRAM controller, please refer to the
ADSP-21161 SHARC Processor Hardware Reference. An example program
is included in the EZ-KIT Lite installation directory to demonstrate the
SDRAM setup.
When you are in a VisualDSP++ session connected to the ADSP-21161N
EZ-KIT Lite board, the SDRAM registers are configured automatically
through the debugger each time the processor is reset. Clearing the Auto
configure external memory check box on the Target Options dialog box,
which is accessible through the Settings pull-down menu, disables this
feature. For more information see the online Help.
Flag Pins
The ADSP-21161N processor holds twelve asynchronous flag IO pins.
Ten of these pins (FLAG0–9) are available for interaction with the running
program.
After the processor is reset, the flags are configured as inputs. The directions of the flags are configured though the MODE2 register and are set and
read though the FLAGS registers. The FLAGS registers are summarized in
Table 1-2. For more information on flags, refer to the ADSP-21161
SHARC Processor Hardware Reference.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-9
Interrupt Pins
Table 1-2. FLAG Pin Summary
FLAG1
Connects To
Description
FLAG0
SW1/AD1836_SPI_SELECT
FLAG0
FLAG1
SW2/AD1852_SPI_SELECT
FLAG1
FLAG2
SW3
FLAG2
connects to push button SW1 for user
input and to the SPI select pins of the AD1836
audio codec and CS8416 S/PDIF receiver
connects to push button SW2 for user
input and to the SPI select pin of the AD1852
auxiliary DAC.
connects to push button SW3 for user
input.
FLAG3
SW4
FLAG3
connects to push button SW4 for user
input.
FLAG4–9
FLAG10
FLAG11
1
and
FLAG0–3
connect to LEDs of the EZ-KIT Lite
board and are for user output.
LED2–7
FLAG4–9
Not connected
Not available
are available on connector P10.
Interrupt Pins
The ADSP-21161N processor holds three interrupt pins (IRQ0–2) that let
you interact with the running program. Each of the three external interrupts is accessible directly through the push button switches SW5–7 of the
EZ-KIT Lite board. Interrupt pins are summarized in Table 1-3. For more
information, refer to the ADSP-21161 SHARC Processor Hardware
Reference.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using ADSP-21161N EZ-KIT Lite
Table 1-3. Interrupt Pin Summary
Interrupt1
Connects To
Description
IRQ0
SW5
IRQ0–2
IRQ1
SW6
IRQ2
SW7
1
IRQ0–3
connect to the push buttons and supply
feedback for program execution. For instance, you
can write your code to trigger a flag when a routine is complete.
are available on connector P10.
Audio Interface
The audio interface consists of the AD1836 audio codec, the AD1852
auxiliary digital-to-analog converters (DACs) and the CS8416 Sony/Philips Digital Interface Format (S/PDIF) receiver. SPORT0 and SPORT2
connect to the audio devices and provide three channels of stereo input
(one channel digital, two channels analog) and four channels of stereo
output.
Analog audio input is facilitated by a 3.5 mm stereo jack (J3) and four
RCA mono jacks (J2). One of the AD1836 stereo input channels is dedicated to two of the RCA mono jacks. The other stereo input channels can
either be supplied by the 3.5 mm stereo jack or the other two RCA mono
jacks. JP11 determines which jack is used for audio input. Digital audio
input can be provided on either a single RCA mono jack (J6) or an optical
input connector (P4). P2 determines the source. Three of the stereo output
channels come from the AD1836, while the final channel is from the
AD1852. See “Audio Connectors (J2–6, P4)” on page 2-18 for more
information about the connectors.
The AD1836 multi-channel codec features six digital-to-analog converters
and four analog-to-digital converters (ADCs) and supports multiple digital stereo channels with 24-bit conversion resolution and a 96 kHz sample
rate. The AD1836 features a 108 dB dynamic range for each of its six
DACs and a 104 dB dynamic range for its four ADCs. The AD1836 is
ADSP-21161N EZ-KIT Lite Evaluation System Manual
1-11
Audio Interface
configured through an SPI port. The ADSP-21161N processor is capable
of accessing the AD1836’s SPI port through the SPI port as well as
through SPORT1. For more information, see “AD1836 Control Selection
Jumper (JP23)” on page 2-11.
The AD1852 is a complete 18/20/24-bit single-chip stereo digital audio
playback system. It is comprised of a multibit sigma-delta modulator, digital interpolation filters, and analog output drive circuitry. Other features
include an on-chip stereo attenuator and mute, programmed through an
SPI-compatible serial control port. The AD1852 is fully compatible with
all known DVD formats, including 192 kHz and 96 kHz sample frequencies and 24 bits. It also is backwards compatible by supporting 50/15µs
digital de-emphasis intended for “redbook” compact discs, as well as
de-emphasis at 32 kHz and 48 kHz sample rate.
The CS8416 is a monolithic CMOS device that receives and decodes
audio data up to 192 kHz, according to the AES3, IEC60958, S/PDIF,
and EIAJ CP1201 interface standards. The CS8416 receives data from a
transmission line, recovers the clock and synchronization signals, and
de-multiplexes the audio and digital data. The CS8416 is setup to operate
in SPI interface compatible mode.
The MICROPHONE and LINE-IN jacks connect to the left and right ADC2
channels on the AD1836, depending on the jumper settings. See “MIC
Gain Selection Jumpers (JP9 and JP10)” on page 2-10 and “ADC2 Input
Selection Jumper (JP11)” on page 2-10 for more information. Two RCA
jacks connect to ADC2 on the AD1836. This input is configured though
the input mode selection jumpers (see “ADC2 Input Mode Selection
Jumpers (JP7 and JP8)” on page 2-10 for more information).
The LINE-OUT jacks connect to the left and right DAC outputs of the
AD1836 and AD1852.
The CS8416 includes an error flag (VERF) to indicate that the audio output may not be valid. This signal connects to a LED (LED12) on the board
and also can be used by interpolation filters to provide error correction.
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ADSP-21161N EZ-KIT Lite Evaluation System Manual
Using ADSP-21161N EZ-KIT Lite
Example Programs
Example programs are provided with the ADSP-21161N EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in the
…\211xx\Examples\ADSP-21161 EZ-KIT Lite subdirectory of the VisualDSP++ installation directory. Please refer to the readme file provided
with each example for more information.
Flash Programmer Utility
The ADSP-21161N EZ-KIT Lite evaluation system includes a Flash Programmer utility. The utility allows you to program the flash memory on
the EZ-KIT Lite. The Flash Programmer is installed with VisualDSP++.
Once the utility is installed, it is accessible from the Tools pull-down
menu.
For more information on the Flash Programmer utility, go to online Help.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
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Flash Programmer Utility
1-14
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2 ADSP-21161N EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21161N EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 2-2
Describes the configuration of the ADSP-21161N EZ-KIT Lite
board and explains how the board components interface with the
processor.
• “Switch and Jumper Settings” on page 2-5
Shows the location and describes the function of the on-board
switches and jumpers.
• “LEDs and Push Buttons” on page 2-13
Shows the location and describes the function of the LEDs and
push buttons.
• “Connectors” on page 2-17
Shows the location and provides the part number for the on-board
connectors. Also, the manufacturer and part number information is
given for the mating parts.
• “Specifications” on page 2-22
Provides the requirements for powering the board.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
JTAG
Header
Host
Connector
EMI
Connectors
D[7:0]
3.3V
25MHz
Oscillator
Link0/1
External Memeory
Interface
ADSP-21161N
VDD_INT
DSP
VDD_EXT
SDRAM
Memory
48MB (8M x
48 bit)
PF7:0
1.8V
Host Port
Interface
Control
8 Bit Flash
Memory
4MBit
LEDs (6)
IRQ2:0
Debug
Agent
JTAG PORT
SRAM
USB Connector
A[18:0]
AD[15:0]
Control
PBs (7)
CLK_IN
SPI
Connector
SPI
SPORT0/2
SPORT1/3
SPORT1/3
Connector
Toshiba
TORX173
Optical
Reciever or
COAX input
CS8416 SPDIF
Receiver
AD1886
Codec
AD1852
Auxilliary
DAC
Stereo Amplifiers
Stereo Amplifiers
RCA Phono Line
IN(2) OUT(6)
Connectors 1/8"
Mic Connector
RCA Phono Line
OUT(2)
Connectors
+7.0V
Connector
5V A5V 3.3V 1.8V
Power
Regulatiors
Figure 2-1. System Architecture Block Diagram
2-2
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
The ADSP-21161N processor’s core voltage is 1.8V, the external (IO)
interface voltage is 3.3V.
A 25 MHz through-hole oscillator supplies the input clock to the processor. Footprints are provided on the board for a surface-mount oscillator
and a through-hole crystal for alternate user-installed clocks. The speed at
which the core operates is determined by the location of the clock mode
switch (SW10) as described in “Clock Mode Selection Switch (SW10)” on
page 2-5 and Table 2-1. By default, the processor core runs at 100 MHz.
Table 2-1. ADSP-21161N EZ-KIT Lite Clock Modes
CLKDBL
CLK_CFG1
CLK_CFG0
Core Clock Ratio
EP Clock Ratio
OFF
ON
ON
2:1
1X
OFF
ON
OFF
3:1
1X
OFF
OFF
ON
4:1
1X (default)
ON
ON
ON
4:1
2X
ON
ON
OFF
6:1
2X
ON
OFF
ON
8:1
2X
External Port
The external port (EP) of the processor connects to a 512K x 8-bit flash
memory. The flash memory connects to the boot memory select (~BMS)
pin and the memory select 1 (~MS1) pin. The connection allows the flash
memory to be used to boot the processor as well as to store information
during normal operation.
The external memory interface also connects to 48 MB (8M x 48 bit)
SDRAM memory. The SDRAM memory connects to the memory select 0
(~MS0) pin. Refer to “SDRAM Disable Jumper (P17)” on page 2-8 for
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-3
System Architecture
information on how to configure the width of the SDRAM. Refer to
“SDRAM Memory” on page 1-9 for a summary of the processor’s memory
map.
Some of the address, data, and control signals are available externally via
two off-board connectors. The EP connector pinout (P9 and P10) can be
found in “ADSP-21161N EZ-KIT Lite Schematic” on page B-1.
Host Processor Interface (HPI)
The host port interface (HPI) signals are brought to an unpopulated
off-board connector (P10). This allows the HPI to interface with a user
application. The pinout of the host port connector can be found in
“ADSP-21161N EZ-KIT Lite Schematic” on page B-1.
SPORT Audio Interface
and SPORT2 connect to the AD1836 codec (U10). A 3.5 mm stereo
jack and four RCA mono jacks facilitate an audio input, while a 3.5 mm
stereo jack and eight RCA mono jacks facilitate an audio output.
SPORT0
The codec contains two input channels. One channel connects to a
3.5 mm stereo jack and two RCA jacks. The 3.5 mm stereo jack connects
to a microphone. The two RCA jacks can connect to a LINE_OUT from an
audio device. You can supply an audio input to the codec microphone
input channel (MIC1) or to the LINE-IN input channel. The JP11 jumper
settings determine whether the LINE-IN channel of the codec is driven by
connector J2 or J3.
SPI Audio Interface
The serial port connector (SPI) connects to the AD1836, AD1852, and
the S/PDIF receiver (CS8416). The SPI port is used for writing and reading the control registers of the audio devices.
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ADSP-21161N EZ-KIT Lite Hardware Reference
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory, as well as the special function registers,
through a 14-pin header.
For a detailed description of the interface connectors, see EE-68 published
on the Analog Devices Web site (go to http://www.analog.com and search
for EE-68). For more information about the JTAG connection, see “JTAG
Connector (ZP4)” on page 2-21. For more information about available
emulators, contact Analog Devices as discussed in “Product Information”.
Switch and Jumper Settings
This section describes the function of the on-board switches and jumpers;
Figure 2-2 shows the locations of the switches and jumpers.
Clock Mode Selection Switch (SW10)
The SW10 switch controls the speed of the core and external port of the
ADSP-21161N processor. The frequency supplied to the CLKIN signal of
the processor can be changed. To change the frequency, remove the
25 MHz oscillator (U24) that is shipped with the board and replace the
oscillator with a different oscillator or crystal (Y2). A clock mode and frequency must be selected so that the minimum and maximum
specifications of the ADSP-21161N processor are not exceeded.
For more information about the clock modes, see the ADSP-21161
SHARC Processor Hardware Reference. Table 2-2 shows the SW10 switch
settings.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-5
Switch and Jumper Settings
Figure 2-2. Switch and Jumper Locations
Table 2-2. Clock Mode Select Switch (SW10)
2-6
CLKDBL
Pins 1 & 2
CLK_CFG1
Pins 3 & 4
CLK_CFG0
Pins 5 & 6
Core Clock
Ratio
External Port
Clock Ratio
Not installed
Installed
Installed
2:1
1x
Not installed
Installed
Not installed
3:1
1x
Not installed
Not installed
Installed
4:1
1x (default)
Installed
Installed
Installed
4:1
2x
Installed
Installed
Not installed
6:1
2x
Installed
Not installed
Installed
8:1
2x
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
Boot Mode Selection Switch (SW11)
The SW11 switch determines how the ADSP-21161N processor boots.
Table 2-3 shows the switch settings. For more information on boot
modes, see “~BMS Enable Jumper (JP22)” on page 2-7.
Table 2-3. Boot Mode Select Switch (SW11)
EBOOT
Position 1
LBOOT
Position 2
BMS
Position 3
Processor
Boot Mode
OFF
ON
OFF (output)
EPROM boot (default)
ON
ON
OFF (input)
Host processor boot
ON
OFF
ON (input)
Serial boot via SPI
ON
OFF
OFF (input)
Link port boot
ON
ON
ON (input)
No boot
OFF
OFF
ON (input)
Reserved
~BMS Enable Jumper (JP22)
The JP22 jumper controls the routing of the boot memory select (~BMS)
signal. When the jumper is installed, the ~BMS signal is routed to the flash
memory interface and can be used for reading, writing, and booting.
Install the jumper must be installed when booting in EPROM mode. The
jumper must be removed when using serial boot or no-boot mode. If the
jumper remains ON in serial boot or no-boot modes, the ~BMS signal is
grounded, and the flash memory is selected. For more information on
boot modes, see “Boot Mode Selection Switch (SW11)” on page 2-7.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-7
Switch and Jumper Settings
SDRAM Disable Jumper (P17)
The P17 jumper is used to enable or disable the third SDRAM device.
When the jumper is installed, the ADSP-21161N processor can access the
SDRAM as 48-bit-wide external memory.
The upper 16 bits of data are multiplexed with the link ports and the
external data bus; therefore, when the jumper is installed, the link ports
are not available. To use the link ports, remove P17.
S/PDIF Selection Jumper (P2)
The P2 jumper is used to select Sony/Philips Digital Interface Format
(S/PDIF) input to the CS8416 digital audio receiver. When the jumper is
configured for an optical connection, the TOSLINK optical input connector
(P4) must be used. When the jumper is configured for a coax connection,
the RCA input connector (J6) must be used.
Table 2-4. S/PDIF Modes (P2)
Jumper Location
Mode
1 and 2
Optical (default)
2 and 3
Coax
MCLK Selection Jumper (JP3)
The JP3 jumper selects the source of the master clock (MCLK) for the
AD1836 and AD1852 audio devices.
Table 2-5. MCLK Selection (JP3)
2-8
Jumper Location
MCLK Source
1 and 2
Audio oscillator (12.288 MHz) (default)
2 and 3
Derived clock from S/PDIF stream
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
FLAG0 Enable Jumper (JP1 and JP4)
In standard configuration, FLAG0 connects only to the SW1 user input
switch. FLAG0 can be connected to the AD1836 audio codec by inserting
JP4. FLAG0 can be connected to the CS8416 S/PDIF receiver by inserting
JP1. See “AD1836 Control Selection Jumper (JP23)” on page 2-11 for
more information.
FLAG1 Enable Jumper (JP5)
In standard configuration, FLAG1 connects to the AD1852 device and acts
as a select for the SPI port. The JP5 jumper must be removed to use the
push button switch or the signal on the expansion connector (P10). Once
the jumper is removed, the SPI can no longer communicate with the
AD1852 device.
Sample Frequency Jumper (JP6)
The JP6 jumper selects the sample frequency for the AD1852 device.
Table 2-6 shows the valid frequency modes.
Table 2-6. Sample Frequencies
Jumper Location
Sample Frequency
None installed
Not allowed
3 and 4
192 kHz (2x interpolator)
1 and 2
96 kHz (4x interpolator)
1 and 2, 3 and 4
48 kHz (8x interpolator) (default)
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-9
Switch and Jumper Settings
ADC2 Input Mode Selection Jumpers (JP7 and JP8)
The JP7 and JP8 jumpers control the input mode to ADC2 of the AD1836
device (see Table 2-7). In high-performance mode, the signal is routed
straight to the ADC. In PGA mode, the signal goes through a multiplexer
and a programmable gain amplifier inside of the codec.
Table 2-7. ADC2 Input Mode
Jumper Location
Input Mode
3 and 5, 4 and 6
PGA
1 and 3, 2 and 4
High performance (default)
MIC Gain Selection Jumpers (JP9 and JP10)
The JP9 and JP10 jumpers select the pre-amp gain for the microphone circuit (see Table 2-8). The gain for the left and right channel must be
configured identically.
Table 2-8. MIC Pre Amp Gain
Jumper Position
Gain
Not installed
0 dB (default)
1 and 2
20 dB
2 and 3
40 dB
ADC2 Input Selection Jumper (JP11)
The JP11 jumper selects the input source for ADC2. If the input source for
ADC2 is LINE-IN, then the RCA connector J2 must be used. If the input
source for ADC2 is a microphone, then the mini stereo plug J3 must be
used. If a microphone is used, the gain of the circuit can be increased as
described in “MIC Gain Selection Jumpers (JP9 and JP10)” on page 2-10.
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ADSP-21161N EZ-KIT Lite Hardware Reference
When the JP11 jumpers are between pins 1 and 3 and between pins 2
and 4, the connection is to J3. When the jumpers are between pins 3
and 5 and between pins 4 and 6, the connection is to J2. The jumper settings are illustrated in Table 2-9). (The words MIC and LINE are on the
board as a reference.)
Table 2-9. Audio Input Jumper Settings
Microphone Input
Stereo LINE_IN (Default)
MIC
1 2
MIC
1 2
JP11
JP11
LINE
LINE
AD1836 Control Selection Jumper (JP23)
The AD1836 control registers are programmed through an SPI port. The
SPI port can be configured to connect to the processor’s SPI port or
SPORT1. When the jumper is installed at JP23, the SPI port of the AD1836
device connects to SPORT1 of the processor. When the jumper is removed,
the SPI port of AD1836 device connects to the SPI port of the processor.
The jumper is installed by default.
SW1 Enable Jumper (JP26)
The SW1 push button is attached though a driver to FLAG0 of the processor.
To disconnect the driver from FLAG0 (for example, to use FLAG0 as an output), remove JP26.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-11
Processor ID Settings
SW2 Enable Jumper (JP27)
The SW2 push button is attached though a driver to FLAG1 of the processor.
To disconnect the driver from FLAG1 (for example, to use FLAG1 as an output), remove JP27.
Processor ID Settings
Resistors R155—157 and R144—146 set a different ID for the processor. During typical operation of the EZ-KIT Lite, there is only a single processor
in the system; the resistors must be set to the single processor setting.
When a second processor is attached to the board through the link port,
the resistors must be changed to configure one board for processor 1 and
the other board for processor 2. System configuration options are shown
in Table 2-10.
Table 2-10. Processor ID Modes
Resistors Installed
Resistors Uninstalled
Description
R144, R145, R146
R155, R156, R157
Single processor (default)
R144, R145, R157
R146, R155, R156
Processor 1
R144, R146, R156
R145, R155, R157
Processor 2
Other
Invalid
2-12
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 2-3 shows the locations of the LEDs and push buttons.
Figure 2-3. LED and Push Button Locations
Reset LED (LED1)
When LED1 is lit, the master reset of all the major ICs is active.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-13
LEDs and Push Buttons
FLAG LEDs (LED2–7)
The flag LEDs connect to the processor’s flag pins FLAG4–9. The LEDs are
active high and are lit by an output of “1” from the processor. Refer to
“LEDs and Push Buttons” on page 2-13 for more information on how to
use the programmable flags to program the processor. Table 2-11 shows
the flag signals and corresponding LEDs.
Table 2-11. FLAG LEDs
Flag Pin
LED Reference Designator
FLAG4
LED7
FLAG5
LED6
FLAG6
LED5
FLAG7
LED4
FLAG8
LED3
FLAG9
LED2
VERF LED (LED12)
The VERF LED indicates that there is a possible error in the audio stream
of the CS8416 digital receiver. The error can occur when digital audio
cables disconnect from the optical or coaxial SPDIF connectors.
Power LED (LED11)
When LED11 is lit (green), it indicates that power is being properly supplied to the board.
2-14
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
USB Monitor LED (ZLED3)
The USB monitor LED (ZLED3) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into
the board, it takes approximately 15 seconds for the USB monitor LED to
light. If the LED does not light, try cycling power on the board and/or
reinstalling the USB driver (see the VisualDSP++ Installation Quick Reference Card).
VisualDSP++ is actively communicating with the EZ-KIT
L When
Lite target board, the LED can flicker, indicating communications
handshake.
Programmable Flag Push Buttons (SW1–4)
Four push buttons (SW1—4) are provided for general-purpose user input.
The push buttons connect to the processor’s FLAG pins. The push buttons
are active high and, when pressed, send a high (1) to the processor. Refer
to “Flag Pins” on page 1-9 for more information. The push button reference designators and corresponding flags are summarized in Table 2-12.
Table 2-12. Flag Switches
Flag Pin
Push Button Reference
Designator
FLag Pin
Push Button Reference
Designator
FLAG0
SW1
FLAG2
SW3
FLAG1
SW2
FLAG3
SW4
Interrupt Push Buttons (SW5–7)
Three push buttons (SW5—7) are provided for general-purpose user interrupts. The push buttons connect to the processor’s programmable flag
pins. The push buttons are active high and, when pressed, send a high (1)
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-15
LEDs and Push Buttons
to the processor. Refer to “Flag Pins” on page 1-9 for more information.
The push button reference designators and corresponding interrupt signals are summarized in Table 2-13.
Table 2-13. Interrupt Switches
Interrupt Signal
Push Button Reference Designator
IRQ0
SW5
IRQ1
SW6
IRQ2
SW7
Board Reset Push Button (SW12)
The RESET push button (SW12) resets all of the ICs on the board. The only
exception is the USB interface chips. These chips are not being reset when
the push button is pressed after the USB cable has been plugged in and
communication correctly initialized with the PC. After USB communication has been initialized, the only way to reset the USB is by powering
down the board.
the
push button (
) while VisualDSP++ is run[ Pressing
ning disrupts communication and causes errors in the current
RESET
SW12
debug session. VisualDSP++ must be closed and re-opened.
2-16
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
Connectors
This section describes the connector functionality and provides information about mating connectors. Figure 2-4 shows the connector locations.
Figure 2-4. Connector Locations
USB Connector (ZJ1)
The USB connector (ZJ1) is a standard Type B USB receptacle.
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-17
Connectors
Part Description
Manufacturer
Part Number
Type B USB receptacle
MILL-MAX
897-43-004-90-000000
DIGI-KEY
ED900064-ND
Mating Connector (provided with the EZ-KIT Lite)
USB cable
ASSMANN
AK672-5
DIGI-KEY
AK672-5ND
Audio Connectors (J2–6, P4)
There are two 3.5 mm stereo audio jacks, 13 RCA jacks, and one optical
connector.
Part Description
Manufacturer
Part Number
3.5 mm stereo jack (J3 and J4)
A/D ELECTRONICS
ST-323-5
RCA jacks (J2)
SWITCHCRAFT
PJRAS2X2S01X
RCA jacks (J5)
SWITCHCRAFT
PJRAS4X2U01X
Coaxial (J6)
SWITCHCRAFT
PJRAN1X1U01X
TORX (P4)
TOSHIBA
TORX173F
Mating Connectors
3.5 mm stereo plug to 3.5mm
stereo cable (J3 and J4)
RADIO SHACK
L12-2397A
2- channel RCA interconnect
cable (J2 and J5)
MONSTER CABLE
BI100-1M
Digital coaxial cable (J6)
MONSTER CABLE
IDL100-1M
Digital fiber-optic cable (P4)
MONSTER CABLE
ILS100-1M
External Port Connector (P9)
A 40-pin 0.05’ spacing connector provides access to some of the processor’s external port signals. By default, P9 is not populated.
2-18
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
Part Description
Manufacturer
Part Number
40-pin 0.05’ (male)
FCI
68737-440HLF
Mating Connector
Female-to-female cable
SAMTEC
FFSD-20-D-5.000-01-N
Host Processor Interface Connector (P10)
A 20-pin 0.05’ spacing connector provides access to some of the processor’s external port signals. By default, P10 is not populated.
Part Description
Manufacturer
Part Number
20-pin 0.05’ (male)
FCI
68737-420HLF
Mating Connector
Female-to-female cable
SAMTEC
FFSD-10-D-5.000-01-N
Voltage Connector (P11)
The voltage connector (P11) allows you to measure the 1.8V, 3.3V, and
5.0V rails. There are two pins associated with each voltage and the even
numbered pins are ground. By default, P11 is not populated.
SPORT1 and SPORT3 Connector (P12)
SPORT1
and SPORT3 connect to a 20-pin connector P12.
Part Description
Manufacturer
Part Number
20-position AMPMODU system
50 receptacle
TYCO
5-104069-1
Mating Connectors
20-position AMPMODU system
20 connector
AMP
2-487937-0
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-19
Connectors
Part Description
Manufacturer
Part Number
20-position AMPMODU system
20 connector (w/o lock)
AMP
2-487938-0
Flexible film contacts
(20 per connector)
AMP
487547-1
Link Port Connectors (P13 and P14)
Each link port connects to a 26-pin connector. Refer to EE-106 found on
the ADI Web site at http://www.analog.com for more information about
the link port connectors.
Part Description
Manufacturer
Part Number
26-position connector
HONDA
RMCA-EA26LMY-0M03-A+
Mating Connectors
Cable connector
HONDA
RMCA-E26F1S-A
Shroud
HONDA
RMCA-E26L1A
Coaxial cable
GORE
DXN2132
Power Input Connector (P16)
The power input connector (P16) provides all of the power necessary to
operate the EZ-KIT Lite board.
Part Description
Manufacturer
Part Number
2.5 mm power jack (P16)
SWITCHCRAFT
RAPC712X
DIGI-KEY
RAPC712X-ND
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supply
2-20
CUI STACK
DTS070175SUDC-P6-SZ
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Hardware Reference
SPI Connector (P18)
The 5-pin header is the connecting point for an external SPI device. By
default, P18 is not populated.
Part Description
Manufacturer
Part Number
IDC 5X1 IDC5X1
SAMTEC
TSW-105-26-T-S
JTAG Connector (ZP4)
The JTAG header (ZP4) is the connecting point for a JTAG in-circuit
emulator pod. When an emulator connects to the JTAG header, the USB
debug interface is disabled.
Pin 3 is missing to provide keying. Pin 3 in the mating connector should
have a plug.
using an emulator with the EZ-KIT Lite board, follow the
L When
connection instructions provided with the emulator.
Part Description
Manufacturer
Part Number
14-pin IDC header (ZP4)
FCI
68737-414HLF
ADSP-21161N EZ-KIT Lite Evaluation System Manual
2-21
Specifications
Specifications
This section provides the requirements for powering the board.
Power Supply
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-14 shows the power supply specifications.
Table 2-14. Power Supply Specifications
Terminal
Connection
Center pin
+7V@2 amps
Outer ring
GND
Board Current Measurements
The ADSP-21161N EZ-KIT Lite board provides two zero-ohm resistors
that can be removed to measure current draw. Table 2-15 shows the resistor number, the voltage plane, and a short description of the plane
components.
Table 2-15. Current Measurement Resistors
Resistor
Voltage Plane
Description
R168
VDDINT
Core voltage of the processor
R169
VDDEXT
IO (external) voltage of the processor
2-22
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A ADSP-21161N EZ-KIT LITE
BILL OF MATERIALS
The bill of materials corresponds to “ADSP-21161N EZ-KIT Lite Schematic” on page B-1. Please check the latest schematic on the Analog
Devices Web site:
http://www.analog.com/processors/sharc/technicalLibrary/manuals/index.html#Evaluation%20Kit%20Manuals.
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
1
3
74LVC14A
SOIC14
U21-22,U35
TI
74LVC14AD
2
1
MMBT4124
SOT-23
Q2
FAIRCHILD
MMBT4124
3
1
74LVC00AD
SOIC14
U32
PHILIPS
74LVC00AD
4
1
12.288MHZ
OSC001
U25
DIGI-KEY
SGR-8002DC-PCC-ND
12.288M
5
1
25MHZ
OSC001
U24
DIGI-KEY
SGR-8002DC-PCC-ND
6
1
CS8416-CS
SOIC28
U7
CIRRUS LOGIC
CS8416-CSZ
7
10
LMV722M
SOIC8
U12-20,U28
NATIONAL
SEMI
LMV722MNOPB
8
3
MT48LC8M16A
2P-6A TSOP54
U2-4
MICRON
MT48LC8M16A2P-6A
9
1
74FCT244AT
QSOP20
U23
IDT
IDT74FCT244CTQG
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-1
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
10
1
FDC658P
SOT23-6
U6
FAIRCHILD
FDC658P
11
1
21161
M29W040 “U5”
U5
ST MICRO
M29W040B120K6E
12
1
ADM708SARZ
SOIC8
U26
ANALOG
DEVICES
ADM708SARZ
13
1
AD1852JRSZ
SSOP28
U11
ANALOG
DEVICES
AD1852JRSZ
14
1
ADP3339AKCZ5 SOT-223
VR1
ANALOG
DEVICES
ADP3339AKCZ-5-R7
15
1
ADP3338AKCZ18 SOT-223
VR3
ANALOG
DEVICES
ADP3338AKCZ-1.8-R7
16
1
AD8532ARZ
SOIC8
U29
ANALOG
DEVICES
AD8532ARZ
17
1
ADSP-21161NK
CAZ PBGA225
U1
ANALOG
DEVICES
ADSP-21161NKCAZ100
18
1
AD1836AASZ
MQFP52
U10
ANALOG
DEVICES
AD1836AASZ
19
1
ADG774ABRQZ
QSOP16
U31
ANALOG
DEVICES
ADG774ABRQZ
20
1
ADP1864
SOT23-6
VR6
ANALOG
DEVICES
ADP1864AUJZ-R7
21
5
RUBBER FOOT
M1-5
MOUSER
517-SJ-5018BK
22
1
PWR
2.5MM_JACK
CON005
P16
SWITCHCRAFT
RAPC712X
23
1
TORX173 6PIN
CON008
P4
TOSHIBA
TORX173(F)
24
1
RCA 4X2
CON011
J5
SWITCHCRAFT
PJRAS4X2U01X
A-2
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
25
1
RCA 1X1
CON012
J6
SWITCHCRAFT
PJRAN1X1U01X
26
1
RCA 2X2
CON013
J2
SWITCHCRAFT
PJRAS2X2S01X
27
2
LNKPRT 12X2
CON010
P13-14
HONDA(TSUS
HINK)
RMCA-EA26LMY-0M03-A+
28
1
.05 10X2
CON014
P12
TYCO
5-104069-1
29
8
MOMENTARY
SWT013
SW1-8
PANASONIC
EVQ-PAD04M
30
1
DIP8 SWT016
SW9
C&K
TDA08H0SB1
31
2
DIP4 SWT018
SW10-11
ITT
TDA04HOSB1
32
8
IDC 2X1
IDC2X1
JP1,JP4-5,JP2223,JP26-27,P17
FCI
90726-402HLF
33
4
IDC 3X1
IDC3X1
JP3,JP9-10,P2
FCI
90726-403HLF
34
1
IDC 7X2
IDC7X2
ZP4
FCI
68737-414HLF
35
1
2.5A
RESETABLE
FUS001
F1
RAYCHEM
SMD250F-2
36
19
IDC
2PIN_JUMPER_
SHORT
SJ1-18,SJ32
DIGI-KEY
S9001-ND
37
1
IDC 2X2
IDC2X2
JP6
FCI
68737-404HLF
38
2
3.5MM
STEREO_JACK
CON001
J3-4
A/D ELECTRONICS
ST-323-5
39
3
IDC 3X2
IDC3X2
JP7-8,JP11
SULLINS
GEC03DAAN
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-3
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
40
1
IDC 4X1
IDC4X1
P3
BERG-FCI
54101-T08-04LF
41
1
10 1/8W 5%
1206
R2
KOA
P10ECTRk7372BTTDD100
42
6
0 1/4W 5% 1206
R153-154,R168169,R217-218
KOA
0.0ECTRk7372BTTED
43
7
YELLOW
LED001
LED2-7,LED12
PANASONIC
LN1461C
44
8
330PF 50V 5%
0805
C36,C42,C48,
C54,C60,C66,
C72,C78
AVX
08055A331JAT
45
64
0.01UF 100V
10% 0805
C2,C4,C89,
C91-136,C138,
C149,C165-171,
C174,C184,
C193,C200-201,
C204
AVX
08051C103KAT2A
46
11
0.22UF 25V 10%
0805
C156-164,C172,
C183
AVX
08053C224FAT
47
17
0.1UF 50V 10%
0805
AVX
C1,C7,C9-11,
C33,C87-88,
C90,C137,C139,
C150-151,C173,
C182,C191-192
08055C104KAT
48
10
1000PF 50V 5%
0805
C3,C14-15,C1920,C24-25,C2930,C181
AVX
08055A102JAT2A
49
4
10UF 16V
10% C
CT19-20,CT22,
CT36
AVX
TAJC106K016R
A-4
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
50
32
10K 1/10W 5%
0805
R3,R5,R7,R13,
R18-20,R124,
R126,R128,
R130,R132,
R134,R136,
R144-146,R148149,R151,R158164,R172,R175,
R190,R219-220
VISHAY
CRCW080510K0JNEA
51
4
33 1/10W 5%
0805
R1,R8,R150,
R152
VISHAY
CRCW080533R0JNEA
52
8
680 1/10W 5%
0805
R137-143,R147
VISHAY
CRCW0805680RJNEA
53
2
2.0K 1/8W 1%
1206
R49-50
VISHAY
CRCW12062K00FKEA
54
10
49.9K 1/8W 1%
1206
R66,R74,R82,
R90,R98,R106,
R114,R122,
R192,R206
VISHAY
CRCW120649K9FKEA
55
24
100PF 100V 5%
1206
C12,C16-17,
C21-22,C26-27,
C31,C35,C38,
C41,C44,C47,
C50,C53,C56,
C59,C62,C65,
C68,C71,C74,
C77,C80
AVX
12061A101JAT2A
56
5
10UF 16V
10% B
CT1-4,CT11
AVX
TAJB106K016R
57
7
100 1/10W 5%
0805
R123,R125,
R127,R129,
R131,R133,
R135
VISHAY
CRCW0805100RJNEA
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-5
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
58
8
220PF 50V 10%
1206
C39,C45,C51,
C57,C63,C69,
C75,C81
AVX
12061A221JAT2A
59
2
2A S2A
DO-214AA
D1-2
MICRO COMM
S2A-TP
60
12
600 100MHZ
500MA 1206
FER1-11,FER14
STEWARD
HZ1206B601R-10
61
8
237.0 1/8W 1%
1206
R23,R27,R30,
R34,R40-41,
R47-48
VISHAY
CRCW1206237RFKEA
62
4
750.0K 1/8W
1% 1206
R25,R32,R38,
R45
VISHAY
CRCW1206750KFKEA
63
16
5.76K 1/8W 1%
1206
R21-22,R24,
R26,R28-29,
R31,R33,
R35-37,R39,
R42-44,R46
VISHAY
CRCW12065K76FKEA
64
1
3.01K 1/8W 1%
1206
R9
KOA
RK73H2BTTD3011F
65
8
11.0K 1/8W 1%
1206
R59,R67,R75,
R83,R91,R99,
R107,R115
VISHAY
CRCW120611K0FKEA
66
8
120PF 50V 5%
1206
C13,C18,C23,
C28,C187-190
AVX
12065A121JAT2A
67
1
75 1/8W 5%
1206
R10
VISHAY
CRCW120675R0JNEA
68
2
820PF 100V
10% 1206
C32,C34
AVX
12061A821KAT2A
69
1
47.0K 1/10W
1% 0805
R6
VISHAY
CRCW080547K0FKEA
70
8
680PF 50V 1%
0805
C37,C43,C49,
C55,C61,C67,
C73,C79
AVX
08055A681FAT2A
A-6
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
71
1
10UF 25V
+80-20% 1210
C8
PANASONIC
ECJ4YF1E106Z
72
8
2.74K 1/8W 1%
1206
R63,R71,R79,
R87,R95,R103,
R111,R119
VISHAY
CRCW12062K74FKEA
73
16
5.49K 1/8W 1%
1206
R60-61,R68-69,
R76-77,R84-85,
R92-93,
R100-101,R108109,R116-117
VISHAY
CRCW12065K49FKEA
74
8
3.32K 1/8W 1%
1206
R62,R70,R78,
R86,R94,R102,
R110,R118
VISHAY
CRCW12063K32FKEA
75
2
100.0 1/8W 1%
1206
R54,R57
PANASONIC
ERJ-8ENF1000V
76
8
1.65K 1/8W 1%
1206
R64,R72,R80,
R88,R96,R104,
R112,R120
VISHAY
CRCW12061K65FKEA
77
6
10UF 16V 20%
CAP002
CT5-10
PANASONIC
EEE1CA100SR
78
10
68UF 25V 20%
CAP003
CT26-35
PANASONIC
EEE-FC1E680P
79
1
2A SL22
DO-214AA
D3
DIGI-KEY
SL22-E3/1GI-ND
80
1
270 1/10W 5%
0805
R12
VISHAY
CRCW0805270RJNEA
81
4
0 1/10W 5%
0805
R4,R11,R15,
R174
VISHAY
CRCW08050000Z0EA
82
1
190 100MHZ 5A
FER002
FER13
MURATA
DLW5BSN191SQ2
83
2
1.0K 1/8W 1%
1206
R53,R56
KOA
RK73H2BTTDD1001F
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-7
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
84
1
0.022UF 50V 5%
0805
C5
AVX
08055C223JAT2A
85
1
68PF 50V 5%
0603
C196
AVX
06035A680JAT2A
86
1
470PF 50V 5%
0603
C195
AVX
06033A471JAT2A
87
2
0 1/10W 5%
0603
R14,R17
PHYCOMP
232270296001L
88
1
24.9K 1/10W
1% 0603
R16
DIGI-KEY
311-24.9KHTR-ND
89
1
47UF 6.3V
10% B
CT37
NIC COMPONENTS
NTC-T476K6.3TRBF
90
1
0.05 1/2W 1%
1206
R165
SUSUMA
RL16326-R050-F-N
91
1
10UF 16V 10%
1210
C197
AVX
1210YD106KAT2A
92
4
10.0K 1/8W 1%
1206
R51-52,R55,R58
DALE
CRCW120610K0FKEA
93
1
GREEN LED001
LED11
PANASONIC
LN1361CTR
94
1
RED LED001
LED1
PANASONIC
LN1261CTR
95
2
1000PF 50V 5%
1206
C85-86
AVX
12065A102JAT2A
96
8
2200PF 50V 5%
1206
C40,C46,C52,
C58,C64,C70,
C76,C82
AVX
12065A222JAT050
97
1
100K 1/8W 5%
1206
R167
VISHAY
CRCW1206100KFKEA
98
8
604.0 1/8W 1%
1206
R65,R73,R81,
R89,R97,R105,
R113,R121
PANASONIC
ERJ-8ENF6040V
99
7
1UF 20V 20% A
CT12-18
AVX
TAJA105K020R
A-8
ADSP-21161N EZ-KIT Lite Evaluation System Manual
ADSP-21161N EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
100
3
4.7UF 25V
10% C
CT23-25
AVX
TAJC475K025R
101
2
20.0K 1/8W 1%
1206
R170,R173
VISHAY
CRCW120620K0FKEA
102
1
255.0K 1/10W
1% 0603
R171
VISHAY
CRCW06032553FK
103
1
80.6K 1/10W
1% 0603
R166
DIGI-KEY
311-80.6KHRCT-ND
104
1
6.8UH 25%
IND009
L1
DIGI-KEY
308-1328-1-ND
105
1
4A SSB43L
DO-214AA
D5
VISHAY
SSB43L
106
2
10K 100MW 2%
RNET16
RN1-2
CTS
767161103GP
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A-9
A-10
ADSP-21161N EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-21161 EZ-KIT LITE
Schematic
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
TITLE
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:31
D
1
of
16
A
B
C
D
3.3V
U1
A[0:21]
A0
A1
A2
A3
A4
A5
A6
A7
1
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
M05
L14
DATA16
M13
DATA17
L15
DATA18
DATA19
K13
D20
K14
D21
DATA21
K12
DATA22
DATA23
K15
MS3
CAS
CAS
M11
RAS
RAS
L0D4
A09
J14
D25
J12
D26
J15
D27
H13
D28
DATA24
DATA25
L0DAT5
C10
L0DAT6
SDCLK0
SDWE
SDA10
R08
RD
M09
WR
M12
ACK
N09
BRST
E02
RESET
WR
ACK
BRST
RESET
DSP_AVDD
DATA28
IRQ0
L1CLK
H14
D30
L1D[0:7]
H15
D31
DATA30
DATA31
G15
D32
G14
D33
DATA32
DATA33
G12
DATA34
G13
DATA35
F15
DATA36
D38
E13
DATA39
B14
L1D1
C13
L1D2
A14
L1D3
C12
L1D4
B12
L1D5
D12
L1D6
A12
L1D7
C11
FLAG0
H01
L1DAT0
FLAG[0:9]
E15
D41
D13
D42
E14
D43
D15
FLAG0
G01
FLAG1
G02
FLAG2
G04
FLAG3
G03
FLAG4
F01
FLAG5
F04
FLAG6
F02
FLAG7
E03
FLAG8
F03
FLAG9
E01
FLAG10
D03
FLAG11
D44
FLAG6
C14
D45
D14
D46
FLAG7
DATA46
FLAG8
C15
DATA47
D47
FLAG9
CS8416_GPO0
D02
TCK
B02
TDI
R10
BR3
ID2
DSP ID
BR2
9
R9
BR1
R144
10K
0805
MOSI
SPICLK
IRQ0
C01
H04
IRQ2
R10
HBR
P11
REDY
N11
CS
J04
ID0
R1
33
0805
ID0
J02
ID1
ID1
TP3
ID2
IDC1X1
DNP
P07
COM
2
14
13
R13
12
R12
11
R11
10
R10
R9
9
CLKDBL
CLK_CFG1
OFF
ON
OFF
ON
*
OFF
OFF
ON
ON
ON
ON
ON
OFF
* DEFAULT
DMAG1
DMAG2
SBTS
HBG
CLK_CFG0
ON
OFF
ON
ON
OFF
ON
Core Clock Ratio
2:1
3:1
4:1
4:1
6:1
8:1
10K
RNET16
3.3V
BR6
BR6
CLKOUT
M15
DMAG1
N15
DMAR1
PA
SBTS
R06
PA
R158
10K
0805
EBOOT
R159
10K
0805
R160
10K
0805
LBOOT
BMS
SW11
1
EBOOT
7
3
6
4
5
3
BMS
4
BOOT MODES
EBOOT LBOOT
* OFF
ON
ON
ON
ON
OFF
ON
OFF
ON
ON
OFF
OFF
* DEFAULT
C93
0.01UF
0805
C94
0.01UF
0805
C95
0.01UF
0805
C96
0.01UF
0805
C97
0.01UF
0805
C98
0.01UF
0805
C99
0.01UF
0805
C100
0.01UF
0805
C108
0.01UF
0805
BMS
OFF Output
OFF (Input)
ON (Input)
OFF (Input)
ON (Input)
ON (Input)
8
2
2
LBOOT
ADSP-21161N-100
ADSP-21161NKCAZ
PBGA225
ON
DMAR2
P06
A05
EBOOT
A06
LBOOT
A03
BMS
M14
DMAG2
P15
DMAR2
BMSTR
C92
0.01UF
0805
EP Clock Ratio
1X
1X
1X
2X
2X
2X
MS0
VDDEXT
C107
0.01UF
0805
5
DIP4
SWT018
R14
VDDINT
C106
0.01UF
0805
4
CLOCK MODES
15
R15
AGND
C105
0.01UF
0805
6
BR5
M07
CLKDBL
BRST
7
3
R09
DMAG2
C91
0.01UF
0805
R146
10K
0805
8
2
16
BR4
N07
BR5
R12
TIMEXP
A02
REDY
BR3
BR4
CLK_CFG1
DMAR1
TIMEXP
HBR
1
R1
2
R2
3
R3
4
R4
5
R5
6
R6
7
R7
8
R8
BR2
R07
N12
DMAG1
B03
DMAR2
BR1
BR3
SBTS
J03
ID2
HBR
CS
N08
CLK_CFG0
CLKDBL
DMAR1
REDY
BR2
N13
CLK_CFG0
EMU
HBG
CS
XTAL
TRST
C02
EMU
RD
WR
R13
XTAL
CLK_CFG1
RN1
IRQ2
R11
SW10
1
CLK_CFG0
IRQ1
J01
CLKIN
TMS
B01
R145
10K
0805
R163
10K
0805
CLKDBL
IRQ0
IRQ1
HBG
R162
10K
0805
SPIDS
3.3V
P12
CLKIN
R161
10K
0805
MISO
P08
TDO
TMS
1
SD3B
BR1
D01
RPBA
10
ID1
SD3A
H02
TDI
TDO
TRST
R11
BR5
SFS3
D04
MISO
B04
MOSI
A04
SPIDS
C04
SPICLK
L1DAT7
FLAG5
DATA44
11
ID0
L1DAT6
FLAG4
DATA43
R12
IRQ1
SCLK3
C09
SFS3
B08
SD3A
A08
SD3B
L1DAT5
FLAG3
DATA42
12
3.3V
L1DAT4
FLAG2
DATA41
13
R13
SD2A
SCLK3
L1DAT3
FLAG1
D40
R157
10K
0805
DNP
14
10K
RNET16
D09
L1DAT2
D39
F13
R156
10K
0805
DNP
R14
L1DAT1
D36
F14
DATA38
L1CLK
L1D0
D35
D37
C08
SFS2
C07
SD2A
B07
SD2B
L1ACK
A13
D34
F12
DATA37
15
R15
1
3
BR4
B13
L1ACK
D29
H12
DATA29
BMSTR
MS3
SD1B
R155
10K
0805
DNP
16
COM
SCLK2
K01
N14
AVDD
P14
AGND
ADSP-21161NKCAZ
ADSP-21161N-100
PBGA225
SD1A
L0DAT7
CLK_CFG1
RD
MS2
A07
DATA27
TCK
N10
SDCKE
P10
SDCLK0
P09
SDCLK1
R14
SDWE
M10
SDA10
SPIDS
SFS1
B09
DQM
SDCKE
SCLK1
D07
SFS1
C06
SD1A
D06
SD1B
D10
L0D7
DATA26
SCLK1
L0DAT4
L0D6
BR6
B06
L0DAT3
P13
DQM
R174
0
0805
D11
MS1
L0DAT2
D23
D24
DATA45
L12
L0D3
IRQ2
4
2
A11
1
R1
2
R2
3
R3
4
R4
5
R5
6
R6
7
R7
8
R8
3
MS2
L0D2
L0DAT1
RN2
SD0A
2
MS1
B11
SFS0
1
N06
MS0
M06
MS1
P05
MS2
R05
MS3
L0DAT0
L0D1
SCLK0
B05
SFS0
E04
SD0A
C05
SD0B
E12
D22
J13
SCLK0
L0CLK
L0D0
L0D5
DATA40
MS0
L0ACK
L0D[0:7]
D19
D05
B10
L0CLK
D18
3.3V
A10
L0ACK
D17
L13
DATA20
U1
D[16:47]
D16
ON
ADDR0
N05
ADDR1
L04
ADDR2
R04
ADDR3
P04
ADDR4
N04
ADDR5
M04
ADDR6
R03
ADDR7
P03
ADDR8
P02
ADDR9
N03
ADDR10
R02
ADDR11
M02
ADDR12
P01
ADDR13
N01
ADDR14
N02
ADDR15
M01
ADDR16
L02
ADDR17
M03
ADDR18
L01
ADDR19
K03
ADDR20
L03
ADDR21
K02
ADDR22
K04
ADDR23
3
DIP4
SWT018
Booting Mode
EPROM
Host Processor
Serial Boot via SPI
Link Port
No Booting
Reserved
REMOVE JP22 WHEN USING SPI OR NO BOOT MODES (REFER TO SHEET 4)
VDDEXT
R2
10
1206
VDDINT
DSP_AVDD
VDDINT
4
C101
0.01UF
0805
C102
0.01UF
0805
C103
0.01UF
0805
C104
0.01UF
0805
C1
0.1UF
0805
C109
0.01UF
0805
C2
0.01UF
0805
C110
0.01UF
0805
C111
0.01UF
0805
C112
0.01UF
0805
C113
0.01UF
0805
C114
0.01UF
0805
C115
0.01UF
0805
C116
0.01UF
0805
ANALOG
DEVICES
C117
0.01UF
0805
DSP (U1)
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
DSP
Title
AGND
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:31
D
2
of
16
A
B
C
D
A[0:14]
SDRAM
128Mb (2M X 16 x 4 Banks)
D[16:47]
U2
23
A1
24
A2
25
A3
26
A4
29
A5
30
A6
31
A7
32
A8
33
A9
34
1
A0
22
SDA10
A11
35
A13
20
A14
21
U3
A0
2
D16
A0
4
D17
A1
5
D18
A2
7
D19
A3
8
D20
A4
10
D21
A5
11
D22
A6
13
D23
A7
42
D24
A8
44
D25
A9
45
D26
47
D27
48
D28
50
D29
A13
51
D30
A14
53
D31
DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
DQ12
BA0
DQ13
BA1
DQ14
DQ15
19
MS0
37
SDCKE
38
SDCLK0
16
SDWE
17
CAS
18
RAS
SDA10
A11
CS
SDCKE
CLK
SDCLK0
WE
CAS
RAS
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
42
DQ8
44
DQ9
45
DQ10
47
DQ11
48
DQ12
50
DQ13
51
DQ14
53
DQ15
20
BA0
21
BA1
D32
A0
23
D33
A1
24
D34
A2
25
D35
A3
26
D36
A4
29
D37
A5
30
D38
A6
31
D39
A7
32
D40
A8
33
D41
A9
34
D42
A11
35
D45
A13
20
D46
A14
21
RAS
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
42
DQ8
44
DQ9
45
DQ10
47
DQ11
48
DQ12
50
DQ13
51
DQ14
53
DQ15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
22
SDA10
D43
A10
A11
D44
BA0
BA1
D47
3.3V
19
L0D4
L0D5
L0D6
L0D7
L1D0
L1D[0:7]
L1D1
L1D2
L1D3
L1D4
L1D5
L1D6
L1D7
CAS
18
RAS
1
L0D3
WE
17
CAS
L0D2
CLK
16
SDWE
R3
10K
0805
L0D[0:7]
L0D1
CKE
38
SDCLK0
L0D0
CS
37
SDCKE
16
WE
17
CAS
18
RAS
SDWE
CAS
23
A0
24
A1
25
A2
26
A3
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
22
A10
35
A11
19
CS
37
CKE
38
CLK
MS0
CKE
U4
RAS
P17
2
2
1
15
DQM
39
DQML
15
DQML
39
DQMH
DQM
DQMH
3.3V
2
MS0
39
40
1
14
27
3
9
43
49
NC2
VDD1
VSS1
VDD2
VSS2
VDD3
28
54
VSS3
6
VDDQ1
VSSQ1
VDDQ2
VSSQ2
46
VSSQ5
VDDQ5
VSSQ6
INSTALL JUMPER TO USE X48 MEMORY
REMOVE JUMPER TO USE LINK PORTS
28
52
MT48LC8M16A2P-6A
TSOP54
NC1
40
NC2
1
VSS1
VDD1
VSS1
VDD2
VSS2
VDD3
VSS3
SJ1
41
SHORTING
JUMPER
DEFAULT=INSTALLED
VSS2
54
VSS3
3
VDDQ1
9
VDDQ2
43
VDDQ3
49
VDDQ5
12
VDDQ3
36
1
VDD1
14
VDD2
27
VDD3
41
DQMH
3.3V
36
NC1
40
NC2
NC1
DQML
IDC2X1
3.3V
36
15
DQM
14
27
6
VSSQ1
12
VSSQ2
46
VSSQ5
52
VSSQ6
3
9
VDDQ2
49
MT48LC8M16A2P-6A
TSOP54
41
54
6
VSSQ1
12
VSSQ2
46
VSSQ5
52
VSSQ6
VDDQ1
43
28
VDDQ3
VDDQ5
MT48LC8M16A2P-6A
TSOP54
3.3V
3.3V
FLASH 512K X 8
3
3
U5
A[0:18]
A0
12
A1
11
A2
10
A3
9
A4
8
A5
7
A6
6
3.3V
R175
10K
0805
BMS
JP22
1
SJ32
SHORTING
JUMPER
DEFAULT=INSTALLED
2
A7
5
A8
27
A9
26
A10
23
A11
25
A12
4
A13
28
A14
29
A15
3
A16
2
A17
30
A18
1
IDC2X1
12
U32
U35
11
MS1
4
13
12
13
74LVC00AD
SOIC14
74LVC14A
SOIC14
22
RD
WR
INSTALL JUMPER TO READ/WRITE OR BOOT FROM FLASH
REMOVE JUMPER WHEN USING SPI OR NO BOOT MODE
24
31
D20
19
D21
20
D22
21
D23
D4
18
A4
D19
D3
17
A3
D18
D2
15
A2
D17
D1
14
A1
D16
D0
13
A0
A5
D5
A6
D6
A7
D7
D[16:23]
C118
0.01UF
0805
C119
0.01UF
0805
C120
0.01UF
0805
C121
0.01UF
0805
C122
0.01UF
0805
C123
0.01UF
0805
C200
0.01UF
0805
C124
0.01UF
0805
C125
0.01UF
0805
C126
0.01UF
0805
C128
0.01UF
0805
C129
0.01UF
0805
C204
0.01UF
0805
SDRAM (U2, U3, U4)
A8
A9
3.3V
3.3V
A10
A11
A12
A13
A14
A15
A16
C174
0.01UF
0805
C136
0.01UF
0805
C171
0.01UF
0805
C130
0.01UF
0805
C131
0.01UF
0805
C132
0.01UF
0805
C133
0.01UF
0805
C134
0.01UF
0805
C135
0.01UF
0805
C201
0.01UF
0805
ANALOG
DEVICES
A17
A18
CE
OE
SCHMITT (U35)
FLASH (U5)
NAND (U32)
M29W040
PLCC32
Size
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
MEMORY
Title
WE
Board No.
C
A
C127
0.01UF
0805
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:31
D
3
of
16
A
B
C
D
MCLK SOURCE FOR AD1836 AND AD1852
3.3V
1
INSTALL JUMPER ON 1 & 2 TO USE AUDIO OSCILALTOR
INSTALL JUMPER ON 2 & 3 TO USE CS8416 MCK
1
JP3
R5
10K
0805
R6
47.0K
0805
1
AUDIO_OSC
MCLK
S/PDIF RX
SJ3
SHORTING
JUMPER
DEFAULT=1&2
2
3
SPDIF_MCK
IDC3X1
VCC
U7
C193
0.01UF
0805
5
RXN
R4
0
0805
FER2
600
1206
C192
0.1UF
0805
C4
0.01UF
0805
3.3V
R13
10K
0805
2
PLACE JUMPER ON 1&2 FOR OPTICAL INPUT
PLACE JUMPER ON 2&3 FOR COAX INPUT
A3.3V
4
RXP0
3
RXP1
2
RXP2
1
RXP3
10
RXP4
11
RXP5
12
RXP6
13
RXP7
3
VCC1
OUT2
GND4
GND5
SHIELD6
SHIELD
TORX173
CON008
P2
1
6
VA
7
AGND
8
FILT
SJ2
SHORTING
JUMPER
DEFAULT=1&2
2
3
DLRCLK
DSDATA2
SPDIF GPO1
25
OMCK
CCLK_SCL
16
CDIN_AD1
MOSI
17
21
VL
23
VD
22
DGND
C3
1000PF
0805
20
GPO0
J6
CON012
U22
CS8416_GPO0
11
18
9
10
74LVC14A
SOIC14
TP1
RST
R12
270
0805
CS8416_CS
R14
0
0603
GPO2_AD0
2
MISO
14
CS_ADO
LED12
YELLOW
LED001
SPICLK
15
GPO1
IDC3X1
3.3V
R8
33
0805
19
R9
3.01K
1206
SPDIF
COAX
INPUT
DBCLK
24
RMCK
CDOUT_SDA
P4
TOSLINK
OPTICAL
INPUT
27
OSCLK
28
OLRCK
26
SDOUT
RESET
CS8416-CS
SOIC28
C5
0.022UF
0805
2
JP1
FLAG0
CS8416_CS
1
1
SJ19
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
2
IDC2X1
C6
0.1UF
0805
DNP
A3.3V
R11
0
0805
R10
75
1206
3.3V
FER1
600
1206
3
3
SHGND
C191
0.1UF
0805
C7
0.1UF
0805
C181
1000PF
0805
C182
0.1UF
0805
C8
10UF
1210
CS8416
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
SPDIF RECEIVER
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-9-2006_13:34
D
4
of
16
A
B
C
D
INSTALL JUMPER JP4, REMOVE JP1, JP23 AND JP26 TO CONNECT CODEC TO SPI PORT
REMOVE JUMPER JP1, JP4 AND JP26 TO USE FLAG0 FOR PUSH BUTTON OR EXPANSION HEADER
ODVDD IS CONNECTED TO 3.3V
3.3V
U10
1
3.3V
47
SD0A
48
ASDATA2
44
SFS0
43
SCLK0
R219
10K
0805
1
8
ASDATA1
OUT1L+
ASDATA2
OUT1L-
45
31
ABCLK
OUT1R+
51
SPICLK_C
2
MOSI_C
49
MISO_C
SJ6
CLATCH
OUT2L+
OUT2L-
R18
10K
0805
R19
10K
0805
R20
10K
0805
SAMPLE FREQUENCY
SHORTING
JUMPER
DEFAULT=3&4
MCLK
7
R220
10K
0805
DAC1 RIGHT
OUT1R-
6
CLATCH_C
SJ5
SHORTING
JUMPER
DEFAULT=1&2
OUT1R+
30
OUT2L+
50
DAC1 LEFT
OUT1L-
ALRCLK
OUT1RMCLK
OUT1L+
9
JP6
DAC2 LEFT
OUT2L-
1
2
3
4
CCLK
1&2
NOT ALLOWED
192kHz (2X INTERPOLATOR)
96kHz (4X INTERPOLATOR)
48kHz (8X INTERPOLATOR)
3&4
NOT SHORTED
NOT SHORTED
SHORTED
SHORTED
NOT SHORTED
SHORTED
NOT SHORTED
SHORTED
IDC2X2
33
CDATA
OUT2R+
COUT
OUT2R-
OUT2R+
32
DAC2 RIGHT
OUT2R-
U11
16
IN1L+
ADC1 LEFT
17
IN1L-
ADC1 RIGHT
18
IN1R+
19
IN1R-
4
IN1L+
OUT3L+
IN1L-
OUT3L-
IN1R+
OUT3R+
OUT3L+
5
OUT3R+
OUT3R-
34
96/48~
7
192/48~
DAC3 LEFT
OUT3L-
35
IN1R-
10
OUT3R-
2
MCLK
26
BCLK
25
LRCLK
27
SDATA
MCLK
DAC3 RIGHT
DBCLK
DLRCLK
20
IN2L+
21
IN2L-
ADC2 LEFT
2
22
IN2L1
23
IN2L2
IN2L+/CL2/CL2
DSDATA1
IN2L-/CL1/CL1
DSDATA2
NC/IN2L1/IN2L+
DSDATA3
NC/IN2L2/IN2L-
DLRCLK
38
41
ADC2 RIGHT
25
IN2R1
26
IN2R-
27
IN2R+
3
RESET
ASDATA2
SJ7
DLRCLK
37
1
SHORTING
JUMPER
DEFAULT=INSTALLED
DBCLK
4
CCLK
3
CLATCH
5
CDATA
SPICLK
JP5
36
OUT4L+
OUT4L-
12
OUTR+
13
OUTR-
OUT4R+
OUT4R-
DAC4 LEFT
DAC4 RIGHT
14
FILTR
19
FILTB
DSDATA2
42
DBCLK
24
IN2R2
SD2A
17
OUTL+
16
OUTL-
2
MOSI
2
22
ZEROL
8
ZEROR
IDC2X1
NC/IN2R2/IN2R13
NC/IN2R1/IN2R+
FILTR
FLAG1
RESET
24
RESET
CT3
10UF
B
12
IN2R-/CR1/CR1
FILTD
IN2R+/CR2/CR2
CT1
10UF
B
C9
0.1UF
0805
CT2
10UF
B
C11
0.1UF
0805
CT4
10UF
B
9
DEEMP
C10
0.1UF
0805
23
MUTE
R164
10K
0805
PD/RST
21
JP4
SJ4
IDPM1
AGND
SFS1
AD1852JRSZ
SSOP28
R170
20.0K
1206
2
IDC2X1
3.3V
20
CODEC
1
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
IDPM0
AD1836AASZ
MQFP52
FLAG0
2
I0A
4
YA
3
CLATCH_C
I1A
SPICLK
R190
10K
0805
3
SD3A
MOSI
SD1A
MISO
SJ18
SHORTING
JUMPER
DEFAULT=INSTALLED
5
I0B
VREF
1
3
SCLK1
AUX
DAC
SOIC8
LMV722M
U31
7
YB
2
SPICLK_C
U28
6
11
I0C
9
YC
MOSI_C
5
R173
20.0K
1206
10
I1C
14
I0D
12
YD
MISO_C
I1D
1
2
15
R154
0
1206
7
AVCC
6
AGND
13
JP23
1
INSTALL JUMPER JP4, REMOVE JP1, JP23 AND JP26 TO CONNECT CODEC TO SPI PORT
REMOVE JUMPER JP1, JP4 AND JP26 TO USE FLAG0 FOR PUSH BUTTON OR EXPANSION HEADER
SOIC8
LMV722M
I1B
VCC
3
AVCC
U28
S
E
R153
0
1206
IDC2X1
ADG774ABRQZ
QSOP16
C137
0.1UF
0805
C139
0.1UF
0805
C89
0.01UF
0805
C138
0.01UF
0805
3.3V
AGND
3.3V
SW9
15
LOOP_DAC1_RIGHT
14
LOOP_DAC2_LEFT
4
13
LOOP_DAC2_RIGHT
5
12
LOOP_DAC3_LEFT
6
11
LOOP_DAC3_RIGHT
7
10
LOOP_DAC4_LEFT
8
2
ON
LOOP_DAC1_LEFT
3
LOOP_ADC1_RIGHT
C184
0.01UF
0805
16
2
1
9
LOOP_DAC4_RIGHT
3
4
LOOP_ADC2_LEFT
5
LOOP_ADC2_RIGHT
6
7
4
8
SWT016
DIP8
MUX (U31)
C149
0.01UF
0805
C150
0.1UF
0805
C151
0.1UF
0805
AUX DAC (U11)
CODEC (U10)
AVCC
1
LOOP_ADC1_LEFT
AGND
VCC
C172
0.22UF
0805
ANALOG
DEVICES
AGND
CODEC (U10)
OPAMP (U28)
TURNING THE SWITCHES ON PUTS THE BOARD IN LOOPBACK MODE
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO CODEC
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-9-2006_13:34
D
5
of
16
A
B
J2
CON013
1
C
CT5
10UF
CAP002
FER3
600
1206
2
R21
5.76K
1206
D
1
R22
5.76K
1206
LOOP_ADC1_LEFT
3
C13
120PF
1206
C12
100PF
1206
2
R23
237.0
1206
U12
AGND
1
IN1L-
AGND
3
VREF
LMV722M
SOIC8
R24
5.76K
1206
C14
1000PF
0805
R26
5.76K
1206
C16
100PF
1206
ADC1 LEFT
C187
120PF
1206
AGND
R25
750.0K
1206
6
C15
1000PF
0805
R27
237.0
1206
U12
7
IN1L+
5
2
2
LMV722M
SOIC8
AGND
J2
CON013
CT6
10UF
CAP002
FER4
600
1206
1
R28
5.76K
1206
R29
5.76K
1206
LOOP_ADC1_RIGHT
3
C18
120PF
1206
C17
100PF
1206
6
R30
237.0
1206
U13
AGND
7
IN1R-
AGND
5
LMV722M
SOIC8
R31
5.76K
1206
C19
1000PF
0805
R33
5.76K
1206
C21
100PF
1206
ADC1 RIGHT
C188
120PF
1206
3
AGND
R32
750.0K
1206
2
3
C20
1000PF
0805
R34
237.0
1206
U13
1
IN1R+
3
LMV722M
SOIC8
AGND
AVCC
C156
0.22UF
0805
C157
0.22UF
0805
ANALOG
DEVICES
4
AGND
OPAMPS (U12, U13)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO IN 1
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:31
D
6
of
18
A
B
C
D
SJ8
SHORTING
JUMPER
DEFAULT=1&3
1
J2
CON013
CT7
10UF
CAP002
FER5
600
1206
R35
5.76K
1206
R36
5.76K
1206
1
SJ9
SHORTING
JUMPER
DEFAULT=2&4
5
LOOP_ADC2_LEFT
6
C23
120PF
1206
C22
100PF
1206
ADC2 LEFT INPUT MODE
PGA MODE 3-5 & 4-6
HIGH PERFORMANCEMODE 1-3 & 2-4
2
IN2L2
U14
IN2L-
AGND
R40
237.0
1206
1
AGND
3
VREF
LMV722M
SOIC8
R37
5.76K
1206
R39
5.76K
1206
2
4
C24
1000PF
0805
6
JP7
IDC3X2
1
C189
120PF
1206
3
C26
100PF
1206
ADC2 LEFT
5
C25
1000PF
0805
R38
750.0K
1206
6
2
U14
AGND
2
R41
237.0
1206
7
5
IN2L+
LMV722M
SOIC8
IN2L1LINE
AGND
J2
CON013
CT8
10UF
CAP002
FER6
600
1206
SJ10
R42
5.76K
1206
SHORTING
JUMPER
DEFAULT=1&3
R43
5.76K
1206
4
JP11 (ON SHEET 8) SHOULD BE IN LINE IN
POSITION TO USE EITHER OF THESE MODES
SJ11
LOOP_ADC2_RIGHT
6
C28
120PF
1206
C27
100PF
1206
SHORTING
JUMPER
DEFAULT=2&4
ADC2 RIGHT INPUT MODE
PGA MODE 3-5 & 4-6
HIGH PERFORMANCEMODE 1-3 & 2-4
6
IN2R2
U15
IN2R-
AGND
R47
237.0
1206
7
AGND
5
LMV722M
SOIC8
R44
5.76K
1206
R46
5.76K
1206
2
C29
1000PF
0805
6
JP8
IDC3X2
C190
120PF
1206
3
4
1
3
C31
100PF
1206
ADC2 RIGHT
3
5
C30
1000PF
0805
R45
750.0K
1206
2
U15
AGND
1
R48
237.0
1206
3
IN2R+
LMV722M
SOIC8
IN2R1LINE
AGND
AVCC
C159
0.22UF
0805
C163
0.22UF
0805
ANALOG
DEVICES
4
AGND
OPAMPS (U14, U15)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO IN 2
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
7
of
16
A
B
C
JP9
1
D
MIC PRE AMP GAIN
SJ12
2
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
3
1&2 20dB
2&3 40dB
NONE 0 dB
IDC3X1
R53
1.0K
1206
R54
100.0
1206
C32
820PF
1206
1
1
R55
10.0K
1206
AVCC
FER7
600
1206
SJ13
U16
2
CT9
10UF
CAP002
SHORTING
JUMPER
DEFAULT=3&5
1
3
SJ14
LMV722M
SOIC8
R49
2.0K
1206
2
3
R51
10.0K
1206
3
Q2
MMBT4124
SOT-23
J3
SHORTING
JUMPER
DEFAULT=4&6
IN2R1
2
IN2R1LINE
1
2
VREF
4
6
4
CT11
10UF
B
5
1
R50
2.0K
1206
CON001
1
3
ADC2 RIGHT/LEFT
5
R52
10.0K
1206
MIC INPUT
2
JP11
IDC3X2
C33
0.1UF
0805
IN2L1LINE
AGND
CT10
10UF
CAP002
FER8
600
1206
2
IN2L1
AGND
SOIC8
LMV722M
5
7
6
U16
ADC2 INPUT SELECTOR
AGND
INSTALL JUMPERS ON 3-5 & 4-6 FOR LINE IN
INSTALL JUMPERS ON 1-3 & 2-4 FOR MIC IN
R58
10.0K
1206
C34
820PF
1206
R56
1.0K
1206
R57
100.0
1206
JP10
3
MIC PRE AMP GAIN
SJ15
SHORTING
JUMPER
DEFAULT=NOT INSTALLED
2
1&2 20dB
2&3 40dB
NONE 0 dB
1
IDC3X1
3
3
2
CT34
68UF
CAP003
U29
1
DAC1_RIGHT
3
AD8532ARZ
SOIC8
R206
49.9K
1206
J4
2
3
4
AVCC
5
AGND
1
CON001
6
CT35
68UF
CAP003
U29
AGND
7
DAC1_LEFT
4
C160
0.22UF
0805
C183
0.22UF
0805
ANALOG
DEVICES
5
AD8532ARZ
SOIC8
R192
49.9K
1206
AGND
Title
OPAMPS (U16, U29)
Size
AGND
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO IN MIC/LINE, HEADPHONE OUT
Board No.
C
Date
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
8
of
16
A
B
C
D
1
1
DAC1_LEFT
R61
5.49K
1206
R59
11.0K
1206
C38
100PF
1206
R62
3.32K
1206
OUT1L-
C36
330PF
0805
DAC1 LEFT
2
C35
100PF
1206
J5
CON011
CT26
68UF
CAP003
R65
604.0
1206
U17
1
LOOP_DAC1_LEFT
2
3
C37
680PF
0805
R60
5.49K
1206
LMV722M
SOIC8
R64
1.65K
1206
3
C40
2200PF
1206
R66
49.9K
1206
OUT1L+
R63
2.74K
1206
2
C39
220PF
1206
2
AGND
VREF
AGND
DAC1_RIGHT
R69
5.49K
1206
R67
11.0K
1206
C44
100PF
1206
R70
3.32K
1206
OUT1R-
C42
330PF
0805
DAC1 RIGHT
6
C41
100PF
1206
CT27
68UF
CAP003
R73
604.0
1206
U17
J5
CON011
7
LOOP_DAC1_RIGHT 1
5
C43
680PF
0805
R68
5.49K
1206
3
LMV722M
SOIC8
R72
1.65K
1206
3
C46
2200PF
1206
R74
49.9K
1206
3
OUT1R+
R71
2.74K
1206
C45
220PF
1206
AGND
AGND
AVCC
C161
0.22UF
0805
4
ANALOG
DEVICES
AGND
OPAMP (U17)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO OUT 1
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
9
of
18
A
B
C
D
1
1
R77
5.49K
1206
R75
11.0K
1206
C50
100PF
1206
R78
3.32K
1206
OUT2L-
C48
330PF
0805
DAC2 LEFT
6
C47
100PF
1206
J5
CON011
CT28
68UF
CAP003
R81
604.0
1206
U18
7
LOOP_DAC2_LEFT 4
5
C49
680PF
0805
R76
5.49K
1206
LMV722M
SOIC8
R80
1.65K
1206
6
C52
2200PF
1206
R82
49.9K
1206
OUT2L+
R79
2.74K
1206
2
C51
220PF
1206
2
AGND
VREF
AGND
R85
5.49K
1206
R83
11.0K
1206
C56
100PF
1206
R86
3.32K
1206
OUT2R-
C54
330PF
0805
DAC2 RIGHT
2
C53
100PF
1206
J5
CON011
CT29
68UF
CAP003
R89
604.0
1206
U18
1
LOOP_DAC2_RIGHT
5
3
C55
680PF
0805
R84
5.49K
1206
3
LMV722M
SOIC8
R88
1.65K
1206
6
C58
2200PF
1206
R90
49.9K
1206
3
OUT2R+
R87
2.74K
1206
C57
220PF
1206
AGND
AGND
AVCC
C162
0.22UF
0805
4
ANALOG
DEVICES
AGND
OPAMP (U18)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO OUT 2
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
10
of
18
A
B
C
D
1
1
R93
5.49K
1206
R91
11.0K
1206
C62
100PF
1206
R94
3.32K
1206
OUT3L-
C60
330PF
0805
DAC3 LEFT
6
C59
100PF
1206
J5
CON011
CT30
68UF
CAP003
R97
604.0
1206
U19
7
LOOP_DAC3_LEFT
7
5
C61
680PF
0805
R92
5.49K
1206
LMV722M
SOIC8
R96
1.65K
1206
9
C64
2200PF
1206
R98
49.9K
1206
OUT3L+
R95
2.74K
1206
2
C63
220PF
1206
2
AGND
VREF
AGND
R101
5.49K
1206
R99
11.0K
1206
C68
100PF
1206
R102
3.32K
1206
OUT3R-
C66
330PF
0805
DAC3 RIGHT
2
C65
100PF
1206
J5
CON011
CT31
68UF
CAP003
R105
604.0
1206
U19
1
LOOP_DAC3_RIGHT
8
3
C67
680PF
0805
R100
5.49K
1206
3
LMV722M
SOIC8
R104
1.65K
1206
9
C70
2200PF
1206
R106
49.9K
1206
3
OUT3R+
R103
2.74K
1206
C69
220PF
1206
AGND
AGND
AVCC
C158
0.22UF
0805
4
ANALOG
DEVICES
AGND
OPAMP (U19)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO OUT 3
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
11
of
18
A
B
C
D
1
1
R109
5.49K
1206
R107
11.0K
1206
C74
100PF
1206
R110
3.32K
1206
OUT4L-
C72
330PF
0805
DAC4 LEFT
6
C71
100PF
1206
J5
CON011
CT32
68UF
CAP003
R113
604.0
1206
U20
7
LOOP_DAC4_LEFT
10
5
C73
680PF
0805
R108
5.49K
1206
LMV722M
SOIC8
R112
1.65K
1206
12
C76
2200PF
1206
R114
49.9K
1206
OUT4L+
R111
2.74K
1206
2
C75
220PF
1206
2
AGND
VREF
AGND
R117
5.49K
1206
R115
11.0K
1206
C80
100PF
1206
R118
3.32K
1206
OUT4R-
C78
330PF
0805
DAC4 RIGHT
2
C77
100PF
1206
J5
CON011
CT33
68UF
CAP003
R121
604.0
1206
U20
1
LOOP_DAC4_RIGHT
11
3
C79
680PF
0805
R116
5.49K
1206
3
LMV722M
SOIC8
R120
1.65K
1206
12
C82
2200PF
1206
R122
49.9K
1206
3
OUT4R+
R119
2.74K
1206
C81
220PF
1206
AGND
AGND
AVCC
C164
0.22UF
0805
4
ANALOG
DEVICES
AGND
OPAMP (U20)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
AUDIO OUT 4
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
12
of
18
A
B
C
D
1
1
3.3V
3.3V
R124
10K
0805
EXFLAG0
R123
100
0805
U21
1
SW1
SWT013
MOMENTARY
R129
100
0805
JP26
2
1
2
SOIC14
U21
9
FLAG0
IDC2X1
74LVC14A
CT12
1UF
A
R130
10K
0805
EXFLAG3
SW4
SWT013
MOMENTARY
SJ16
FLAG3
74LVC14A
SOIC14
CT15
1UF
A
SHORTING
JUMPER
DEFAULT=1 & 2
8
2
2
3.3V
3.3V
R126
10K
0805
EXFLAG1
U21
3
SW2
SWT013
MOMENTARY
R132
10K
0805
EXIRQ0
R125
100
0805
2
U21
11
FLAG1
IDC2X1
74LVC14A
SOIC14
CT13
1UF
A
1
SW5
SWT013
MOMENTARY
SJ17
CT16
1UF
A
SHORTING
JUMPER
R136
10K
0805
EXIRQ2
R131
100
0805
JP27
4
3.3V
R135
100
0805
U21
10
74LVC14A
SOIC14
13
12
U22
5
IRQ0
SW7
SWT013
MOMENTARY
74LVC14A
SOIC14
CT18
1UF
A
74LVC14A
SOIC14
U22
6
9
8
IRQ2
74LVC14A
SOIC14
DEFAULT=1 & 2
3.3V
3.3V
3
3
R128
10K
0805
EXFLAG2
R127
100
0805
R133
100
0805
U21
5
SW3
SWT013
MOMENTARY
CT14
1UF
A
R134
10K
0805
EXIRQ1
6
U22
1
FLAG2
SW6
SWT013
MOMENTARY
74LVC14A
SOIC14
CT17
1UF
A
74LVC14A
SOIC14
U22
2
3
4
IRQ1
74LVC14A
SOIC14
3.3V
C165
0.01UF
0805
C166
0.01UF
0805
ANALOG
DEVICES
4
SCHMITT TRIGGERS (U21 & U22)
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
PUSHBUTTONS
Title
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
13
of
16
A
B
C
D
VCC
1
1
RESET
3.3V
LED1
RED
LED001
R143
680
0805
POWER
LED11
GREEN
LED001
U23
2
RESET
4
FLAG[4:9]
FLAG4
6
FLAG5
8
FLAG6
11
FLAG7
13
FLAG8
15
FLAG9
17
VCC
1
2
19
C167
0.01UF
0805
18
1A1
1Y1
1A2
1Y2
16
R147
680
0805
14
1A3
1Y3
1A4
1Y4
2A1
2Y1
2A2
2Y2
2A3
2Y3
2A4
2Y4
12
9
7
5
3
3.3V
OE1
LED2
YELLOW
LED001
OE2
LED3
YELLOW
LED001
LED4
YELLOW
LED001
LED5
YELLOW
LED001
LED6
YELLOW
LED001
LED7
YELLOW
LED001
2
74FCT244AT
QSOP20
R137
680
0805
R138
680
0805
R139
680
0805
R140
680
0805
R141
680
0805
R151
10K
0805
R142
680
0805
R152
33
0805
U24
1
OE
5
OUT
OCTAL BUFFER (U23)
25MHZ
OSC001
CLKIN
XTAL
3.3V
Y2
12MHZ
OSC006
DNP
3.3V
R149
10K
0805
R150
33
0805
U25
R148
10K
0805
3
1
OE
U26
1
SW8
SWT013
MOMENTARY
4
C83
27PF
0402
DNP
5
OUT
RESET
PFI
RESET
OSCILLATOR OR CRYSTAL CAN BE USED FOR THE 21161N
8
7
3
AUDIO_OSC
12.288MHZ
OSC001
MR
C84
27PF
0402
DNP
RESET
5
PFO
3.3V
ADM708SARZ
SOIC8
DA_SOFT_RESET
3.3V
C168
0.01UF
0805
C169
0.01UF
0805
C170
0.01UF
0805
OSCILLATORS (U24 & U25)
ANALOG
DEVICES
RESET MON (U26)
4
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
LEDS, RESET & OSCILLATORS
Board No.
C
Date
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
14
of
16
A
B
C
D
P9
1
2
3
4
A8
5
6
A7
7
8
A6
9
10
A5
11
12
A17
A19
A[8:0]
1
A4
A3
D[23:16]
13
A18
A20
A21
RD
LBOOT
DMAG1
BMS
16
A2
17
18
A1
19
20
A0
21
22
D23
23
24
D22
EBOOT
ACK
14
15
25
DMAR1
EXFLAG0
DMAG2
EXFLAG1
DMAR2
EXFLAG2
PA
EXFLAG3
SBTS
EXIRQ0
26
D21
27
28
D20
29
30
D19
31
32
D18
33
34
D17
35
36
D16
37
38
39
40
VCC
WR
HBR
EXIRQ1
HBG
REDY
P10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
3.3V
1.8V
TIMEXP
P11
EXIRQ2
P18
1
BR1
2
BR2
3
BR3
4
MS2
1
1
2
MISO
3
4
MOSI
5
6
SPIDS
7
8
9
10
11
12
SPICLK
5
MS3
IDC5X1
DNP
RESET
IDC6X2
DNP
CON023
DNP
CS
BMSTR
BRST
CON022
DNP
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
2
LINK PORT CONNECTORS
2
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
3.3V
P13
14
15
16
17
18
19
20
21
22
23
26
CLKSH
UD1
ACKSH
CLK
1
2
D0SH
ACK
D1SH
D0
D2SH
L0D0
5
L0D1
6
L0D2
D3SH
D2
D4SH
D3
7
8
D5SH
D4
D6SH
D5
9
10
D7SH
D6
UD2
D7
11
L0D[0:7]
SCLK1
R218
0
1206
L0D3
L0D4
R217
0
1206
SFS1
SD1A
SD1B
L0D5
CH1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
3V
L0D7
SFS3
27
CH2
P12
1
L0D6
SCLK3
28
3.3V
R172
10K
0805
L0ACK
4
D1
SERIAL PORT CONNECTOR
L0CLK
3
SD3A
LINKPORT
CON010
SD3B
ZP4
1
2
DA_EMULATOR_SELECT
3
4
DA_EMULATOR_EMU
5
6
DA_EMULATOR_TMS
7
8
DA_EMULATOR_TCK
9
10
DA_EMULATOR_TRST
11
12
DA_EMULATOR_TDI
13
14
DA_EMULATOR_TDO
TMS
TMS
TCK
TCK
DA_EMULATOR_SELECT
DA_EMULATOR_EMU
TRST
TRST
DA_EMULATOR_TMS
TDI
TDI
TDO
TDO
EMU
EMU
DA_EMULATOR_TCK
DA_EMULATOR_TRST
DA_EMULATOR_TDI
DA_EMULATOR_TDO
DA_GP0
IDC7X2
DA_GP1
CON014
RESET
RESET
DA_GP2
DA_SOFT_RESET
SHGND
3
DA_SOFT_RESET
GND
SHGND
DA_GP3
SHGND
3
DEBUG_AGENT
P14
14
15
16
17
18
19
20
21
22
23
26
28
CLKSH
UD1
ACKSH
CLK
1
2
L1CLK
D0SH
ACK
D1SH
D0
D2SH
D1
3
7
L1D3
8
L1D4
9
L1D5
10
L1D6
11
L1D7
D4
L1D2
D5SH
L1D1
6
D3
5
D4SH
L1D0
D2
4
D3SH
D6SH
D5
D7SH
D6
UD2
D7
CH1
CH2
P3
L1ACK
DBCLK
L1D[0:7]
DLRCLK
DSDATA2
ASDATA2
1
SHGND
2
3
4
IDC4X1
27
LINKPORT
CON010
4
SHGND
ANALOG
DEVICES
SHGND
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
CONNECTORS
Title
JP1 SHOULD NOT BE INSTALLED WHEN USING THE LINK PORT
Size
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-9-2006_13:34
D
15
of
16
A
B
C
D
VCC
F1
2.5A
FUS001
D2
S2A
2A
DO-214AA
FER13
190
FER002
4
3
1
2
VR1
V_UNREG
3
INPUT
GND
1
P16
1
2
1
D1
S2A
2A
DO-214AA
C86
1000PF
1206
2
OUTPUT
R167
100K
1206
CT19
10UF
C
MH3
MH4
MH2
MH1
MH5
ADP3339AKCZ-5
SOT-223
C87
0.1UF
0805
CT20
10UF
C
C88
0.1UF
0805
1
3
7_0V_POWER
CON005
SHGND
SHGND
SHGND
FER9
600
1206
SHGND
C85
1000PF
1206
M1
M2
M3
M4
M5
AGND
FER10
600
1206
RUBBER FOOTRUBBER FOOTRUBBER FOOTRUBBER FOOTRUBBER FOOT
MSC009
MSC009
MSC009
MSC009
MSC009
SHGND
SHGND
3.3V
3.3V
VCC
AVCC
1.8V
VCC
FER14
600
1206
AVCC
D3
SL22
2A
DO-214AA
FER12
600
1206
DNP
2
FER11
600
1206
V_UNREG
VR3
VR5
3
INPUT
OUTPUT
GND
1
2
2
3
INPUT
2
OUTPUT
GND
1
ADP3338AKCZ-18
SOT-223
CT22
10UF
C
C90
0.1UF
0805
ADP3339AKCZ-5
SOT-223
DNP
CT36
10UF
C
C173
0.1UF
0805
1.8V
VDDINT
R168
0
1206
AGND
3.3V
VDDEXT
R169
0
1206
R168 & R169 ARE USED TO MEASURE CURRENT DRAW OF THE DSP
VCC
3.3V
1.8V
V_UNREG
C197
10UF
1210
3
C194
10UF
0805
DNP
3
CT23
4.7UF
C
CT24
4.7UF
C
CT25
4.7UF
C
3.3V
R16
24.9K
0603
R165
0.05
1206
VR6
5
1
CS
C195
470PF
0603
C196
68PF
0603
TP2
IN
U6
COMP
4
4
2
3
FB
PGATE
GND
2
R166
80.6K
0603
6
R17
0
0603
R171
255.0K
0603
L1
6.8UH
IND009
5
ADP1864
SOT23-6
3
FDC658P
SOT23-6
4
1
6
D5
SSB43L
4A
DO-214AA
CT37
47UF
B
CT38
2.2UF
B
DNP
C198
1UF
0805
DNP
PGND
ANALOG
DEVICES
PGND
R15
0
0805
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21161 EZ-KIT LITE
POWER
Title
PGND
20 Cotton Road
Rev
A0157-2000
3.0
Sheet
11-8-2006_10:30
D
16
of
16
I
INDEX
A
B
AD1836, CAD and DAC
control selection jumper (JP23), 2-11
input channels, 1-11, 2-4
interface, xii
MCLK source select jumper (JP3), 2-8
SPI port, 1-10, 1-11, 2-4
AD1852 digital-to-analog converters (DACs)
MCLK source select jumper (JP3), 2-8
sample frequency jumper (JP6), 2-9
SPI port, 1-10, 1-12, 2-4
ADC2
JP11 (MIC/LINE source select), 2-10
mode select jumpers (JP7-8), 2-10
ADSP-21161N processors
boot modes, 2-7
clock mode select switch (SW10), 2-5
core speed, 2-3
core voltage, 2-3, 2-22
ID settings, 2-12
interrupt pins, 1-10
memory map, 1-8
memory select pins See ~BMS, ~MS1-0
analog audio, See audio
architecture, of this EZ-KIT Lite, 2-2
audio
connectors (J2-6, P4), 2-18
input channels, 1-11, 2-4
interface, 1-11, 2-4
output jacks, 1-12, 2-4
bill of materials, A-1
~BMS memory select pin, 1-8, 2-3, 2-7
board
measurements, 2-22
schematic, B-1
boot
memory select pin, See ~BMS
mode select switch (SW11), 2-7
C
CLK_CFG0-1 pins, 2-6
CLKDBL pin, 2-6
CLKIN pin, 2-5
clock mode select switch (SW10), 2-3, 2-5
codecs, See AD1836, AD1852
configuration, of this EZ-KIT Lite, 1-3
connectors
diagram of locations, 1-4, 2-17
J2 (RCA mono jack), 1-11, 2-4, 2-10, 2-18
J3 (stereo jack), 1-11, 2-4, 2-10, 2-18
J4 (stereo jack), 2-18
J5 (RCA jack), 2-18
J6 (RCA mono jack), 1-11, 2-8, 2-18
P10 (host processor), 1-10, 1-11, 2-4, 2-19
P11 (voltage), 2-19
P12 (SPORT1, SPORT3), 2-19
P13-14 (link port), 2-20
P16 (power), 1-5, 2-20
ADSP-21161N EZ-KIT Lite Evaluation System Manual
I-1
INDEX
F
P16 (power), 1-5, 2-20
P18 (SPI), 2-21
P4 (optical input), 1-11, 2-8, 2-18, 2-19
P9 (external port), 2-18
ZJ1 (USB), 1-5, 2-17
ZP4 (JTAG header), 2-21
contents, of this EZ-KIT Lite, 1-2
converters, See AD1836, AD1852
core
clock ratio, 2-6
voltage, 2-3, 2-22
CS8416 digital receivers
clock/sync signals, 1-12
data formats, 1-12
S/PDIF select jumper (P2), 2-8
SPI compatible mode, 1-12
VERF LED (LED12), 2-14
customer support, xvi
features, of this EZ-KIT Lite, xii
FLAG0
enable jumper (JP1, JP4), 2-9
SW1/AD1836 SPI pin, 1-10, 2-11, 2-15
FLAG1
enable jumper (JP5), 2-9
SW2/AD1852 SPI pin, 1-10, 2-12, 2-15
FLAG10-11 (not connected) pins, 1-10
FLAG2-3 (SW3-4) pins, 1-10, 2-15
FLAG4-9 (LED2-7) pins, 1-10, 2-14
FLAG system registers, 1-9
flash memory, 1-8, 2-3, 2-7
frequency, 2-5, 2-9
G
general-purpose IO pins, xiii, 1-9, 2-15
H
D
default configuration, of this EZ-KIT Lite, 1-3
digital
audio interface, See also AD1852
audio playback, 1-12
stereo channels, 1-11
E
EBOOT pin, 2-7
EPROM boot mode, 2-7
example programs, 1-13
expansion connectors (un-installed), xiv
external
data bus, 2-8
interrupts, 1-10
memory, 1-8, 1-9
external ports
clock ratios, 2-6
connector (P9), 2-18
I-2
host processor
boot mode, 2-7
interface connector (P10), 1-10, 1-11, 2-4,
2-19
I
input clock, 2-3
installation, of this EZ-KIT Lite, 1-5
internal memory, 1-8
interrupts
push buttons (SW5-7), 1-11
request pins (IRQ0-2), 1-11, 2-16
J
JTAG
connector (ZP4), 2-21
emulation port, 2-5
ADSP-21161N EZ-KIT Lite Evaluation System Manual
INDEX
jumpers
diagram of locations, 1-4
JP11 (MIC/LINE source select), 1-11, 2-4,
2-10
JP1 (FLAG0 enable), 2-9
JP22 (~BMS enable), 2-7
JP26 (SW1 enable), 2-11
JP27 (SW2 enable), 2-12
JP3 (MCLK source), 2-8
JP4 (FLAG0 enable), 2-9
JP5 (FLAG1 enable), 2-9
JP6 (AD1852 frequency), 2-9
JP7-8 (1836 input modes), 2-10
JP9-10 (microphone gain), 2-10
P17 (SDRAM disable), 2-8
P2 (S/PDIF select), 1-11, 2-8
L
LBOOT pins, 2-7
LEDs
diagram of locations, 1-4, 2-13
LED11 (power), 1-5, 2-14
LED12 (VERF), 1-12, 2-14
LED1 (reset), 1-5, 2-13
LED2-7 (FLAG4-9), 1-10, 2-14
ZLED3 (USB monitor), 1-5, 2-15
license restrictions, 1-7
LINE IN
jacks, 1-12
stereo input channel, 2-4
LINE OUT jacks, 1-12, 2-4
link port
boot mode, 2-7
connectors (P13-14), 2-20
link ports
disable jumper (P17), 2-8
processor ID settings, 2-12
M
MCLK select jumper (JP3), 2-8
measurements, of this EZ-KIT Lite, 2-22
memory
map, of this EZ-KIT Lite, 1-8
select pins, See ~BMS, ~MS0-1
microphone
circuit, 2-10
input channel (MIC1), 2-4
jacks, 1-12
MODE2 register, 1-9
~MS0-1 memory select pins, 1-8, 2-3
multiprocessor memory space, 1-8
N
no-boot mode, 2-7
notation conventions, xxii
O
oscillators
CLKIN mode select switch (SW10), 2-5
MCLK source select jumper (JP3), 2-8
shipped with this EZ-KIT Lite, 2-3
P
package contents, 1-2
power
input connector (P16), 1-5, 2-20
LED (LED11), 1-5, 2-14
specifications, 2-22
programmable flags, See FLAGx, SWx
push buttons
See also switches by name (SWx), 2-13
diagram of locations, 2-13
R
RCA jacks, 1-12, 2-4, 2-18
ADSP-21161N EZ-KIT Lite Evaluation System Manual
I-3
INDEX
registration, of this EZ-KIT Lite, 1-3
reset
LED (LED1), 2-13
push button (SW12), 2-16
resistors
R144-146, 2-12
R155-157, 2-12
restrictions, of evaluation license, 1-7
S
sample frequency
jumper (JP6), 2-9
of audio interface, 1-12
schematic, of this EZ-KIT Lite, B-1
SDRAM
connections, 2-3
disable jumper (JP1), 2-8
memory map, 1-8
serial boot mode (via SPI), 2-7
serial peripheral interconnect (SPI)
audio interface, 2-4
ports, 2-4
select pins, 1-10
SPORT1 connection, 2-11
Sony/Philips Digital Interface Format, See
S/PDIF
S/PDIF
connectors, 2-14
select jumper (P2), 2-8
stream as MCLK source, 2-8
specifications, of this EZ-KIT Lite, 2-22
SPORT0, 2-4
SPORT1
connections, 2-11
connector (P12), 2-19
SPORT2, 2-4
SPORT3
connections, xiv
connector (P12), 2-19
I-4
SRAM memory, 1-8
startup, of this EZ-KIT Lite, 1-5
stereo
input/output channels, 1-11
jack (J3), 1-11, 2-4
SW10 (clock mode select) switch, 2-5
SW11 (boot mode select) switch, 2-7
SW12 (reset) push button, 2-16
SW1 (FLAG0) enable push button, 1-10, 2-11,
2-15
SW2-4 (FLAG1-3) push buttons, 1-10, 2-15
SW5-7 (IRQ0-2) push buttons, 1-11, 2-15
switches
See also switches by name (SWx)
diagram of locations, 2-5
synchronous dynamic random access memory,
See SDRAM
system architecture, of this EZ-KIT Lite, 2-2
T
Target Options dialog box, 1-9
U
USB
cable, 1-3
connector (ZJ1), 2-17
interface, 2-16, 2-21
monitor LED (ZLED3), 2-15
V
VERF flag (LED9), 1-12, 2-14
VisualDSP++
documentation, xxi
environment, 1-5
voltage regulators, xiii, 2-22
ADSP-21161N EZ-KIT Lite Evaluation System Manual