ADSP-21262 EZ-KIT Lite Evaluation System Manual (Rev. 3.2)

ADSP-21262 EZ-KIT Lite®
Evaluation System Manual
Revision 3.2, August 2012
Part Number
82-000800-01
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
a
Copyright Information
© 2012 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, CrossCore, EngineerZone, EZ-Extender,
EZ-KIT Lite, SHARC, and VisualDSP++ are registered trademarks of
Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21262 EZ-KIT Lite evaluation system is designed to be used
solely in a laboratory environment. The board is not intended for use as a
consumer end product or as a portion of a consumer end product. The
board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in
close proximity. This board should not be used in or near any medical
equipment or RF devices.
The ADSP-21262 EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC amended by 93/68/EEC and, therefore, carries the “CE”
mark.
The ADSP-21262 EZ-KIT Lite evaluation system has been appended to
Analog Devices, Inc. EMC Technical File (EMC TF) referenced
“DSPTOOLS1” dated December 21, 1997 and was declared CE compliant by an appointed Notified Body (No.0673) as listed below.
Notified Body Statement of Compliance: Z600ANA1.013
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park
Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance degradation or loss of
functionality. Store unused EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Product Overview ..........................................................................
x
Purpose of This Manual ............................................................... xii
Intended Audience ....................................................................... xii
Manual Contents ........................................................................ xiii
What’s New in This Manual ......................................................... xiv
Technical Support ........................................................................ xiv
Supported Processors ..................................................................... xv
Product Information ..................................................................... xv
Analog Devices Web Site ......................................................... xv
EngineerZone ......................................................................... xvi
Related Documents ..................................................................... xvii
Notation Conventions ................................................................. xvii
ADSP-21262 EZ-KIT Lite Evaluation System Manual
v
Contents
USING THE ADSP-21262 EZ-KIT LITE
Package Contents ......................................................................... 1-3
Default Configuration .................................................................. 1-3
CCES Install and Session Startup .................................................. 1-4
Session Startup ........................................................................ 1-6
VisualDSP++ Install and Session Startup ....................................... 1-8
Session Startup ........................................................................ 1-9
CCES Evaluation License ........................................................... 1-10
VisualDSP++ Evaluation License ................................................. 1-11
External Memory ........................................................................ 1-12
Analog Audio Interface ............................................................... 1-13
Digital Audio Interface ............................................................... 1-14
LEDs and Push Buttons .............................................................. 1-15
Example Programs ...................................................................... 1-17
Board Design Database ............................................................... 1-17
ADSP-21262 EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
Parallel Port ............................................................................ 2-3
DAI Interface .......................................................................... 2-4
SPI Interface ........................................................................... 2-6
Flag Pins ................................................................................. 2-6
Expansion Interface ................................................................. 2-7
JTAG Emulation Port ............................................................. 2-8
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
Contents
Switch Settings .............................................................................. 2-8
Electret Microphone Select Switch (SW6) ................................ 2-8
Codec Setup Switch (SW7) ...................................................... 2-8
S/PDIF Signal Enable Switch (SW8) ...................................... 2-10
Push Button Enable Switch (SW9) ......................................... 2-11
Boot Mode and Clock Ratio Select Switch (SW10) ................. 2-11
Loop-Back Test Switch (SW11) ............................................. 2-12
SPI Disable Switch (SW12) ................................................... 2-12
LEDs and Push Buttons .............................................................. 2-13
General Purpose LEDs (LED8–1) .......................................... 2-14
Reset LED (LED9) ................................................................ 2-14
Power LED (LED10) ............................................................. 2-14
S/PDIF GPO1 LED (LED11) ............................................... 2-14
USB Monitor LED (ZLED3) ................................................. 2-14
Push Buttons (SW4–1) .......................................................... 2-15
Board Reset Push Button (SW5) ............................................ 2-15
Connectors ................................................................................. 2-16
Expansion Interface (J1–3) .................................................... 2-17
Audio In RCA Connector (J4) ............................................... 2-17
Audio Out RCA Connector (J5) ............................................ 2-18
Headphone Out Jack (J6) ...................................................... 2-18
Power Jack (J7) ...................................................................... 2-18
S/PDIF Coax Connector (J8) ................................................ 2-19
SPI Header (P2) .................................................................... 2-19
ADSP-21262 EZ-KIT Lite Evaluation System Manual
vii
Contents
DAI Header (P3) .................................................................. 2-20
USB Connector (ZJ1) ........................................................... 2-20
JTAG Header (ZP4) .............................................................. 2-21
ADSP-21262 EZ-KIT LITE BILL OF MATERIALS
ADSP-21262 EZ-KIT LITE SCHEMATIC
INDEX
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21262 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for SHARC® processors (DSPs).
The SHARC processors are based on a 32-bit super Harvard architecture
that includes a unique memory architecture comprised of two large
on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained
high-speed computations. SHARC processors represent today’s de facto
standard for floating-point processor targeted for premium audio
applications.
The evaluation system is designed to be used in conjunction with the
CrossCore® Embedded Studio (CCES) and VisualDSP++® development
environments to demonstrate capabilities of the ADSP-21262 SHARC
processors. The development environment aids advanced application code
development and debug, such as:
• Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21262 assembly
• Load, run, step, halt, and set breakpoints in application programs
• Read and write data and program memory
• Read and write core and peripheral registers
• Plot memory
Access to the ADSP-21262 processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ix
Product Overview
interface gives unrestricted access to the ADSP-21262 processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools.
The ADSP-21262 EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board.
Product Overview
The board features:
• Analog Devices ADSP-21262 SHARC processor
• 136-pin BGA package
• 300 MHz core clock speed
• Synchronous random access memory (SRAM)
• 512K bit x 8-bit
• Flash memory
• 1M x 8-bit
•
Serial peripheral interconnect (SPI) flash memory
• 2M bit
x
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Preface
• Analog audio interface
• AD1835A codec
• 4x2 RCA phono jack for 4 channels of stereo output
• 2x1 RCA phono jack for 1 channel of stereo input
• Headphone jack for 1 channel stereo output
• Digital audio interface (DAI)
• CS8416 Sony/Philips Digital Interface (S/PDIF) receiver
• RCA phono jack input
• LEDs
• Twelve LEDs: one power (green), one board reset (red),
S/PDIF (amber), one USB monitor (amber), and eight general-purpose (amber)
• Push buttons
• five push buttons: one reset, two connected to DAI, two
connected to processor FLAG pins
• Expansion interface (type A)
• Parallel port, FLAGs, DAI, SPI
• Other features
• JTAG ICE 14-pin header
• 0-ohm resistors for processor current measurement
• SPI header
• DAI header
ADSP-21262 EZ-KIT Lite Evaluation System Manual
xi
Purpose of This Manual
The EZ-KIT Lite board has a total of 1 MB of parallel flash memory and
2M bit of SPI flash memory. Flash memories can store user-specific boot
code, allowing the board to run as a stand-alone unit. For more information, see “External Memory” on page 1-12 and “Boot Mode and Clock
Ratio Select Switch (SW10)” on page 2-11. The board also has 512 KB of
SRAM, which can be used at runtime.
The DAI of the processor connects to the AD1835A audio codec and the
CS8416 S/PDIF receiver. These devices facilitate creation of digital and
analog audio signal processing applications. See “Analog Audio Interface”
on page 1-13 and “Digital Audio Interface” on page 1-14 for more
information.
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. See “Expansion Interface” on page 2-7 for details.
Purpose of This Manual
The ADSP-21262 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-21262 EZ-KIT
Lite. Finally, a schematic and a bill of materials are provided as a reference
for future designs.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set.
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
Preface
Programmers who are unfamiliar with Analog Devices processors can use
this manual but should supplement it with other texts that describe your
target architecture. For the locations of these documents, see “Related
Documents”.
Programmers who are unfamiliar with CCES or VisualDSP++ should refer
to the online help and the user’s manuals.
Manual Contents
The manual consists of:
• Chapter 1, “Using the ADSP-21262 EZ-KIT Lite” on page 1-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and provides an easy-to-access memory map.
• Chapter 2, “ADSP-21262 EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the EZ-KIT Lite hardware components.
• Appendix A, “ADSP-21262 EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
• Appendix B, “ADSP-21262 EZ-KIT Lite Schematic” on page B-1
Provides the resources to allow board-level debugging or to use as a
reference guide. Appendix B is part of the online help.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
xiii
What’s New in This Manual
What’s New in This Manual
This is revision 3.2 of the ADSP-21262 EZ-KIT Lite Evaluation System
Manual. The manual has been updated to include CCES information. In
addition, modifications and corrections based on errata reports against the
previous manual revision have been made.
For the latest version of this manual, please refer to the Analog Devices
Web site.
Technical Support
You can reach Analog Devices processors and DSP technical support in
the following ways:
• Post your questions in the processors and DSP support community
at EngineerZone®:
http://ez.analog.com/community/dsp
• Submit your questions to technical support directly at:
http://www.analog.com/support
• E-mail your questions about processors, DSPs, and tools development software from CrossCore Embedded Studio or
VisualDSP++:
Choose Help > Email Support. This creates an e-mail to
[email protected] and automatically attaches
your CrossCore Embedded Studio or VisualDSP++ version information and license.dat file.
• E-mail your questions about processors and processor applications
to:
[email protected] or
[email protected] (Greater China support)
xiv
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Preface
• In the USA only, call 1-800-ANALOGD (1-800-262-5643)
• Contact your Analog Devices sales office or authorized distributor.
Locate one at:
www.analog.com/adi-sales
• Send questions by mail to:
Processors and DSP Technical Support
Analog Devices, Inc.
Three Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
The ADSP-21262 EZ-KIT Lite evaluation system supports the Analog
Devices ADSP-21262 SHARC processors.
Product Information
Product information can be obtained from the Analog Devices Web site
and the online help system.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
ADSP-21262 EZ-KIT Lite Evaluation System Manual
xv
Product Information
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, myAnalog is a free feature of the Analog Devices Web site that
allows customization of a Web page to display only the latest information
about products you are interested in. You can choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests, including documentation errata against all manuals.
myAnalog provides access to books, application notes, data sheets, code
examples, and more.
Visit myAnalog (found on the Analog Devices home page) to sign up. If
you are a registered user, just log on. Your user name is your e-mail
address.
EngineerZone
EngineerZone is a technical support forum from Analog Devices. It allows
you direct access to ADI technical support engineers. You can search
FAQs and technical information to get quick answers to your embedded
processing and DSP design questions.
Use EngineerZone to connect with other DSP developers who face similar
design challenges. You can also use this open forum to share knowledge
and collaborate with the ADI support team and your peers. Visit
http://ez.analog.com to sign up.
xvi
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Preface
Related Documents
For additional information about the product, refer to the following
publications.
Table 1. Related Processor Publications
Title
Description
ADSP-21261/ADSP-21262/ADSP-21266 SHARC General functional description, pinout, and
Processor Data Sheet
timing of the processor
ADSP-2126x SHARC Processor Hardware Reference Description of the internal processor architecture, registers, all peripheral functions,
and all allowed processor assembly instructions
you plan to use the EZ-KIT Lite board in conjunction with a
 IfJTAG
emulator, also refer to the documentation that accompanies
the emulator.
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example
Description
Close command
(File menu)
Titles in reference sections indicate the location of an item within the
development environment’s menu system (for example, the Close command appears on the File menu).
{this | that}
Alternative required items in syntax descriptions appear within curly
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
[this | that]
Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
xvii
Notation Conventions
Example
Description
[this,…]
Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
.SECTION
Commands, directives, keywords, and feature names are in text with
letter gothic font.
filename
Non-keyword placeholders appear in text with italic style format.
xviii

Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.

Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.

Warning: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Warning
appears instead of this symbol.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1 USING THE ADSP-21262
EZ-KIT LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-21262 EZ-KIT Lite evaluation system.
The information appears in the following sections.
• “Package Contents” on page 1-3
Lists the items contained in your EZ-KIT Lite package.
• “Default Configuration” on page 1-3
Shows the default configuration of the EZ-KIT Lite board.
• “CCES Install and Session Startup” on page 1-4
Instructs how to start a new or open an existing EZ-KIT Lite session using CCES.
• “VisualDSP++ Install and Session Startup” on page 1-8
Instructs how to start a new or open an existing EZ-KIT Lite session using VisualDSP++.
• “CCES Evaluation License” on page 1-10
Describes the CCES demo license shipped with the EZ-KIT Lite.
• “VisualDSP++ Evaluation License” on page 1-11
Describes the VisualDSP++ demo license shipped with the EZ-KIT
Lite.
• “External Memory” on page 1-12
Describes how to access external memory and defines the memory
map of the EZ-KIT Lite.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-1
• “Analog Audio Interface” on page 1-13
Describes how to set up and communicate with the on-board audio
codec.
• “Digital Audio Interface” on page 1-14
Describes how to use the on-board Sony/Philips Digital Interface
(S/PDIF) receiver.
• “LEDs and Push Buttons” on page 1-15
Describes how to configure use the on-board LEDs and bush
buttons.
• “Example Programs” on page 1-17
Provides information about example programs included in the
evaluation system.
• “Board Design Database” on page 1-17
Highlights the available technical resources for the design, layout,
fabrication, and assembly of the EZ-KIT Lite.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online help.
For detailed information on how to program the ADSP-21262 SHARC
processor, refer to the documents referenced in “Related Documents”.
1-2
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
Package Contents
Your ADSP-21262 EZ-KIT Lite evaluation system package contains the
following items.
• ADSP-21262 EZ-KIT Lite board
• Universal 7V DC power supply
• USB 2.0 cable
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges. Proper
ESD precautions are recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards in the protective
shipping package.
The ADSP-21262 EZ-KIT Lite board is designed to run outside your personal computer as a standalone unit. You do not have to open your
computer case.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components. Figure 1-1 shows the default connector locations
and LEDs used in installation. Confirm that your board is set up in the
default configuration before using the board.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-3
CCES Install and Session Startup
Figure 1-1. EZ-KIT Lite Hardware Setup
CCES Install and Session Startup
For information about CCES and to download the software, go to
www.analog.com/CCES. A link for the ADSP-21262 EZ-KIT Lite Board
Support Package (BSP) for CCES can be found at
http://www.analog.com/SHARC/EZKits.
Follow these instructions to ensure correct operation of the product software and hardware.
1-4
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
Step 1: Connect the EZ-KIT Lite board to a personal computer (PC) running CCES using one of two options: an Analog Devices emulator or via
the debug agent.
Using an Emulator:
1. Plug one side of the USB cable into the USB connector of the emulator. Plug the other side into a USB port of the PC running
CCES.
2. Attach the emulator to the header connector ZP4 (labeled JTAG) on
the EZ-KIT Lite board.
Using the on-board Debug Agent:
1. Plug one side of the USB cable into the USB connector of the
debug agent ZJ1 (labeled USB).
2. Plug the other side of the cable into a USB port of the PC running
CCES.
Step 2: Attach the provided cord and appropriate plug to the 7V power
adaptor.
1. Plug the jack-end of the power adaptor into the power connector
J7 on the EZ-KIT Lite board.
2. Plug the other side of the power adaptor into a power outlet. The
power LED (labeled LED10) is lit green when power is applied to
the board.
3. Power the emulator (if used). Plug the jack-end of the assembled
power adaptor into the emulator and plug the other side of the
power adaptor into a power outlet. The enable/power indicator is
lit green when power is applied.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-5
CCES Install and Session Startup
Step 3 (if connected through the debug agent): Verify that the yellow
USB monitor LED (labeled ZLED3)and the green power LED (labeled
ZLED4) on the debug agent are both on. This signifies that the board is
communicating properly with the host PC and ready to run CCES.
Session Startup
It is assumed that the CrossCore Embedded Studio software is installed
and running on your PC.
If you connect the board or emulator first (before installing
 Note:
CCES) to the PC, the Windows driver wizard may not find the
board drivers.
1. Navigate to the CCES environment via the Start menu.
Note that CCES is not connected to the target board.
2. Use the system configuration utility to connect to the EZ-KIT Lite
board.
If a debug configuration exists already, select the appropriate
configuration and click Apply and Debug or Debug. Go to step 8.
To create a debug configuration, do one of the following:
• Click the down arrow next to the little bug icon, select
Debug Configurations
• Choose Run > Debug Configurations.
The Debug Configuration dialog box appears.
3. Select CrossCore Embedded Studio Application and click
(New launch configuration).
The Select Processor page of the Session Wizard appears.
1-6
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
4. Ensure Blackfin is selected in Processor family. In Processor type,
select ADSP-21262. Click Next.
The Select Connection Type page of the Session Wizard appears.
5. Select one of the following:
• For standalone debug agent connections, EZ-KIT Lite and
click Next.
• For emulator connections, Emulator and click Next.
The Select Platform page of the Session Wizard appears.
6. Do one of the following:
• For standalone debug agent connections, ensure that the
selected platform is ADSP-21262 EZ-KIT Lite via Debug
Agent.
• For emulator connections, choose the type of emulator that
is connected to the board.
7. Click Finish to close the wizard.
The new debug configuration is created and added to the program(s) to load list.
8. In the Program(s) to load section, choose the program to load
when connecting to the board. If not loading any program upon
connection to the target, do not make any changes.
Note that while connected to the target, there is no way to choose a
program to download. To load a program once connected, terminate the session.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-7
VisualDSP++ Install and Session Startup
a configuration, go to the Debug Configurations dialog
 Toboxdelete
and select the configuration to delete. Click
and choose Yes
when asked if you wish to delete the selected launch configuration.
Then Close the dialog box.
from the target board, click the terminate button
 To(reddisconnect
box) or choose Run > Terminate.
To delete a session, choose Target > Session > Session List. Select
the session name from the list and click Delete. Click OK.
VisualDSP++ Install and Session Startup
For information about VisualDSP++ and to download the software, go to
www.analog.com/VisualDSP.
1. Plug the provided power supply into J7 on the EZ-KIT Lite board.
Visually verify that the green power LED (LED10) is on.
2. Verify that the red reset LED (LED9) goes on for a moment and
then goes off, and, finally, LED1 through LED8 are blinking
sequentially.
3. Connect one end of the USB cable to an available full speed USB
port on your PC and the other end to ZJ1 on the ADSP-21262
EZ-KIT Lite board.
4. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
1-8
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
Session Startup
1. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start > Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 2.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 3.
2. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
• From the Session menu, New Session.
• From the Session menu, Session List. Then click New Session from the Session List dialog box.
• From the Session menu, Connect to Target.
3. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target
processor, select ADSP-21262. Click Next.
4. The Select Connection Type page of the wizard appears on the
screen. Select EZ-KIT Lite and click Next.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-9
CCES Evaluation License
5. The Select Platform page of the wizard appears on the screen.
In the Select your platform list, select ADSP-21262 EZ-KIT Lite
via Debug Agent. In Session name, highlight or specify the session
name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and open a new
session.
Click Next.
6. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied,
click Back to make changes; otherwise, click Finish. VisualDSP++
creates the new session and connects to the EZ-KIT Lite. Once
connected, the main window’s title is changed to include the session name set in step 5.
disconnect from a session, click the disconnect button
 Toor select
Session > Disconnect from Target.
To delete a session, select Session > Session List. Select the session
name from the list and click Delete. Click OK.
CCES Evaluation License
The ADSP-21262 EZ-KIT Lite software is part of the Board Support
Package (BSP) for the SHARC ADSP-2126x family. The EZ-KIT Lite is a
licensed product that offers an unrestricted evaluation license for 90 days
after activation. Once the evaluation period ends, the evaluation license
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
becomes permanently disabled. If the evaluation license is installed but
not activated, it allows 10 days of unrestricted use and then becomes disabled. The license can be re-enabled by activation.
An evaluation license can be upgraded to a full license. Licenses can be
purchased from:
• Analog Devices directly. Call (800) 262-5645 or 781-937-2384 or
go to:
http://www.analog.com/buyonline.
• Analog Devices, Inc. local sales office or authorized distributor. To
locate one, go to:
http://www.analog.com/salesdir/continent.asp.
EZ-KIT Lite hardware must be connected and powered up to
 The
use CCES with a valid evaluation or full license.
VisualDSP++ Evaluation License
The ADSP-21262 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
• VisualDSP++ allows a connection to the ADSP-21262 EZ-KIT
Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed.
• The linker restricts a users program to 10922 words of memory for
code space with no restrictions for data space.
avoid errors when opening VisualDSP++, the EZ-KIT Lite
 Tohardware
must be connected and powered up. This is true for using
VisualDSP++ with a valid evaluation or full license.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-11
External Memory
External Memory
The EZ-KIT Lite contains three types of memory: parallel flash (1 MB),
serial peripheral interconnect (SPI) flash (2M bit), and synchronous random access memory (SRAM) (512K bit). Flash memories can store
user-specific boot code, allowing the board to run as a standalone unit.
For more information about setting the boot device for the processor, see
“Boot Mode and Clock Ratio Select Switch (SW10)” on page 2-11.
Table 1-1 provides a map of the board’s external memory.
Table 1-1. EZ-KIT Lite Evaluation Board External Memory
Start Address
End Address
Content
0x0100 0000
0x010F FFFF
Flash memory
0x0120 0000
0x012F FFFF
SRAM memory
0x0140 0000
0x0140 FFFF
LEDs; see “LEDs and Push Buttons” on page 1-15.
0x0160 0000
0x017F FFFF
Unused chip select 1
0x0180 0000
0x019F FFFF
Unused chip select 2
The parallel flash memory and the SRAM connect to the parallel port of
the processor. The parallel port is a multiplexed address and data port.
The port can connect to 8-bit and 16-bit memory devices. When configuring the parallel port, keep in mind that the memory devices on the
board are 8 bits wide.
To access the SRAM and flash memories, set up a parallel port DMA. For
more information on how to connect the SRAM and flash memories, see
“Parallel Port” on page 2-3.
The SPI flash memory connects to the processor’s SPI port and uses FLAG0
as a chip select. In order for FLAG0 to behave as a chip select, clear the
PPFLG bit in the SYSCTL register.
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how the parallel port and SPI port can be configured to
access the memories.
Analog Audio Interface
The AD1835A is a high-performance, single-chip codec featuring four stereo digital-to-analog converters (DAC) for audio output and one stereo
analog-to-digital converters (ADC) for audio input. The codec can input
and output data with a sample rate of up to 96 kHz on all channels. A
192 kHz sample rate can be used with the one of the DAC channels.
The processor is interfaced with the AD1835A via the digital audio interface (DAI) port. The DAI interface pins can be configured to transfer
serial data from the AD1835A codec in either time-division multiplexed
(TDM) or 2-wire interface (TWI) mode. For more information on how
the AD1835A connects to the DAI, see “DAI Interface” on page 2-4.
The master input clock (MCLK) for the AD1835A can be generated by the
on-board 12.288 MHz oscillator or can be supplied by one of the DAI
pins of the processor. Using one if the pins to generate the MCLK, as
opposed to the on-board oscillator, allows synchronization of multiple
devices in the system. This is done on the EZ-KIT Lite when data is coming from the S/PDIF receiver and being output through the audio codec.
The S/PDIF MCLK is routed to the AD1835A MCLK in the processor’s signal
routing unit (SRU). It is also necessary to disable the on-board audio
oscillator from driving the audio codec and the processor’s input pin. For
instructions on how to configure the clock, refer to “Codec Setup Switch
(SW7)” on page 2-8.
The AD1835A codec can be configured as a master or as a slave, depending on the DIP switch settings (SW7). In master mode, the AD1835A
drives the serial port clock and frame sync signals to the processor. In slave
mode, the processor must generate and drive all of the serial port clock
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-13
Digital Audio Interface
and frame sync signals. For information on how to set the mode, refer to
“Codec Setup Switch (SW7)” on page 2-8.
The AD1835A audio codec’s internal configuration registers are configured using the processor’s SPI port. The FLAG3 register is used as the select
for the device. For information on how to configure the multichannel
codec, refer to the product data sheet at AD1835A.
The RCA connector (J4) is used to input analog audio. When using an
electret microphone on this connector, configure the SW6 switch according
the instructions in “Electret Microphone Select Switch (SW6)” on
page 2-8. The four output channels connect to the RCA connector J5.
Channel 4 of the codec connects to the headphone jack J6. For more
information about the connectors, see “Connectors” on page 2-16.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
Digital Audio Interface
The CS8416 is a monolithic complementary metal oxide semiconductor
(CMOS) device which receives and decodes one of eight channels of audio
data according to IEC60958, S/PDIF, EIAJ CP1201, or AES3 interface
standards. The CS8416 receives data from a transmission line, recovers
the clock and synchronization signals, and de-multiplexes the audio and
digital data.
The CS8416 is attached to the DAI port of the processor. The configuration registers of the S/PDIF receiver are programmed via an SPI, which is
connected to the processor’s SPI. The S/PDIF receiver is capable of transmitting a variety of data formats, which are set up via the SPI interface.
For more information about the CS8416 and DAI connection, see “DAI
Interface” on page 2-4.
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
The S/PDIF input signal is input on J8 via a coax connector.
To output the audio received by the CS8416 via the AD1835A audio
codec, the master clock of both chips must be synchronized to prevent the
loss of samples. Put the AD1835A in slave mode and disconnect the
12.288 MHz oscillator from the master clock (MCLK) input (see “Codec
Setup Switch (SW7)” on page 2-8 for how to).
The CS8416 genera- purpose output 1 (GPO1) is connected to LED11, and
can be configured, via the SPI, to indicate a variety of conditions within
the S/PDIF receiver.
Shipped with the kit example programs demonstrate how to configure and
use the board’s digital audio interface.
LEDs and Push Buttons
The EZ-KIT Lite has eight general-purpose user LEDs and four general-purpose push buttons.
Two of the general-purpose push buttons are attached to the processor’s
FLAG pins, while the other two are attached to the DAI pins. All of the
push buttons connect to the processor through a DIP switch. See “Push
Button Enable Switch (SW9)” on page 2-11 for instructions on how to
disable the push buttons from driving the corresponding processor pins.
The value of the push buttons connected to the FLAG pins can be determined by reading the FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-2 shows how each
push button connects to the processor. Refer to the related example program shipped with the EZ-KIT Lite for more information.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-15
LEDs and Push Buttons
Table 1-2. Push Button Connections
Push Button Reference Designator
Processor Pin
SW1
FLAG1
SW2
FLAG2
SW3
DAI_P19
SW4
DAI_P20
The LEDs connect to the parallel port pins, AD7–0, via a latch. The parallel
port of the processor can be set up as a memory bus or as general-purpose
FLAG pins. The latch allows the LEDs to be written to in both cases. Information about setting up the latch can be found in “Push Button Enable
Switch (SW9)” on page 2-11.
When the LEDs are accessed as FLAG pins, the latch must be set up to pass
through the data on the processor’s pins AD7–0. In this mode, it is also necessary to set up the parallel port to be FLAG pins. To set up the parallel port
as FLAG pins, set the PPFLG bit in the SYSCTL register. Table 1-3 summarizes the LED and FLAG connections.
Table 1-3. LED Connections
LED Reference Designator Processor Pin
Mapped as Flag
LED1
AD0
FLAG8
LED2
AD1
FLAG9
LED3
AD2
FLAG10
LED4
AD3
FLAG11
LED5
AD4
FLAG12
LED6
AD5
FLAG13
LED7
AD6
FLAG14
LED8
AD7
FLAG15
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ADSP-21262 EZ-KIT Lite Evaluation System Manual
Using the ADSP-21262 EZ-KIT Lite
An example program is included in the EZ-KIT Lite installation directory
to demonstrate functionality of the LEDs and push buttons.
Example Programs
Example programs are provided with the ADSP-21262 EZ-KIT Lite to
demonstrate various capabilities of the product. The programs are
included in the product installation kit and can be found in the Examples
folder of the installation. Refer to a readme file provided with each example for more information.
CCES users are encouraged to use the example browser to find examples
included with the EZ-KIT Lite Board Support Package.
Board Design Database
A .zip file containing all of the electronic information required for the
design, layout, fabrication and assembly of the product is available for
download from the Analog Devices board design database at:
http://www.analog.com/sharc-board-design-database.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
1-17
Board Design Database
1-18
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2 ADSP-21262 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21262 EZ-KIT
Lite board. The following topics are covered.
• “System Architecture” on page 2-2
Describes the ADSP-21262 board configuration and explains how
the board components interface with the processor.
• “Switch Settings” on page 2-8
Shows the locations and describes the board switches.
• “LEDs and Push Buttons” on page 2-13
Shows the locations and describes the LEDs and push buttons.
• “Connectors” on page 2-16
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board.
Figure 2-1. System Architecture Block Diagram
This EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-21262 processor. The processor core is powered at 1.2V, and the
IO is powered at 3.3V. Two 0-ohm resistors give access to the processor’s
power planes and allow to measure the power consumption of the processor. The R79 resistor provides access to the IO voltage of the processor,
2-2
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ADSP-21262 EZ-KIT Lite Hardware Reference
and the R80 resistor provides access to the core voltage plane of the
processor.
The CLKIN pin of the processor connects to a 25 MHz oscillator. The core
frequency of the processor is derived by multiplying the frequency at the
CLKIN pin by a value determined by the state of the processor pins,
CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of
the SW10 switch (see “Boot Mode and Clock Ratio Select Switch (SW10)”
on page 2-11). By default, the EZ-KIT Lite gives a core frequency of
200 MHz.
The SW10 switch also configures the boot mode of the processor. The
EZ-KIT Lite is capable of parallel port boot and serial port interconnect
(SPI) master boot. By default, the EZ-KIT Lite boots from the parallel
port. For information about configuring the boot modes, see “Boot Mode
and Clock Ratio Select Switch (SW10)” on page 2-11.
Parallel Port
The parallel port (PP) of the ADSP-21262 processor consists of a 16-bit
multiplex address/data memory bus (AD15–0) and an address latch-enable
pin (ALE). The interface does not have any memory select pins; these signals must be generated by decoding the address.
The PP connections to the EZ-KIT Lite are shown in Figure 2-2. The PP
connects to an 8-bit parallel flash memory, an 8-bit SRAM memory, and
eight general-purpose LEDs. The upper three address bits connect to a
3-to-8 decoder, providing eight memory select pins. See “External Memory” on page 1-12 for more information about accessing flash and
SDRAM memories.
Because the PP is a multiplexed address/data memory bus, two 8-bit
latches are used to latch the upper address bits. Additional latch is used to
drive the LEDs. The latter allows the LED values to be written to as if
they were at a memory location. For more information about using the
LEDs, refer to the “LEDs and Push Buttons” on page 1-15.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-3
System Architecture
A23
A22
A21
AD15-0
D
ALE
0
1
2
3
4
5
6
7
138
3->8
DEC
1MB
FLASH
D7-0
LE
FLAS H_C S
D0- 7
CS
Op ening the switch
puts latch alw ays in
Transpa rent M ode
SR AM _CS
D
A8-18
A0-7
512KB
SRAM
D7-0
CS
SR AM _CS
Expansion
Interface
FLASH_C S
S RA M_CS
LE D_CS
A8-19
A0-7
Q
373
8-bit Latch
(2)
DSP
C
B
A
Q
8 LED s
373
8-bit
Latch
LE
WR
Figure 2-2. Parallel Port Connections Block Diagram
All of the PP signals are available externally via the expansion interface
connectors (J1–3). The pinout of the connectors can be found in
“ADSP-21262 EZ-KIT Lite Schematic” on page B-1.
DAI Interface
The pins of the digital audio interface (DAI) connect to the signal routing
unit (SRU). The SRU is a flexible routing system, providing a large system
of signal flows within the processor. In general, the SRU allows to route
the DAI pins to different internal peripherals in various combinations.
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ADSP-21262 EZ-KIT Lite Hardware Reference
The DAI pins connect to the AD1835A audio codec, the CS8414 S/PDIF
receiver, the audio oscillator output, and two push buttons. Figure 2-3
illustrates the EZ-KIT Lite connections to the DAI.
Figure 2-3. DAI Connections Block Diagram
Refer to “Analog Audio Interface” on page 1-13 and “Digital Audio Interface” on page 1-14 for more information about setting the processor to
communicate with these devices.
To use the DAI for a different purpose, disable any signal, which is driving the DAI pins, with a switch. See “Codec Setup Switch (SW7)” on
page 2-8 and “S/PDIF Signal Enable Switch (SW8)” on page 2-10 for
how to information. In addition, the codec setup switch allows flexible
routing of the 12.288 MHz audio oscillator’s output signal. By default,
this signal is used as the master clock (MCLK) for the AD1835A codec.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-5
System Architecture
SPI Interface
The processor’s serial peripheral interconnect (SPI) interface connects to
an SPI flash memory, the CS8416 S/PDIF receiver, and the AD1835A
audio codec. The FLAG0 pin is used as a memory select for accessing the
SPI flash memory, and the FLAG3 pin is used for accessing the AD1835A’s
configuration registers.
The SPI chip select lines for the SPI flash memory and the AD1835A
audio codec connect to the processor via switch SW12 pins 1 and 3. The
default for SW12 is all positions ON. The switch disables the SPI devices on
the EZ-KIT Lite, allowing the same flag pins to be driven on the expansion interface
All of the SPI signals are available externally via the expansion interface
connectors (J1–3), as well as the 0.1’ spaced header P2. The pinout of
these connectors can be found in “ADSP-21262 EZ-KIT Lite Schematic”
on page B-1.
Flag Pins
The processor has four general-purpose IO flag pins. Table 2-1 describes
the connection of each flag.
Table 2-1. IO Flag Pins
2-6
Flag Pin
EZ-KIT Lite Function
FLAG0
SPI flash chip select
FLAG1
Push button (SW1) input
FLAG2
Push button (SW2) input
FLAG3
AD1835A SPI interface chip select
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Hardware Reference
For information on how to disable the push buttons from driving the corresponding processor flag pin, see section “Push Button Enable Switch
(SW9)” on page 2-11.
The flag signals are available externally via the expansion interface connectors (J3–1). The pinout of these connectors can be found in
“ADSP-21262 EZ-KIT Lite Schematic” on page B-1.
Expansion Interface
The expansion interface consists of the three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of these
connectors, refer to “ADSP-21262 EZ-KIT Lite Schematic” on page B-1.
The mechanical dimensions of the connectors can be obtained from
Technical Support.
Table 2-2. Expansion Interface Connectors
Connector
Interfaces
J1
5V, AD15–0
J2
3.3V, FLAG3–0, DAI_P20–1, SPI
J3
5V, 3.3V, RESET, parallel port control signals
Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is
dependent on the capabilities of the used regulator. Additional circuitry
can also add extra loading to signals, decreasing their maximum effective
speed.
Devices does not support and is not responsible for the
 Analog
effects of additional circuitry.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-7
Switch Settings
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory through a 6-pin interface. The JTAG emulation port of the processor is also connected to the USB debugging
interface. When an emulator connects to the board at ZP4, the USB
debugging interface is disabled. This is not the standard connection of the
JTAG interface.
For information about the standard connection of the interface, see EE-68
published on the Analog Devices Web site. For more information about
the JTAG connector, see “JTAG Header (ZP4)” on page 2-21. To learn
more about SHARC processor emulators, go to
http://www.analog.com/processors/tools/sharc.
Switch Settings
Figure 2-4 shows the locations and default settings of the EZ-KIT Lite
switches.
Electret Microphone Select Switch (SW6)
To connect an electret microphone to the audio input, place all positions
of the SW6 switch ON. The default position of this switch is all OFF. When
all of the switches are in the ON position, a DC offset of 2.5V is added to
the signal, and gain of the input amplifiers is changed from 1x to 10x.
Codec Setup Switch (SW7)
The codec setup switch (SW7) can be used to change the routing of some of
the signals going to the AD1835A codec and to setup the communication
protocol of the codec.
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ADSP-21262 EZ-KIT Lite Hardware Reference
Figure 2-4. Switch Locations and Default Settings
Positions 1 and 2 determine the clock routing for the audio oscillator to
the codec and to the processor. Figure 2-5 illustrates how the switch
positions 1 and 2 are connected on the board. In the default position,
route the DAI_P17 pin to DAI_P6 (in software) to clock the AD1835A.
Position 3 of the SW7 switch determines if the AD1835A device is a master
or is a slave. If the AD1835A is a master, the device’s serial interface generates the frame sync and clock signals necessary to transfer data. When
the device is a slave, the processor must generate the frame sync and clock
signals. By default, position 3 is ON, and the AD1835A generates the control signals.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-9
Switch Settings
Position 4 of SW7 disconnects the AD1835A codec’s ADC_DATA pin from
the DAI interface. This is useful when the DAI interface is to connect to
another device.
ADSP-21262 Processor
AD1835A Codec
DAI_P6
MCLK
DAI_P17
SW7.1
12.288 MHz
OSC
SW7.2
Figure 2-5. Audio Clock Routing
S/PDIF Signal Enable Switch (SW8)
The S/PDIF signal enable switch (SW8) disconnects always driving signal
of the CS8416 S/PDIF receiver serial interface.
Table 2-3 shows which processor signal is no longer being driven when
the corresponding switch position is OFF.
Table 2-3. SW8 Connections
Switch Position
Processor Pin
S/PDIF RX Pin
1
DAI_P2
MCK
2
DAI_P1
SDATA
3
DAI_P4
FSYNC
4
DAI_P3
SCK
5
DAI_P15
SPI_CS
6
DAI_P16
GPO0
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ADSP-21262 EZ-KIT Lite Hardware Reference
Push Button Enable Switch (SW9)
The push button enable switch (SW9) disconnects the push buttons from
the corresponding processor pins. This allows the signals to be used for
another purpose. Table 2-4 shows the signal and SW9 connections. By
default, all of the position of the SW9 switch are ON, allowing the push buttons to function as designed.
Table 2-4. Push Button Enable Switch (SW9) Connections
Switch Position
Push Button Reference Designator
Processor Pin
1
SW1
FLAG1
2
SW2
FLAG2
3
SW3
DAI_P19
4
SW4
DAI_P20
Position 6 of SW9 connects or disconnects the latch-enable pin of the LED
to the logical OR of the WE and LED_CS signals. When position is OFF, the
latch-enable pin of the LED latch (U24) is always pulled high, making the
latch transparent. In this position, the value of the LEDs is directly connected to AD7–0. When position 6 is ON, the values of the LEDs are set by
writing to a memory location. The lower 8 bits of the data, written to the
address 0x1400 0000, set the values of the LEDs. By default, position 6 is
ON, allowing the LEDs to be written by writing to a memory address. For
more information refer to “LEDs and Push Buttons” on page 2-13.
Boot Mode and Clock Ratio Select Switch (SW10)
The SW10 switch sets the boot mode and clock multiplier ration. Table 2-5
shows how to set up the boot mode using positions 1 and 2. By default,
the EZ-KIT Lite boots in SPI master mode and parallel port mode, and
the processor boots from flash memory.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-11
Switch Settings
Table 2-5. Boot Mode Configuration
BOOTCFG1 Pin (Position 2)
BOOTCFG0 Pin (Position 1)
Boot Mode
OFF
OFF
SPI slave
OFF
ON
SPI master
ON
OFF
Parallel flash boot (default)
ON
ON
Internal
Table 2-6 shows how to set up the clock multiply ratio using positions 3
and 4. By default, the processor increases the clock multiply ratio by 8,
setting the core clock to 200 MHz.
Table 2-6. Core Clock Rate Configuration
CLKCFG1 (Position 4)
CLKCFG0 (Position 3)
Core to CLKIN Ratio
OFF
OFF
3:1
OFF
ON
16:1
ON
OFF
8:1 (default)
ON
ON
NA
Loop-Back Test Switch (SW11)
The loop-back test switch (SW11) connects to GPO1 of the CS8416. The
GPO1 functionality is programmable via SPI.
SPI Disable Switch (SW12)
The SPI interface switch (SW12) disables the SPI chip select lines connected to the SPI flash memory and the AD1835A audio codec. The
switch also disables the ADC_LRCLK and ADC_BCLK signals on the AD1835A
device. The switch allows a customer to re-use the same pins on the SPI
interface and on the expansion interface. The SW12 default is all positions
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ADSP-21262 EZ-KIT Lite Hardware Reference
ON,
unless any of the switch signals or the SPI interface signals are used on
the expansion connector or via an EZ-Extender®.
LEDs and Push Buttons
This section describes functionality of the LEDs and push buttons.
Figure 2-6 shows the locations of the LEDs and push buttons.
Figure 2-6. LED and Push Button Locations
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-13
LEDs and Push Buttons
General Purpose LEDs (LED8–1)
Eight general-purpose LEDs are connected to the processor through a
latch on signals AD7–0. These LEDs can be accessed by writing to the FLAG
registers or by writing to a memory address. Refer to “LEDs and Push
Buttons” on page 1-15 for more information.
Reset LED (LED9)
When LED9 is lit (red), a master reset of all the major ICs is active.
Power LED (LED10)
When LED10 is lit (green), it indicates that power is being properly supplied to the board.
S/PDIF GPO1 LED (LED11)
The S/PDIF GPO1 LED (LED11) connects to the GPO1 signal of the CS8416.
The GPO1 functionality is programmable via SPI.
USB Monitor LED (ZLED3)
The USB monitor LED (ZLED3) indicates that USB communication has
been initialized successfully and you may connect to the processor using
an EZ-KIT Lite session. Once the USB cable is plugged into the board, it
takes approximately 15 seconds for the USB monitor LED to light. If the
LED does not light, try cycling power on the board and/or reinstalling the
USB driver.
the development software is actively communicating with
 When
the EZ-KIT Lite target board, the LED can flicker, indicating
communications handshake.
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ADSP-21262 EZ-KIT Lite Hardware Reference
Push Buttons (SW4–1)
Four push buttons (SW4–1) are provided for general-purpose user input.
Two of the push buttons connect to the processor’s FLAG pins. The other
two connect to the processor’s DAI. The push buttons are active high and,
when pressed, send a high (1) to the processor. Refer to “LEDs and Push
Buttons” on page 1-15 for more information. The push button enable
switch (SW9) is capable of disconnecting the push buttons from the corresponding processor pin (refer to “Push Button Enable Switch (SW9)” on
page 2-11 for more information). The processor signals and corresponding push buttons are summarized in Table 2-7.
Table 2-7. Push Button Connections
Processor
Signal
Push Button Reference Designator Processor
Signal
Push Button Reference
Designator
FLAG1
SW1
DAI_P19
SW3
FLAG2
SW2
DAIP_20
SW4
Board Reset Push Button (SW5)
The RESET push button (SW5) resets all of the ICs on the board.
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-15
Connectors
Connectors
This section describes the connector functionality and provides information about mating connectors. Figure 2-7 shows the connector locations.
Figure 2-7. Connector Locations
2-16
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Hardware Reference
Expansion Interface (J1–3)
Three board-to-board connectors (J1–3) provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the expansion interface, see
“Expansion Interface” on page 2-7. For the connectors availability and
pricing, contact Samtec.
Part Description
Manufacturer
Part Number
90-position 0.05’’ spacing,
SMT (J1, J2, J3)
SAMTEC
SFC-145-T2-F-D-A
Mating Connectors
90-position 0.05’’ spacing
(through hole)
SAMTEC
TFM-145-x1 series
90-position 0.05” spacing
(surface mount)
SAMTEC
TFM-145-x2 series
90-position 0.05” spacing
(low cost)
SAMTEC
TFC-145 series
Audio In RCA Connector (J4)
Part Description
Manufacturer
Part Number
Two-channel right-angle RCA jack
SWITCHCRAFT
PJRAS1X2S02X
Mating Cable
Two-channel RCA interconnect
cable
MONSTER CABLE
ADSP-21262 EZ-KIT Lite Evaluation System Manual
BI100-1M
2-17
Connectors
Audio Out RCA Connector (J5)
Part Description
Manufacturer
Part Number
Six-channel right-angle RCA jack
SWITCHCRAFT
PJRAS4X2U01X
Mating Cable
Two-channel RCA interconnect
cable
MONSTER CABLE
BI100-1M
Headphone Out Jack (J6)
Part Description
Manufacturer
Part Number
3.5 mm stereo jack (J6)
A/D ELECTRONICS
ST-323-5
Power Jack (J7)
The power connector (J7) provides all of the power necessary to operate
the EZ-KIT Lite board.
Part Description
Manufacturer
Part Number
2.5 mm power jack (J7)
SWITCHCRAFT
DIGI-KEY
RAPC712X
RAPC712X-ND
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supply
2-18
CUI STACK
DMS070214-P6P-SZ
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Hardware Reference
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-8 shows the power supply specifications.
Table 2-8. Power Supply Specifications
Terminal
Connection
Center pin
+7 [email protected]
Outer ring
GND
S/PDIF Coax Connector (J8)
Part Description
Manufacturer
Part Number
Coaxial (J8)
SWITCHCRAFT
PJRAN1X1U01X
SPI Header (P2)
The SPI connector (P2) provides access to all of the SPI signals in the from
of a .1” spacing header. In addition, the FLAG1 signal can be used as a chip
select. If you are using FLAG1 as a chip select, disable the push button associated with the flag. For more information, see “Push Button Enable
Switch (SW9)” on page 2-11.
Part Description
Manufacturer
Part Number
6-pin IDC header (P2)
SULLINS
GEC03DAAN
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-19
Connectors
DAI Header (P3)
The DAI connector (P3) provides access to all of the DAI signals in the
from of a .1” spacing header. When using the header to access the processor’s DAI pins, ensure that signals, which normally drive the processor’s
DAI pins, are disabled. Refer to “Codec Setup Switch (SW7)” on page 2-8
for more information on how to disable signals already being driven from
elsewhere on the EZ-KIT Lite.
Part Description
Manufacturer
Part Number
26-pin IDC header (P3)
BERG
54102-T08-13LF
USB Connector (ZJ1)
The USB connector (ZJ1) allows to configure and program the processor.
Part Description
Manufacturer
Part Number
Type B USB receptacle (ZJ1)
MILL-MAX
DIGI-KEY
897-30-004-90-000
ED90064-N
2-20
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Hardware Reference
JTAG Header (ZP4)
The JTAG header (ZP4) is the connecting point for a JTAG in-circuit
emulator pod. When an emulator is connected to the JTAG header, the
USB debug interface is disabled.
3 is missing to provide keying. Pin 3 in the mating connector
 Pin
should have a plug.
using an emulator with the EZ-KIT Lite board, follow the
 When
connection instructions provided with the emulator.
Part Description
Manufacturer
Part Number
14-pin IDC header (ZP4)
FCI
68737-414HLF
ADSP-21262 EZ-KIT Lite Evaluation System Manual
2-21
Connectors
2-22
ADSP-21262 EZ-KIT Lite Evaluation System Manual
A ADSP-21262 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21262 EZ-KIT Lite Schematic” on page B-1.
Ref.
Qty.
Description
Reference
Designator
Manufacturer
1
1
74LVC14A
SOIC14
U33
TI
74LVC14AD
2
1
SN74AHC1G0
2 SOT23-5
U26
TI
SN74AHC1G02DBVRE4
3
1
25MHZ
OSC001
U16DIGI-KEY
DIGI-KEY
SGR-8002DC-PCC-ND
4
1
12.288MHZ
OSC003
U17
DIGI-KEY
SG-8002CA-PCC-ND(12
.288M)
5
1
74LVC138AD
SOIC16
U25
TI
SN74LVC138AD
6
3
74LVC373APW
TSSOP20
U18,U21,U24
TI
SN74LVC373APWRE4
7
1
IS61LV5128AL
TSOP44
U15
ISSI
IS61LV5128AL-10TLI
8
1
LTC1877
MSOP8
VR5
LINEAR TECH
LTC1877EMS8#PBF
9
1
CS8416-CS
SOIC28
U3
CIRRUS LOGIC
CS8416-CSZ
10
1
FDC658P
SOT23-6
U13
FAIRCHILD
FDC658P
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Part Number
A-1
A-2
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
11
1
21262 M25P20
"U12"
U12
ST MICRO
M25P20-VMN6TP
12
1
21262
AM29LV081B
"U19"
U19
AMD
AM29LV081-120ED
13
1
ADM708SARZ
SOIC8
U22
ANALOG
DEVICES
ADM708SARZ
14
1
AD8532ARZ
SOIC8
U10
ANALOG
DEVICES
AD8532ARZ
15
2
ADP3336ARM
Z MSOP8
VR1,VR4
ANALOG
DEVICES
ADP3336ARMZ-REEL
16
8
AD8606ARZ
SOIC8
U2,U4-9,U11
ANALOG
DEVICES
AD8606ARZ
17
1
ADSP-21262SK
BC-200
BGA136
U1
ANALOG
DEVICES
ADSP-21262SKBCZ200
18
1
AD1835AASZ
MQFP52
U14
ANALOG
DEVICES
AD1835AASZ
19
1
ADP1864
SOT23-6
VR2
ANALOG
DEVICES
ADP1864AUJZ-R7
20
5
RUBBER
FOOT
M1-5
MOUSER
517-SJ-5018BK
21
1
PWR
2.5MM_JACK
CON005
J7
SWITCHCRAFT
RAPC712X
22
1
RCA 4X2
CON011
J5
SWITCHCRAFT
PJRAS4X2U01X
23
1
RCA 1X1
CON012
J8
SWITCHCRAFT
PJRAN1X1U01X
24
5
MOMENTARY SWT013
SW1-5
PANASONIC
EVQ-PAD04M
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
25
3
.05 45X2
CON019
J1-3
SAMTEC
SFC-145-T2-F-D-A
26
1
DIP8 SWT016
SW11
C&K
TDA08H0SB1
27
2
DIP6 SWT017
SW8-9
CTS
218-6LPST
28
4
DIP4 SWT018
SW6-7,SW10,
SW12
ITT
TDA04HOSB1
29
1
RCA RCA_1X2
CON031
J4
SWITCHCRAFT
PJRAS1X2S02X
30
1
IDC 7X2
IDC7X2
ZP4
FCI
68737-414HLF
31
1
2.5A RESETABLE FUS001
F1
RAYCHEM
SMD250F-2
32
1
3.5MM
STEREO_JAC
K CON001
J6
A/D ELECTRONICS
ST-323-5
33
1
IDC 13x2
IDC13x2
P3
BERG
54102-T08-13LF
34
1
IDC 3X2
IDC3X2
P2
SULLINS
GEC03DAAN
35
1
0 1/4W 5%
1206
R82
KOA
0.0ECTRk7372BTTED
36
9
YELLOW
LED001
LED1-8,LED11
PANASONIC
LN1461C
37
8
330PF 50V 5%
0805
C104,C106,
C108,C110,
C112,C114,
C116,C118
AVX
08055A331JAT
38
13
0.01UF 100V
10% 0805
C66,C127,C153,
C155,C157-158,
C160-164,C182,
C188
AVX
08051C103KAT2A
ADSP-21262 EZ-KIT Lite Evaluation System Manual
A-3
A-4
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
39
8
0.22UF 25V
10% 0805
C77,C87,
C99-102,C111,
C131
AVX
08053C224FAT
40
14
0.1UF 50V 10%
0805
C1,C47,
C120-121,
C132-133,C141,
C148,C152,
C156,C186-187
AVX
08055C104KAT
41
6
1000PF 50V
5% 0805
C79,C82-83,C85,
C88,C98
AVX
08055A102JAT2A
42
21
10K 1/10W 5%
0805
R63-64,R66,R70,
R74,R76,R78,
R92,R96,R98,
R152,R159-164,
R171-174
VISHAY
CRCW080510K0JNEA
43
3
33 1/10W 5%
0805
R68,R81,R135
VISHAY
CRCW080533R0JNEA
44
2
4.7K 1/10W 5%
0805
R72,R176
VISHAY
CRCW08054K70JNEA
45
2
2.0K 1/8W 1%
1206
R3,R5
VISHAY
CRCW12062K00FKEA
46
10
49.9K 1/8W 1%
1206
R114-115,
R117-124
VISHAY
CRCW120649K9FKEA
47
12
100PF 100V
5% 1206
C2-12,C64
AVX
12061A101JAT2A
48
1
2.2UF 35V 10%
B
CT21
AVX
TAJB225K035R
49
2
10UF 16V 10%
B
CT13-14
AVX
TAJB106K016R
50
4
100 1/10W 5%
0805
R185-188
VISHAY
CRCW0805100RJNEA
51
2
301.0 1/4W 1%
1206
R1-2
VISHAY
CRCW1206301RFKEA
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
52
9
220PF 50V
10% 1206
C90-97,C183
AVX
12061A221JAT2A
53
1
2A S2A
DO-214AA
D2
MICRO COMM
S2A-TP
54
6
600 100MHZ
500MA 1206
FER1-2,FER5-8
STEWARD
HZ1206B601R-10
55
4
237.0 1/8W 1%
1206
R13-14,R18,R20
VISHAY
CRCW1206237RFKEA
56
2
750.0K 1/8W
1% 1206
R11,R116
VISHAY
CRCW1206750KFKEA
57
4
5.76K 1/8W 1%
1206
R6,R10,R19,R22
VISHAY
CRCW12065K76FKEA
58
1
3.01K 1/8W 1%
1206
R125
KOA
RK73H2BTTD3011F
59
10
11.0K 1/8W 1%
1206
R47,R49-50,
R52-53,R55-56,
R58,R113,R136
VISHAY
CRCW120611K0FKEA
60
5
1UF 16V 10%
0805
C39,C44,C48,
C56,C61
PANASONIC
ECJ2FB1E105K
61
1
75 1/8W 5%
1206
R112
VISHAY
CRCW120675R0JNEA
62
1
30PF 100V 5%
1206
C55
AVX
12061A300JAT2A
63
1
10 1/10W 5%
0805
R150
VISHAY
CRCW080510R0FKEA
64
1
249.0K 1/10W
1% 0805
R86
VISHAY
CRCW0805249KFKEA
65
1
124.0K 1/10W
1% 0805
R83
VISHAY
CRCW0805-124KFKEA
66
1
47.0K 1/10W
1% 0805
R17
VISHAY
CRCW080547K0FKEA
ADSP-21262 EZ-KIT Lite Evaluation System Manual
A-5
A-6
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
67
12
680PF 50V 1%
0805
C76,C80-81,C89,
C103,C105,
C107,C109,
C113,C115,
C117,C119
AVX
08055A681FAT2A
68
3
10UF 25V
+80-20% 1210
C46,C49,C75
PANASONIC
ECJ4YF1E106Z
69
8
2.74K 1/8W 1%
1206
R140-147
VISHAY
CRCW12062K74FKEA
70
20
5.49K 1/8W 1%
1206
R7,R15-16,R21,
R25,R28,R31,
R34,R37,R40,
R43,R46,R48,
R51,R54,R57,
R59-62
VISHAY
CRCW12065K49FKEA
71
8
1.65K 1/8W 1%
1206
R23,R26,R29,
R32,R35,R38,
R41,R44
VISHAY
CRCW12061K65FKEA
72
10
10UF 16V 20%
CAP002
CT1-9,CT12
PANASONIC
EEE1CA100SR
73
2
68UF 25V 20%
CAP003
CT10-11
PANASONIC
EEE-FC1E680P
74
1
2A SL22
DO-214AA
D1
DIGI-KEY
SL22-E3/1GI-ND
75
1
10UH 20%
IND001
L1
TDK
445-2014-1-ND
76
1
270 1/10W 5%
0805
R137
VISHAY
CRCW0805270RJNEA
77
10
0 1/10W 5%
0805
R4,R9,R12,R73,
R79-80,R90,
R126,R151,R192
VISHAY
CRCW08050000Z0EA
78
1
190 100MHZ
5A FER002
FER3
MURATA
DLW5BSN191SQ2
ADSP-21262 EZ-KIT Lite Evaluation System Manual
ADSP-21262 EZ-KIT Lite Bill Of Materials
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
79
8
3.32K 1/10W
1% 0805
R24,R27,R30,
R33,R36,R39,
R42,R45
PANASONIC
ERJ-6ENF3321V
80
4
1.2K 1/10W 5%
0805
R155-158
VISHAY
CRCW08051K20JNEA
81
6
10UF 6.3V 10%
0805
C26,C40,C50,
C52,C84,C145
AVX
080560106KAT2A
82
3
6.04K 1/10W
1% 0805
R65,R148-149
DIGI-KEY
311-6.04KCRCT-ND
83
7
0.1UF 10V 10%
0402
C41,C128-129,
C136,C140,
C142,C144
AVX
0402ZD104KAT2A
84
5
0.01UF 16V
10% 0402
C134,C138,
C147,C149,C151
AVX
0402YC103KAT2A
85
1
47UF 16V 10%
D
CT19
DIGI-KEY
478-1788-2-ND
86
8
1000PF 50V
5% 0402
C130,C135,
C137,C139,
C143,C146,
C150,C154
AVX
04025C102JAT2A
87
2
64.9K 1/10W
1% 0805
R67,R87
VISHAY
CRCW080564K9FKEA
88
2
210.0K 1/4W
1% 0805
R69,R88
VISHAY
CRCW0805210KFKEA
89
1
1A SK12
DO-214AA
D3
DIODES INC
B120B-13-F
90
1
0.022UF 50V
5% 0805
C65
AVX
08055C223JAT2A
91
1
68PF 50V 5%
0603
C16
AVX
06035A680JAT2A
92
1
470PF 50V 5%
0603
C15
AVX
06033A471JAT2A
ADSP-21262 EZ-KIT Lite Evaluation System Manual
A-7
A-8
Ref.
Qty.
Description
Reference
Designator
Manufacturer
Part Number
93
1
0 1/10W 5%
0603
R85
PHYCOMP
232270296001L
94
1
24.9K 1/10W
1% 0603
R84
DIGI-KEY
311-24.9KHTR-ND
95
1
47UF 6.3V 10%
B
CT20
PANASONIC
EEE0JA470WR
96
1
0.05 1/2W 1%
1206
R89
SUSUMA
RL16326-R051-F-N
97
1
10UF 16V 10%
1210
C17
AVX
1210YD106KAT2A
98
1
GREEN
LED001
LED10
PANASONIC
LN1361CTR
99
1
RED LED001
LED9
PANASONIC
LN1261CTR
100
2
1000PF 50V
5% 1206
C37-38
AVX
12065A102JAT2A
101
8
2200PF 50V
5% 1206
C67-74
AVX
12065A222JAT050
102
10
270 1/8W 5%
1206
R138-139,
R177-184
VISHAY
CRCW1206270RJNEA
103
8
604.0 1/8W 1%
1206
R127-134
PANASONIC
ERJ-8ENF6040V
104
4
1UF 20V 20%
A
CT15-18
AVX
TAJA105K020R
105
1
255.0K 1/10W
1% 0603
R93
VISHAY
CRCW06032553FK
106
1
80.6K 1/10W
1% 0603
R91
DIGI-KEY
311-80.6KHRCT-ND
107
1
6.8UH 25%
IND009
L2
DIGI-KEY
308-1328-1-ND
ADSP-21262 EZ-KIT Lite Evaluation System Manual
A
B
C
D
1
1
2
2
ADSP-21262 EZ-KIT Lite
Schematic
3
3
ANALOG
DEVICES
4
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
TITLE
Title
Size
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
1
of
11
A
B
C
D
3.3V
3.3V_DSP
1.2V_DSP
1.2V
1
1
D3
SK12
1A
DO-214AA
R79
0
0805
3.3V
R80
0
0805
3.3V_DSP
R152
10K
0805
U1
DSP OSC
OE
AD[0:15]
R68
33
0805
U16
1
U1
OUT
5
DSP_CLKIN
25MHZ
OSC001
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
2
AD0
M1
AD1
L2
AD2
L1
AD3
K1
P7
AD0
DAIP1/SD0A
AD1
DAIP2/SD0B
J2
AD5
J1
AD6
H1
AD7
G1
AD8
N6
AD9
P6
AD10
P5
AD11
P4
AD12
P3
AD13
P2
AD14
P1
AD15
N1
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
N3
RD
RD
M2
WE
WR
N2
ALE
ALE
B3
VDDEXT1
B8
VDDEXT2
G13
VDDEXT3
H2
VDDEXT4
N5
VDDEXT5
N9
VDDEXT6
DAIP2_SPDIF_MCLK
P8
DAIP3/SCLK0
N10
DAIP4/SFS0
P9
DAIP5/SD1A
P10
DAIP6/SD1B
P11
DAIP7/SCLK1
P12
DAIP8/SFS1
P13
DAIP9/SD2A
N14
DAIP10/SD2B
P14
DAIP11/SD3A
M13
DAIP12/SD3B
M14
DAIP13/SCLK23
L14
DAIP14/SFS23
K14
DAIP15/SD4A
J14
DAIP16/SD4B
H14
DAIP17/SD5A
H13
DAIP18/SD5B
G14
DAIP19/SCLK45
F14
DAIP20/SFS45
AD2
AD4
DAIP1_SPDIF_DATA
N8
DAIP3_SPDIF_SCK
DAIP4_SPDIF_FSYNC
1.2V_DSP
DAIP5_ADC_DATA
DAIP6_AD1835_MCLK
D11
GND16
D13
GND17
E2
GND18
E4
GND19
E5
GND20
E6
GND21
DAIP7_ADC_BCLK
E9
GND22
DAIP8_ADC_LRCLK
DAIP9_DAC_D4
DAIP10_DAC_D3
DAIP11_DAC_D2
DAIP12_DAC_D1
3.3V
DAIP13_DAC_BCLK
DAIP14_DAC_LRCLK
DAIP15_SPDIF_SPI_CS
Place as close as possible to pin B07 and B06 of DSP
DAIP16_SPDIF_GPO0
DAIP17_AUDIO_OSC
R78
10K
0805
DAIP18_SPDIF_IN
R150
10
0805
DAIP19_SW3
DAIP20_SW4
A12
VDDINT1
B11
VDDINT2
C14
VDDINT3
D1
VDDINT4
D14
VDDINT5
E1
VDDINT6
G2
VDDINT7
J13
VDDINT8
K2
VDDINT9
N4
VDDINT10
N7
VDDINT11
N11
VDDINT12
N12
VDDINT13
E10
GND23
E11
GND24
E13
GND25
F4
GND26
2
F5
GND27
F6
GND28
F9
GND29
F10
GND30
F11
GND31
J4
GND32
J5
GND33
J6
GND34
J9
GND35
J10
A8
EMU
A3
TMS
TMS
A4
TCK
TCK
B5
TRST
TRST
A5
TDI
CLKOUT
R72
4.7K
0805
B4
DSP_CLKIN
FLAG1_SW1
FLAG2_SW2
R158
1.2K
0805
FLAG3_AD1835_SPI_CS
1
R156
1.2K
0805
R155
1.2K
0805
8
2
7
3
6
4
5
2
3
4
RESET
R157
1.2K
0805
SW10
A1
CLKCFG0
B1
CLKCFG1
B10
C144
0.1UF
0402
FLAG0_SPI_FLASH_CS
ON
XTAL
SWT018
DIP4
ADSP-21262SKBC-200
BGA136
R159
10K
0805
R160
10K
0805
R161
10K
0805
SW10: BOOT/CLOCK RATIO SELECT
(Default: 1=OFF, 2=ON, 3=OFF, 4=ON)
1
2
BOOTCFG0 BOOTCFG1
BOOTMODE
OFF
OFF
SPI SLAVE BOOT
ON
OFF
SPI MASTER BOOT
OFF
ON
PARALLEL PORT BOOT
ON
ON
RESERVED
3
4
CLOCK RATIO
CLKCFG0 CLKCFG1
CORE:CLKIN
OFF
OFF
3:1
ON
OFF
16:1
OFF
ON
8:1
ON
ON
RESERVED
R162
10K
0805
C45
0.1UF
0805
DNP
3.3V_DSP
1.2V_DSP
3.3V
C140
0.1UF
0402
4
C146
1000PF
0402
C139
1000PF
0402
C137
1000PF
0402
C150
1000PF
0402
C138
0.01UF
0402
C149
0.01UF
0402
C129
0.1UF
0402
C136
0.1UF
0402
C145
10UF
0805
C135
1000PF
0402
C143
1000PF
0402
C154
1000PF
0402
C130
1000PF
0402
C151
0.01UF
0402
C134
0.01UF
0402
C128
0.1UF
0402
C142
0.1UF
0402
A13
GND1
A14
GND2
B2
GND3
B12
GND4
B13
GND5
B14
GND6
C3
GND7
C12
GND8
C13
GND9
D2
GND10
D4
GND11
D5
GND12
D6
GND13
D9
GND14
D10
GND15
ANALOG
DEVICES
K11
GND43
K13
GND44
L4
GND45
L5
GND46
L6
3
GND47
L9
GND48
L10
GND49
L11
GND50
L13
GND51
M3
GND52
M12
GND53
N13
GND54
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
DSP
Board No.
C
C
K10
GND42
DEFAULT
Date
B
K9
GND41
DEFAULT
Size
ADSP-21262
K6
GND40
ADSP-21262SKBC-200
BGA136
C26
10UF
0805
OSC
A
K4
GND38
GND39
Title
ADSP-21262
J11
GND37
K5
C147
0.01UF
0402
SPIDS
C2
BOOTCFG0
C1
BOOTCFG1
CLKIN
A2
RESET
B7
AVDD
B6
AVSS
SPICLK
1
3
3.3V
MOSI
F2
FLAG0
F1
FLAG1
F13
FLAG2
E14
FLAG3
TDO
A6
DSP_CLKOUT
MISO
TDI
A7
TDO
GND36
A10
MISO
A9
MOSI
B9
SPICLK
A11
SPIDS
EMU
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
2
of
11
A
B
C
D
3.3V
R163
10K
0805
U25
16
VCC
Y0
Y1
1
A[21:23]
VALID DSP ADDRESS BANK END
A23
START
END
ADDRESS
1A0 0000
X
1FF FFFF
1
180 0000
X
19F FFFF
1
160 0000
X
17F FFFF
0
140 0000
140 0000
15F FFFF
0
120 0000
127 FFFF 13F FFFF
0
100 0000
10F FFFF 11F FFFF
0
A21
1
A22
2
A23
3
A
Y2
B
Y3
C
Y4
Y5
Y6
6
G1
Y7
15
FLASH_CS
14
SRAM_CS
13
LED_CS
12
EXP_CS1
11
A22
0
1
1
0
0
A21 BANK
0
1
0
1
0
Y4
Y3
Y2
Y1
Y0
DEVICE
NONE
EXPANSION INTERFACE CS 2
EXPANSION INTERFACE CS 1
LEDs
SRAM
FLASH
3.3V
1
3.3V
R66
10K
0805
EXP_CS2
10
SPI Flash
2Mb
R64
10K
0805
U12
9
7
7
8
VCC
6
2
SO
HOLD
4
G2A
5
G2B
GND
8
SPICLK
SCK
MOSI
74LVC138AD
SOIC16
MISO
5
SI
1
SPI_FLASH_CS
CS
3
RESET
4
GND
WP
M25P20
SOIC8
3.3V
SRAM
4Mb (512K x 8-bit)
U21
2
AD[0:15]
AD0
3
AD1
4
AD2
7
AD3
8
AD4
13
AD5
14
AD6
17
AD7
18
U15
2
1Q
5
2Q
6
3Q
9
4Q
12
5Q
15
6Q
16
7Q
19
8Q
1D
2D
3D
4D
5D
6D
7D
8D
A8
A[8:23]
AD8
AD[8:15]
A9
AD9
A10
AD10
A11
AD11
A12
AD12
A13
AD13
A14
AD14
A15
AD15
A8
A[8:19]
11
ALE
LE
20
A9
10
A10
VCC
1
OE
GND
A11
74LVC373APW
TSSOP20
A12
A13
A14
A15
U18
A16
A17
AD8
3
3
2
1Q
5
2Q
6
3Q
9
4Q
12
5Q
15
6Q
16
7Q
19
8Q
1D
AD9
4
AD10
7
AD11
8
2D
3D
4D
AD12
13
AD13
14
AD14
17
AD15
5D
6D
7D
18
Flash
8Mb (1M x 8-bit)
8D
A16
A18
A17
3
A0
4
A1
5
A2
6
A3
7
A4
16
A5
17
A6
18
A7
19
A8
20
A9
26
A10
27
A11
28
A12
29
A13
30
A14
38
A15
39
A16
40
A17
41
A18
U19
9
AD0
AD8
21
10
AD1
AD9
20
13
AD2
AD10
19
14
AD3
AD11
18
31
AD4
AD12
17
32
AD5
AD13
16
35
AD6
AD14
15
36
AD7
AD15
14
D0
D1
D2
D3
D4
D5
D6
D7
A19
A19
25
NC/A19
AD[8:15]
A8
A[8:20]
1
A9
2
A10
21
A11
22
A12
23
A13
24
A14
NC1
NC2
NC3
NC4
NC5
NC6
42
NC7
3.3V
A15
43
A16
44
A17
NC8
NC9
A18
11
VDD1
A18
AD[0:7]
A19
A21
A22
RD
A23
WE
11
LE
1
A2
D2
27
AD2
28
A3
D3
AD3
A4
D4
32
AD4
A5
D5
33
AD5
34
AD6
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
D7
35
AD7
AD[0:7]
2
11
NC1
29
NC2
12
RY/BY
10
RESET
RESET
3.3V
31
VCC1
30
VCC2
NC/A20
3
GND1
34
GND2
22
FLASH_CS
CE
24
RD
OE
9
WE
VSS1
VSS2
39
23
AM29LV081B
TSOP40
10
OE
AD1
IS61LV5128AL
TSOP44
20
VCC
AD0
26
12
WE
ALE
D1
D6
A20
SRAM_CS
A1
A6
38
25
D0
33
VDD2
A20
8
CE
37
OE
15
WE
A0
GND
74LVC373APW
TSSOP20
3.3V
3.3V
4
3.3V
C163
0.01UF
0805
3.3V
C127
0.01UF
0805
3.3V
3.3V
C160
0.01UF
0805
C158
0.01UF
0805
C141
0.1UF
0805
C153
0.01UF
0805
C156
0.1UF
0805
ANALOG
DEVICES
C157
0.01UF
0805
AT25F512
74LVC373
74LVC373
IS61LV5128
Size
AM29LV081
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
MEMORY
Title
74LVC138
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
3
of
11
C
D
DAC4
DAC4
DAC3
ADC
DAC2
B
DAC1
A
LEFT (WHITE)
RIGHT (RED)
IN (J4)
1
OUT (J5)
OUT (J6)
3.3V
3.3V
1
AUDIO OSC
AD1835 AUDIO
CODEC
R74
10K
0805
R70
10K
0805
R81
33
0805
U17
U14
ADCLN
ALRCLK
ADCLP
ADC_DATA
ASDATA
ADCRN
22
38
OUTRP1
DLRCLK
OUTRN1
37
DBCLK
DAIP14_DAC_LRCLK
41
DAIP12_DAC_D1
DSDATA1
42
DAIP11_DAC_D2
43
DSDATA2
DAIP10_DAC_D3
DAIP9_DAC_D4
DSDATA4
3.3V
47
CIN
OUTRN3
COUT
OUTLP3
CCLK
OUTLN3
50
51
SPICLK
DAC2
OUTLP2
12
OUTLN2
5
28
OUTRN3
26
DAC3
OUTLP3
25
2
OFF = AD1835 is SLAVE
ON = AD1835 is MASTER
4
Disconnects ADC_DATA signal from
driving the corresponding DAI signal.
Useful if using this DAI pin for another purpose.
OUTRP3
27
OUTLN3
CLATCH
34
OUTRP4
MASTER_SLAVE
~M/S
OUTRN4
32
OUTLP4
36
DAC4
OUTLP4
31
OUTLN4
R148
6.04K
0805
OUTRP4
33
OUTRN4
OUTLN4
2
5V
4
RESET
3.3V
17
PD/RST
FILTD
18
AVDD3
3
52
19
CT14
10UF
B
29
C120
0.1UF
0805
CT13
10UF
B
C121
0.1UF
0805
R149
6.04K
0805
FLAG0_SPI_FLASH_CS
DAIP7_ADC_BCLK
7
3
6
4
5
DGND1
AGND2
DGND2
AGND3
AGND4
AGND5
AGND6
16
6
24
3
7
AUDIO_VREF_DAC
Loopback Test Switch
(Default= All OFF)
For Test Purposes Only
AGND
30
5
AD8606ARZ
SOIC8
35
1
15
3
14
4
13
5
12
6
11
7
10
8
9
3
4
5
6
7
A5V
8
5V
A5V
C152
0.1UF
0805
C132
0.1UF
0805
C133
0.1UF
0805
C131
0.22UF
0805
ANALOG
DEVICES
R151
0
0805
AD1835
AGND
AGND
AGND
AD1835
AD8606
Size
Board No.
C
Date
A
AOUT1_RIGHT
AOUT2_LEFT
AOUT2_RIGHT
AOUT3_LEFT
AOUT3_RIGHT
AOUT4_LEFT
AOUT4_RIGHT
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
ANALOG AUDIO
Title
AD1835
AOUT1_LEFT
DIP8
SWT016
FER8
600
1206
4
16
2
2
A5V
ON
SW11
1
AIN_LEFT
3.3V
C148
0.1UF
0805
ADC_BCLK
U11
AGND
C155
0.01UF
0805
SPI_FLASH_CS
10
AIN_RIGHT
3.3V
ADC_LRCLK
5
AD1835AASZ
MQFP52
5V_B
AD1835_SPI_CS
DIP4
SWT018
DVDD2
AGND1
40
DAIP8_ADC_LRCLK
8
2
4
DVDD1
39
11
3
AVDD2
1
SW12
1
FLAG3_AD1835_SPI_CS
ON
AD8606ARZ
SOIC8
2
AVDD1
(Default= All ON)
AUDIO_VREF_ADC
3
1
ODVDD
DISCONNECTS SIGNALS FROM SPI FLASH AND AD1835
1
A5V
48
U11
R65
6.04K
0805
FILTR
OSC
ADC_DATA
2
AD1835_SPI_CS
C41
0.1UF
0402
MASTER_SLAVE
3
MCLK
3
MISO
OUTRN2
13
OUTRP3
MOSI
OUTRP2
14
OUTLN2
4
DAIP17_AUDIO_OSC
SW7: CODEC SETUP SWITCH
(Default: 1=OFF, 2=ON, 3=ON, 4=ON)
Connects or disconnects the audio oscillator
1-2
depending on how the system is setup.
See users manual for more information.
OUTLN1
15
OUTRP2
6
DIP4
SWT018
DAC1
OUTLP1
6
OUTLP2
2
DAIP6_AD1835_MCLK
OUTRN1
7
OUTRN2
R76
10K
0805
DAIP5_ADC_DATA
DSDATA3
44
3
DAIP6_AD1835_MCLK
OUTRP1
8
OUTLN1
ADC
ADCRP
9
OUTLP1
12.288MHZ
OSC003
ADCRN
23
ADCRP
DAIP13_DAC_BCLK
ADCLP
7
4
49
ADCLN
21
8
2
3
ABCLK
46
ON
ADC_BCLK
ADC_LRCLK
20
2
45
SW7
1
3
OUT
1
1
OE
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
4
of
11
A
B
C
D
1
1
R46
5.49K
1206
R58
11.0K
1206
R40
5.49K
1206
C11
100PF
1206
R45
3.32K
0805
R55
11.0K
1206
OUTLN1
C9
100PF
1206
R39
3.32K
0805
OUTLN2
C112
330PF
0805
C114
330PF
0805
U9
6
7
DAC1 LEFT
7
DAC2 LEFT
5
R57
5.49K
1206
5
C103
680PF
0805 R44
1.65K
1206
AD8606ARZ
SOIC8
R127
604.0
1206
OUTLP1
R54
5.49K
1206
CT9
10UF
CAP002
J5
CON011
AOUT1_LEFT
R140
2.74K
1206
C90
220PF
1206
AUDIO_VREF_DAC
U8
6
AD8606ARZ
SOIC8
R129
604.0
1206
OUTLP2
CT7
10UF
CAP002
J5
CON011
2
AOUT2_LEFT
R142
2.74K
1206
3
C68
2200PF
1206
C105
680PF
0805 R38
1.65K
1206
R118
49.9K
1206
C92
220PF
1206
AUDIO_VREF_DAC
5
6
R120
49.9K
1206
C70
2200PF
1206
2
2
AGND
R43
5.49K
1206
R56
11.0K
1206
R42
3.32K
0805
AGND
R37
5.49K
1206
C10
100PF
1206
R53
11.0K
1206
OUTRN1
2
C106
330PF
0805
U9
1
DAC1 RIGHT
R62
5.49K
1206
C113
680PF
0805 R41
1.65K
1206
1
AD8606ARZ
SOIC8
R128
604.0
1206
R61
5.49K
1206
CT8
10UF
CAP002
J5
CON011
AOUT1_RIGHT
AUDIO_VREF_DAC
C91
220PF
1206
R117
49.9K
1206
AD8606ARZ
SOIC8
R130
604.0
1206
OUTRP2
CT6
10UF
CAP002
J5
CON011
1
AOUT2_RIGHT
R143
2.74K
1206
3
C67
2200PF
1206
C115
680PF
0805 R35
1.65K
1206
AUDIO_VREF_DAC
C93
220PF
1206
4
6
C69
2200PF
1206
R119
49.9K
1206
A5V
AGND
C100
0.22UF
0805
4
3
3
OUTRP1
R141
2.74K
1206
U8
2
DAC2 RIGHT
3
A5V
C8
100PF
1206
OUTRN2
C104
330PF
0805
3
R36
3.32K
0805
AGND
ANALOG
DEVICES
C99
0.22UF
0805
AGND
AGND
AD8606
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
AUDIO OUT 1
Title
AD8606
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
5
of
11
A
B
C
D
1
1
R34
5.49K
1206
R52
11.0K
1206
R28
5.49K
1206
C7
100PF
1206
R33
3.32K
0805
R49
11.0K
1206
OUTLN3
C5
100PF
1206
R27
3.32K
0805
OUTLN4
C116
330PF
0805
C118
330PF
0805
U7
6
7
DAC3 LEFT
7
DAC4 LEFT
5
R51
5.49K
1206
U6
6
5
C107
680PF
0805 R32
1.65K
1206
AD8606ARZ
SOIC8
R131
604.0
1206
OUTLP3
R48
5.49K
1206
CT5
10UF
CAP002
J5
CON011
AOUT3_LEFT
C109
680PF
0805 R26
1.65K
1206
AD8606ARZ
SOIC8
R133
604.0
1206
CT3
10UF
CAP002
OUTLP4
J5
CON011
8
AOUT4_LEFT
11
AOUT4_LEFT_HP
R144
2.74K
1206
C94
220PF
1206
AUDIO_VREF_DAC
R146
2.74K
1206
9
C72
2200PF
1206
R122
49.9K
1206
C96
220PF
1206
AUDIO_VREF_DAC
12
R124
49.9K
1206
C74
2200PF
1206
2
2
AGND
R31
5.49K
1206
R50
11.0K
1206
R30
3.32K
0805
AGND
R25
5.49K
1206
C6
100PF
1206
R47
11.0K
1206
OUTRN3
C4
100PF
1206
OUTRN4
C108
330PF
0805
2
C110
330PF
0805
U7
1
DAC3 RIGHT
3
R24
3.32K
0805
1
DAC4 RIGHT
3
R60
5.49K
1206
C117
680PF
0805 R29
1.65K
1206
U6
2
3
3
AD8606ARZ
SOIC8
OUTRP3
R132
604.0
1206
R59
5.49K
1206
CT4
10UF
CAP002
J5
CON011
AOUT3_RIGHT
C119
680PF
0805 R23
1.65K
1206
AD8606ARZ
SOIC8
R134
604.0
1206
OUTRP4
CT2
10UF
CAP002
J5
CON011
7
AOUT4_RIGHT
10
AOUT4_RIGHT_HP
R145
2.74K
1206
AUDIO_VREF_DAC
A5V
4
R147
2.74K
1206
9
C71
2200PF
1206
R121
49.9K
1206
AUDIO_VREF_DAC
C97
220PF
1206
AGND
A5V
C102
0.22UF
0805
C95
220PF
1206
12
C73
2200PF
1206
AGND
ANALOG
DEVICES
C101
0.22UF
0805
AGND
AGND
Size
AD8606
AD8606
C
Date
B
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
AUDIO OUT 2
Title
A
R123
49.9K
1206
Board No.
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
6
of
11
A
B
C
D
R1
301.0
1206
VREF_MIC_L
J4
CON031
2
1
CT12
10UF
CAP002
FER7
600
1206
R136
11.0K
1206
R16
5.49K
1206
R21
5.49K
1206
AIN_LEFT
3
C80
680PF
0805
C2
100PF
1206
6
C89
680PF
0805
1
R18
237.0
1206
U5
AGND
7
ADCLN
AGND
5
AUDIO_VREF_ADC
AD8606ARZ
SOIC8
R22
5.76K
1206
C88
1000PF
0805
R19
5.76K
1206
1
AOUT4_RIGHT_HP
ADC LEFT
C98
1000PF
0805
AD8532ARZ
SOIC8
J6
2
DAC4
HEADPHONE OUT
AGND
R11
750.0K
1206
3
C12
100PF
1206
DNP
C86
120PF
1206
R20
237.0
1206
U5
4
7
5
5
AOUT4_LEFT_HP
1
1
AD8532ARZ
SOIC8
ADCLP
3
AUDIO_VREF_ADC
3
CT10
68UF
CAP003
U10
6
2
CT11
68UF
CAP003
U10
2
CON001
R115
49.9K
1206
AD8606ARZ
SOIC8
R114
49.9K
1206
AGND
A5V
2
2
AGND
C84
10UF
0805
R2
301.0
1206
VREF_MIC_R
J4
CON031
CT1
10UF
CAP002
FER6
600
1206
1
R113
11.0K
1206
R7
5.49K
1206
AGND
R15
5.49K
1206
AD8606
AIN_RIGHT
3
C76
680PF
0805
C64
100PF
1206
2
C81
680PF
0805
R14
237.0
1206
U2
AGND
2
1
ADCRN
AGND
AUDIO_VREF_ADC
ELECTRET MICROPHONE ENABLE SWITCH
(Default = All OFF)
R5
2.0K
1206
U4
1
3
AD8606ARZ
SOIC8
3
3
AUDIO_VREF_ADC
C82
1000PF
0805
3
R3
2.0K
1206
AD8606ARZ
SOIC8
SW6
1
6
AUDIO_VREF_ADC
A5V
A5V
6
4
5
AIN_RIGHT
AIN_LEFT
VREF_MIC_L
VREF_MIC_R
DIP4
SWT018
R13
237.0
1206
7
A5V
AUDIO_VREF_ADC
ADC RIGHT
AGND
U2
3
4
R116
750.0K
1206
7
3
C83
1000PF
0805
8
2
2
C3
100PF
1206
DNP
C78
120PF
1206
ON
R6
5.76K
1206
1
R10
5.76K
1206
WHEN USING AN ELECTRET MICROPHONE
PLACE ALL SWITCHES IN ON POSITION
R12
0
0805
ADCRP
5
AD8606ARZ
SOIC8
AGND
U4
6
R126
0
0805
7
5
C87
0.22UF
0805
C77
0.22UF
0805
C111
0.22UF
0805
AD8606ARZ
SOIC8
ANALOG
DEVICES
4
AGND
AGND
AGND
AGND
AD8532
AD8606
AD8606
Title
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
AUDIO IN/HEADPHONE OUT
Board No.
C
Date
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
7
of
11
A
B
C
D
1
1
3.3V
R63
10K
0805
R8
0
0805
DNP
R98
10K
0805
R17
47.0K
0805
S/PDIF RX
DAIP18_SPDIF_IN
U3
J8
CON012
SPDIF
COAX
INPUT
C66
0.01UF
0805
5
RXN
R9
0
0805
OLRCK
1
C188
0.01UF
0805
3.3V
2
R4
0
0805
SPDIF_SCK
28
2
C122
0.1UF
0805
DNP
27
OSCLK
A3.3V
R112
75
1206
4
RXP0
3
RXP1
2
RXP2
1
RXP3
10
RXP4
11
RXP5
12
RXP6
13
RXP7
26
SDOUT
SPDIF_SDATA
R135
33
0805
24
RMCK
SPDIF_MCK
SPDIF GPO1
25
OMCK
LED11
YELLOW
LED001
16
CCLK_SCL
SPICLK
15
CDIN_AD1
6
VA
7
AGND
8
FILT
MISO
14
CS_ADO
20
GPO0
GPO1
21
18
GPO2_AD0
VL
R137
270
0805
SPDIF_SPI_CS
U33
SPDIF_GPO0
19
SHGND
2
MOSI
17
CDOUT_SDA
R125
3.01K
1206
3.3V
SPDIF_FSYNC
11
10
TP8
74LVC14A
SOIC14
23
VD
C85
1000PF
0805
22
9
DGND
C65
0.022UF
0805
RST
RESET
CS8416-CS
SOIC28
3
3
SW8
3
10
4
9
5
8
6
7
4
5
6
DAIP16_SPDIF_GPO0
11
3
DAIP3_SPDIF_SCK
DAIP15_SPDIF_SPI_CS
2
2
DAIP1_SPDIF_DATA
DAIP4_SPDIF_FSYNC
ON 12
1
DAIP2_SPDIF_MCLK
1
SPDIF_MCK
SPDIF_SDATA
SPDIF_FSYNC
SPDIF_SCK
SPDIF_SCK
SPDIF_GPO0
DIP6
SWT017
A3.3V
3.3V
FER1
600
1206
C187
0.1UF
0805
C186
0.1UF
0805
C79
1000PF
0805
C1
0.1UF
0805
SW8: SPDIF SIGNAL DISABLE
(Default: ALL = ON)
Used to disconnect signals of the SPDIF inteface
1-6
from the corrisponding DAI signals.
Useful if using DAI signals for another purpose.
C75
10UF
1210
ANALOG
DEVICES
4
Size
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
S/PDIF RX
Title
CS8416
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
8
of
11
A
B
C
D
3.3V
3.3V
3.3V
R174
10K
0805
RESET
3.3V
1
FLAG1
3.3V
POWER
R188
100
0805
LED9
RED
LED001
U33
1
SW1
SWT013
MOMENTARY
LED10
GREEN
LED001
1
2
74LVC14A
SOIC14
R138
270
1206
CT18
1UF
A
R139
270
1206
R92
10K
0805
RESET
R96
10K
0805
U22
1
MR
4
PFI
SW5
SWT013
MOMENTARY
RESET
RESET
PFO
8
7
RESET
5
U33
ADM708SARZ
SOIC8
3.3V
13
12
74LVC14A
SOIC14
DA_SOFT_RESET
R173
10K
0805
FLAG2
R187
100
0805
U33
3
2
SW2
SWT013
MOMENTARY
4
2
74LVC14A
SOIC14
CT17
1UF
A
3.3V
LEDs can be accessed as a memory address,
or directly as flags depending on the DSP settings.
See SW9 Settings and the EZ-KIT
Lite User Manual for more information.
3.3V
R172
10K
0805
DAIP19
3.3V
U24
R186
100
0805
5
AD0
AD[0:15]
U33
AD1
6
AD2
SW3
SWT013
MOMENTARY
74LVC14A
SOIC14
AD3
SW9
1
2
11
3
10
4
9
5
8
6
7
1
CT16
1UF
A
ON 12
2
3
3
FLAG1_SW1
R164
10K
0805
AD4
AD5
FLAG2_SW2
AD6
DAIP19_SW3
4
AD7
DAIP20_SW4
5
6
4
9
4Q
12
5Q
15
6Q
3
16
7Q
19
8Q
AD6
AD5
GND
LED8
YELLOW
LED001
10
SN74AHC1G02
SOT23-5
AD3
AD2
AD1
AD0
LED7
YELLOW
LED001
LED6
YELLOW
LED001
LED5
YELLOW
LED001
LED4
YELLOW
LED001
LED3
YELLOW
LED001
LED2
YELLOW
LED001
LED1
YELLOW
LED001
R177
270
1206
R178
270
1206
R179
270
1206
R180
270
1206
R181
270
1206
R182
270
1206
R183
270
1206
R184
270
1206
SW9: PUSH BUTTON ENABLE SWITCH
(Default = All ON, except position 5)
Used to stop the pushbuttons from
1-4
driving the corrisponding DSP signal.
Useful if using these DSP signals for another purpose.
R185
100
0805
5
Not Used
6
OFF = LEDs function as flags
ON = LEDs are accessed at a memory address
3.3V
3.3V
3.3V
3.3V
ANALOG
DEVICES
U33
9
SW4
SWT013
MOMENTARY
8
74LVC14A
SOIC14
C162
0.01UF
0805
CT15
1UF
A
C164
0.01UF
0805
C161
0.01UF
0805
C182
0.01UF
0805
Size
74LVC373
ADM708
74LVC14A
B
Board No.
C
Date
C
20 Cotton Road
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
RESET/PB/LED
Title
SN74AHC1G02
A
AD4
20
VCC
74LVC373APW
TSSOP20
R171
10K
0805
4
6
3Q
11
LE
1
OE
2
3.3V
DAIP20
5
2Q
U26
1
WE
2
1Q
AD7
LED_CS_SW
DIP6
SWT017
LED_CS
3
1D
4
2D
7
3D
8
4D
13
5D
14
6D
17
7D
18
8D
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
9
of
11
A
B
C
D
All USB interface circuitry is considered proprietary and has
been omitted from this schematic.
When designing your JTAG interface please refer to the
Engineer to Engineer Note EE-68 which can be found at
http://www.analog.com
EXPANSION INTERFACE (TYPE A)
5V
3.3V
1.2V_DSP
3.3V
5V
1.2V
3.3V
1
1
3.3V
AD[0:15]
J1
AD1
2
1
2
J2
1
J3
2
1
4
3
4
3
4
3
6
5
6
5
6
5
8
7
8
7
AD0
R176
4.7K
0805
JTAG
HEADER
EMULATOR_SELECT
3V
3.3V_DSP
AD3
8
7
AD2
AD5
10
9
AD4
10
9
10
9
AD7
12
11
AD6
12
11
12
11
AD9
14
13
AD8
14
13
14
13
AD11
16
15
AD10
16
15
16
15
AD13
18
17
AD12
18
17
18
17
AD15
20
19
AD14
20
19
20
19
22
21
22
21
22
21
ZP4
1
2
3
4
EMULATOR_EMU
2
3
5
6
EMULATOR_TMS
7
8
EMULATOR_TCK
9
10
EMULATOR_TRST
11
12
EMULATOR_TDI
13
14
EMULATOR_TDO
TRST
23
24
23
26
25
26
25
26
25
28
27
28
27
28
27
30
29
30
29
30
29
32
31
32
31
32
31
34
33
34
33
34
33
36
35
36
35
36
35
38
37
38
37
38
37
40
39
40
39
40
39
42
41
42
41
42
41
44
43
44
43
44
43
46
45
46
45
46
45
48
47
48
47
48
47
50
49
50
49
50
49
52
51
52
51
52
51
54
53
54
53
54
53
56
55
56
55
56
55
58
57
58
57
58
57
60
59
60
59
60
59
62
61
62
61
62
61
64
63
64
63
64
63
66
65
66
65
66
65
68
67
68
67
68
67
70
69
70
69
70
69
72
71
72
71
72
71
74
73
74
73
74
73
76
75
76
75
76
75
78
77
78
77
78
77
80
79
80
79
80
79
82
81
82
81
82
81
84
83
84
83
84
83
86
85
86
85
86
85
88
87
88
87
88
87
90
89
90
89
90
89
FLAG1_SW1
FLAG3_AD1835_SPI_CS
EXP_CS1
DAIP2_SPDIF_MCLK
DAIP4_SPDIF_FSYNC
DAIP6_AD1835_MCLK
DAIP8_ADC_LRCLK
DAIP10_DAC_D3
DAIP12_DAC_D1
DAIP14_DAC_LRCLK
DAIP16_SPDIF_GPO0
DAIP18_SPDIF_IN
DAIP20_SW4
SPIDS
SPICLK
CON019
RESET
RESET
FLAG0_SPI_FLASH_CS
FLAG2_SW2
DAIP1_SPDIF_DATA
DAIP3_SPDIF_SCK
DAIP5_ADC_DATA
DAIP7_ADC_BCLK
DAIP9_DAC_D4
DAIP11_DAC_D2
DAIP13_DAC_BCLK
DAIP15_SPDIF_SPI_CS
ALE
DAIP17_AUDIO_OSC
DAIP19_SW3
TRST
TDI
TDI
TDO
TDO
EMU
EMU
DA_EMULATOR_TCK
DA_EMULATOR_TRST
DA_EMULATOR_TDI
DA_EMULATOR_TDO
DA_GP0
DA_GP1
RESET
RESET
DA_GP2
DA_SOFT_RESET
DA_SOFT_RESET
SHGND
24
TCK
DA_EMULATOR_TMS
GND
23
TMS
TCK
DA_EMULATOR_EMU
IDC7X2
24
TMS
DA_EMULATOR_SELECT
DSP_CLKOUT
DA_GP3
DEBUG_AGENT
2
SHGND
DAI
HEADER
P3
FLAG2_SW2
EXP_CS2
MISO
MOSI
CON019
DAIP1_SPDIF_DATA
RD
DAIP3_SPDIF_SCK
DAIP5_ADC_DATA
WE
DAIP7_ADC_BCLK
DAIP9_DAC_D4
DAIP11_DAC_D2
DAIP13_DAC_BCLK
DAIP15_SPDIF_SPI_CS
DAIP17_AUDIO_OSC
CON019
DAIP19_SW3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
DAIP2_SPDIF_MCLK
DAIP4_SPDIF_FSYNC
3
DAIP6_AD1835_MCLK
DAIP8_ADC_LRCLK
DAIP10_DAC_D3
DAIP12_DAC_D1
DAIP14_DAC_LRCLK
DAIP16_SPDIF_GPO0
DAIP18_SPDIF_IN
DAIP20_SW4
IDC13X2
SPI
HEADER
ANALOG
DEVICES
P2
MOSI
MISO
4
1
2
3
4
5
6
SPICLK
SPIDS
FLAG1_SW1
IDC3X2
Title
NOTE: Must disable SW1 when using this pin as SPI select.
See page 9
Size
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
EXPANSION INTERFACE/JTAG/SPI/DAI
Board No.
C
Date
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
10
of
11
A
B
C
D
5V
5V_B
UNREG_IN
POWER IN
F1
2.5A
FUS001
D2
2A
DO-214AA
1
UNREG_IN
UNREG_IN
FER3
190
FER002
4
3
1
2
R82
0
1206
VR4
7
IN1
8
IN2
J7
VR1
1
7
2
8
OUT1
IN1
OUT2
IN2
3
1
OUT3
C38
1000PF
1206
2
C46
10UF
1210
C47
0.1UF
0805
6
SD
5
FB
GND
4 ADP3336ARMZ
MSOP8
6
SD
R88
210.0K
0805
3
C56
1UF
0805
C52
10UF
0805
1
OUT1
2
OUT2
3
OUT3
5
FB
GND
4 ADP3336ARMZ
MSOP8
1
R69
210.0K
0805
C39
1UF
0805
C40
10UF
0805
CON005
C61
1UF
0805
C44
1UF
0805
R87
64.9K
0805
C37
1000PF
1206
R67
64.9K
0805
SHGND
R192
0
0805
UNREG_IN
R191
0
0805
DNP
2
UNREG_IN
1.2V
TP3
2
C17
10UF
1210
VR5
6
VIN
1
RUN
4
GND
C49
10UF
1210
C48
1UF
0805
2
ITH
SYNC_MODE
SW
PLL_LPF
VFB
7
C14
10UF
0805
DNP
L1
10UH
IND001
5
8
R83
124.0K
0805
3
C55
30PF
1206
R84
24.9K
0603
R89
0.05
1206
VR2
LTC1877
MSOP8
R86
249.0K
0805
CT19
47UF
D
C50
10UF
0805
C16
68PF
0603
4
4
1
2
3
FB
6
R91
80.6K
0603
R85
0
0603
PGATE
GND
2
3.3V
U13
CS
C15
470PF
0603
TP5
IN
1
COMP
C183
220PF
1206
FDC658P
5
L2
6.8UH
IND009
R90
0
0805
5
ADP1864
SOT23-6
3
6
D1
SL22
DO-214AA
FDC658P
SOT23-6
CT20
47UF
B
CT21
2.2UF
B
C13
1UF
0805
DNP
PGND
R93
255.0K
0603
3
3
PGND
R73
0
0805
PGND
MH5
MH1
MH2
MH3
MH4
FER2
600
1206
TP1
FER5
600
1206
TP2
TP6
TP4
TP7
M5
RUBBER FOOT
MSC009
M1
RUBBER FOOT
MSC009
M2
RUBBER FOOT
MSC009
M3
RUBBER FOOT
MSC009
M4
RUBBER FOOT
MSC009
ANALOG
DEVICES
4
SHGND
SHGND
Board No.
C
Date
A
B
C
Nashua, NH 03063
4
PH: 1-800-ANALOGD
ADSP-21262 EZ-KIT Lite
POWER
Title
Size
20 Cotton Road
Rev
A0174-2002
2.0C
Sheet
5-18-2007_14:12
D
11
of
11
I
INDEX
Numerics
B
2-wire interface (TWI) mode, 1-13
bill of materials, A-1
board design database, 1-17
board schematic (ADSP-21262), B-1
boot
modes, 2-3
mode select switch (SW10), 2-11
BOOTCFG0-1 pins, 2-12
A
AD15-0 pins, 2-3
AD1835A ADC and DAC
configuration registers, 1-14, 2-6
CS8416 audio out, 1-15
defined, 1-13
master clock (MCLK), 2-5
master mode, 1-13, 2-9
setup switch (SW7), 2-8
slave mode, 1-13, 1-15, 2-9
SPI connection, 2-6
AD7-0 pins, 1-16, 2-11, 2-14
ADC_DATA pin, 2-10
address bus (AD15-0 pins), 2-3
ALE (address-enable) pin, 1-16, 2-3, 2-11
analog audio interface, xi, 1-13
analog-to-digital converters (ADCs), See
AD1835A
architecture, of this EZ-KIT Lite, 2-2
audio
See also analog audio interface, digital
audio interface, 1-13
in RCA connector (J4), 2-17
out RCA connector (J5), 2-18
C
CCES environment, 1-6
CLKCFG0-1 pins, 2-3, 2-12
CLKIN pin, 2-3, 2-12
clock ratio select switch (SW10), 2-11
clock signals, 1-13, 1-14, 2-9
codecs, See AD1835A
configuration, of this EZ-KIT Lite, 1-3
connectors
diagram of locations, 1-3, 2-16
J1-3 (expansion), 2-4, 2-6, 2-7, 2-17
J4 (audio in RCA), 1-14, 2-17
J5 (audio out RCA), 1-14, 2-18
J6 (headphone out), 1-14, 2-18
J7 (power), 1-8, 2-18
J8 (S/PDIF in coax), 1-15, 2-19
P2 (SPI), 2-6, 2-19
P3 (DAI), 2-20
ZJ1 (USB), 1-8, 2-20
ZP4 (JTAG header), 2-8, 2-21
contents, of this EZ-KIT Lite, 1-3
conventions, manual, xvii
ADSP-21262 EZ-KIT Lite Evaluation System Manual
I-1
Index
core
frequency, 2-3
to CLKIN ratios, 2-12
voltage, 2-2
CS8416 S/PDIF receiver
GPO1 LED (LED11), 2-14
loop-back test switch (SW11), 2-12
signal enable switch (SW8), 2-10
SPI connection, 2-6
E
D
F
DAI_P15 pin, 2-10
DAI_P16 pin, 2-10
DAI_P17 pin, 2-9
DAI_P19 (SW3) pin, 2-11, 2-15
DAI_P1 pin, 2-10
DAI_P20 (SW4) pin, 2-11, 2-15
DAI_P2 pin, 2-10
DAI_P3 pin, 2-10
DAI_P4 pin, 2-10
DAI_P6 pin, 2-9
data
input/output rates, 1-13
pins, See DAI pins by name (DAI_Px)
default configuration, of this EZ-KIT Lite,
1-3
digital audio interface (DAI)
block diagram, 2-4
disconnecting, 2-10
header (P3), 2-20
pins, See DAI pins by name (DAI_Px)
port, 1-13, 1-14
digital-to-analog converters (DACs), See
AD1835A
features, of this EZ-KIT Lite, x
FLAG0 (SPI flash select) pin, 1-12, 2-6,
2-19
FLAG1 (SW1) pin, 2-6, 2-11, 2-15
FLAG2 (SW2) pin, 2-6, 2-11, 2-15
FLAG3 (AD1835 SPI select) pin, 1-14, 2-6
FLAG8-15 pins, 1-16
FLAG registers, 1-15, 2-14
flash memory
memory map, 1-12
boot mode, 2-11, 2-12
connecting to parallel port (PP), 2-3
connecting to SPI port, 1-12, 2-6
frequency, 2-3
FSYNC (frame sync) pins, 1-13, 1-14, 2-9,
2-10
I-2
electret microphone, See microphone
evaluation license
CCES, 1-10
example programs, 1-17
expansion interface, xi, 2-4, 2-6, 2-7, 2-17
external memory, 1-12, 2-8
See also flash memory
external voltage, 2-2
G
general-purpose IO, 1-15, 2-3, 2-6, 2-14,
2-15
GPO0 pin, 2-10
GPO1 pin, 1-15, 2-12, 2-14
ADSP-21262 EZ-KIT Lite Evaluation System Manual
Index
H
N
headphone out jack (J6), 2-18
notation conventions, xvii
I
O
installation, of this EZ-KIT Lite, 1-8
CCES, 1-4
internal memory, 2-8
interrupts, 1-15
oscillators, 1-13, 1-15, 2-3, 2-5, 2-9
J
JTAG
connector (ZP4), 2-21
emulation port, 2-8
L
latch-enable pin (ALE), 1-16, 2-3, 2-11
LED_CS signal, 2-11
LEDs
diagram of locations, 1-3, 2-13
LED10 (power), 1-8, 2-14
LED11 (S/PDIF), 1-15, 2-14
LED1-8 (AD0-7/FLAG8-15), 1-16,
2-14
LED9 (processor reset), 1-8, 2-14
ZLED3 (USB monitor), 1-8, 2-14
license restrictions, 1-11
loop-back test switch (SW11), 2-12
M
master clock (MCLK), 1-13, 1-15, 2-5,
2-10
memory bus (AD15-0), 2-3
microphone
on RCA connector (J4), 1-14
select switch (SW6), 2-8
P
package contents, 1-3
parallel port
block diagram, 2-3
boot mode, 2-3, 2-11
connecting to flash memory, 1-12
pins (AD7-0), 1-16, 2-11, 2-14
power
connector (J7), 2-18
LED (LED10), 2-14
planes, 2-2
specifications, 2-19
supply, 2-18
PPFLG bit, 1-12, 1-16
push buttons
See also switches by name (SWx)
diagram of locations, 2-13
R
R79-80 resistors, 2-2
RCA connectors, 2-17, 2-18
related documents, xvii
reset
LED (LED9), 2-14
pin, 2-7
push button (SW5), 2-15
restrictions, of the license, 1-11
ADSP-21262 EZ-KIT Lite Evaluation System Manual
I-3
Index
S
schematic, of ADSP-21262 EZ-KIT Lite,
B-1
SCK pin, 2-10
SDATA pin, 2-10
serial peripheral interconnect (SPI)
connections, 2-6
disable switch (SW12), 2-12
flash memory, 1-12
header (P2), 2-19
master boot mode, 2-3, 2-11
setting up AD1835A, 1-14
signal routing unit (SRU), 2-4
S/PDIF
coax connector (J8), 2-19
GPO1 LED (LED11), 2-14
receiver, 1-13
signal enable switch (SW8), 2-10
SPI_CS pin, 2-10
startup, of this EZ-KIT Lite, 1-8
CCES, 1-4
stereo jacks, 2-18
SW10 (boot mode/clock ratio) switch, 2-3,
2-11
SW11 (test) switch, 2-12
SW12 (SPI disable) switch, 2-6, 2-12
SW1 (FLAG1) push button, 2-15
SW2 (FLAG3) push button, 2-15
SW3 (DAI_P19) push button, 2-15
SW4 (DAI_P20) push button, 2-15
SW5 (reset) push button, 2-15
SW6 (microphone select) switch, 1-14, 2-8
SW7 (AD1835A setup) switch, 1-13, 2-8
SW8 (S/PDIF enable) switch, 2-10
SW9 (push button enable) switch, 2-11,
2-15
switches
See also switches by name (SWx)
diagram of locations, 2-8
I-4
synchronous random access memory
(SRAM), xii, 1-12, 2-3
SYSCTL register, 1-12
system architecture, of this EZ-KIT Lite,
2-2
T
technical support, xiv
time-division multiplexed mode (TDM),
1-13
U
U24, LED latch, 2-11
USB
cable, 1-3, 2-14
connector (ZJ1), 2-20
interface, 2-8, 2-21
monitor LED (ZLED3), 2-14
V
VisualDSP++ environment, 1-9
W
WE signal, 2-11
ADSP-21262 EZ-KIT Lite Evaluation System Manual
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