Video and Sound IF with FM-PLL Demodulator, AFC and V & S SCART TDA 5950X Bipolar IC Features ● ● ● ● Features video and sound IF Video and sound SCART AFC NTSC option P-DSO-24-1 Type Ordering Code Package TDA 5950X Q67000-A5112 P-DSO-24-1 (SMD) TDA 5950X Q67007-A5112 P-DSO-24-1 Tape and Reel dry Functional Description Video IF Section Video IF-broadband amplifier followed by a quasi-synchronous demodulator for negative modulated IF signals. A video switch interface is included in the video section. A separate video output after the demodulator permits the installation of one or more sound traps at the input of the video switch. The tuner AGC threshold is set by means of a potentiometer, all other functions can switched with open collector transistors. Sound IF Section FM-IF limiter with FM-PLL demodulator for the frequency range of 5.5 MHz to 6.5 MHz. The AF section includes an audio switch followed by an audio buffer output. Application The TDA 5950X is suitable for application in television receivers or video tape recorders with A/V switches. Semiconductor Group 1 12.94 TDA 5950X Circuit Description Video IF Section The video IF section incorporates a four-stage, capacitively coupled, symmetrical and controlled amplifier, a limiter with selection and a mixer for quasi-synchronous demodulation of negative modulated IF signals followed by a video output amplifier. The video demodulator output and the video switch input are connected by means of a sound trap. The video switch has two inputs (for signals from video demodulator and from external source) and two outputs. Parallel to the video output amplifier the video signal is used for generating the AGC voltage. The control circuit is designed on the integralaction AGC principle, employing a noise-free peak value detector. A delayed tuner AGC voltage with positive control direction is derived from the AGC voltage via a threshold amplifier that is set by means of an external potentiometer. An AFC push pull output current is generated from picture carrier tank circuit. Sound IF Section The sound IF section incorporates a five-stage, symmetrical limiter amplifier followed by a PLL demodulator. The AF section contains an audio switch followed by an output buffer. Switch Matrix AUX/RF-Control (Pin 4) AV-OFF (Pin 17) Output (Pin 8 / Pin 19) 0 0 muted 0 1 IF 1 0 muted 1 1 SCART Semiconductor Group 2 TDA 5950X Pin Functions Pin No. Function 1 Delayed tuner AGC output 2 Delayed tuner AGC threshold 3 AGC-time constant 4 Aux / RF control 5 Ground 6 + VS supply voltage 7 Auxiliary video output 8 Video output 9 Auxiliary video input 10 AFC output 11 Demodulator tank circuit 12 Demodulator tank circuit 13 Video input at sound trap output 14 Video demodulator output 15 Sound IF ground 16 Sound IF input 17 A / V OFF 18 Auxiliary audio input 19 Audio output 20 Auxiliary audio output 21 De-emphasis capacitor 22 Low-pass capacitor 23 Video IF input 24 Video IF input Semiconductor Group 3 TDA 5950X Block Diagram Semiconductor Group 4 TDA 5950X Absolute Maximum Ratings TA = 0 to 70 ˚C Parameter Symbol Limit Values min. max. Unit Supply voltage V6 0 8 V Junction temperature Tj 0 150 ˚C Storage temperature Tstg – 40 125 ˚C Thermal resistance Rth JA 70 K/W Operating Range Supply voltage V6 4.5 8 V Supply voltage delayed tuner AGC V1 1 13.2 V Ambient temperature during operation TA 0 70 ˚C Input frequency range fIF 12 80 MHz Semiconductor Group 5 TDA 5950X DC Characteristics TA = 0 to 70 ˚C; VS = 5.0 V Parameter Symbol Limit Values Unit min. typ. max. 47 55 63 mA 12 V 5.5 1.5 V V 1.65 V Total current I6 DC voltage; pin 1 V1 Aux/RF switch; pin 4 H/open = Aux L = RF V4 V4 2.4 0 Sync tip level; pin 7 V7 1.35 1.5 Test Condition RL ≥ 2.7 kΩ|| 10 pF Sync tip level; pin 8 V8 1.35 1.5 1.65 V RL ≥ 2.7 kΩ|| 10 pF Sync tip level; pin 9 V9 1.35 DC voltage; pin 10 V10 0.4 DC voltage; pin 11 V11 V6 – 1.3 V DC voltage; pin 12 V12 V6 – 1.3 V Sync tip level; pin 13 V13 1.35 1.5 1.65 V Sync tip level; pin 14 V14 1.15 1.3 1.45 V DC voltage; pin 16 V16 DC voltage; pin 18 V18 1.6 2 2.4 V DC voltage; pin 19 V19 1.6 2 2.4 V DC voltage; pin 20 V20 1.6 2 2.4 V DC voltage; pin 21 V21 1.6 2 2.4 V DC voltage; pin 22 V22 2.2 V DC voltage; pin 23 V23 3.6 V DC voltage; pin 24 V24 3.6 V Semiconductor Group 1.5 1.65 V V6 – 0.4 V 0 6 V TDA 5950X AC Characteristics TA = 0 to 70 ˚C; VS = 5.0 V Parameter Symbol Limit Values min. typ. Unit Test Condition µV VVideo – 3 dB mV VVideo + 3 dB max. Video IF Section IF-input sensitivity V23/24 Max. IF-input voltage V23/24 100 140 IF-control range ∆VIF 60 66 72 dB Video demodulator output voltage V14pp 1.35 1.5 1.65 V VIF IN = 10 mV 3.6 3.0 1.1 1.3 V V V V upper video clipping zero carrier level lower video clipping sync tip level 10 MHz CL < 20 pF, RL > 1 kΩ 70 100 – 3 dB video bandwidth B14 Output impedance R14 10 Ω Output sink current Output source current I14 I14 2 –3 mA mA 70 100 µV 8 DC and AC DC and AC Sound IF Section Min. sound IF-input voltage (min. control) V16 AF-output voltage V19 175 250 350 mV ∆f = 30 kHz fmod = 1 kHz FSIF = 5.5 MHz…6.5 MHz Aux. AF-output voltage V20 350 500 700 mV ∆f = 30 kHz fmod = 1 kHz FSIF = 5.5 MHz…6.5 MHz 0.2 0.3 % ∆f = 30 kHz fmod = 1 kHz FSIF = 5.5 MHz…6.5 MHz 1 V Total harmonic distortion THDAFo Max. aux. input voltage V18rms Gain audio switch G18-19 AM-Suppression αAM19/20 Signal to noise ratio (weighted) Semiconductor Group S/N19/20 1 50 55 dB fmod = 1 kHz m = 30 % V16 = 1 mV…100 mV 50 60 55 65 dB dB V16 = 500 µV…1 mV V16 = 1 mV…100 mV 7 TDA 5950X AC Characteristics (cont’d) TA = 0 to 70 ˚C; VS = 5.0 V Parameter Symbol Limit Values min. typ. Ripple rejection RR19/20 Input impedance 35 Unit Test Condition max. 40 dB Z18*) 50 kΩ Input impedance Z13 1 || 2 kΩ || pF Gain of Video switch Aux. VIN-video output VideoIN-aux. output VideoIN-video output fmod = 5 MHz G9-8 G13-7 G13-8 0.9 0.9 0.9 1 1 1 – 3 dB video bandwidth – 3 dB video bandwidth B7 B8 8 8 10 10 Cross talk attenuation fmod = 5 MHz a9-8 50 Intermodulation α7/8 54 SCART-SWITCH Suppression of video signal harmonics 1.1 1.1 1.1 MHz MHz CL < 20 pF, RL > 1 kΩ CL < 50 pF, RL > 1 kΩ dB V4 = 0 V 60 dB f1.07 MHz = fSC – fCC 35 40 dB Signal to noise ratio (weighted) S/N7/8 56 60 dB CCIR – 567 Ripple rejection on pin 7 and 8 RR7/8 35 40 dB fVs = 0…100 kHz Max. input current I9 0.5 1 µA 0.8 1.0 µA/kHz 10 µA mA no tuner gain reduction max. tuner gain reduction 5 mV mV R2 = 4.7 kΩ R2 = 0 Ω AFC AFC-control steepness ∆I10/∆f 0.6 I1 0 2.5 Tuner AGC Sink current Threshold range for del. Tuner-AGC 3.5 VIF 50 *) Design hints Semiconductor Group 8 TDA 5950X Alignment Instructions At a video carrier input level of V23/24 = 4 mVrms, fP/C = 38.9 MHz, and a superimposed AGC voltage of V3 = 1.5 V, the demodulator tank circuit is preliminarily aligned until a max. video signal 14 Vpp is obtained at the video output. Any suitable video test signal can be used for modulation. The AGC voltage V3 is reduced until the signal is approx. 1 Vpp and the max. video signal is obtained when fine-aligning the demodulator tank circuit. The alignment is not critical due to relatively large bandwidth of the demodulator tank circuit. Fine-tuning to intercarrier S/N, differential phase or 2T-pulse characteristics is possible. Test Circuit Semiconductor Group 9 TDA 5950X Application Circuit Semiconductor Group 10 TDA 5950X Package Outlines GPS05144 Plastic-Package, P-DSO-24-1 (SMD) (Plastic Dual Small Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” SMD = Surface Mounted Device Semiconductor Group 11 Dimensions in mm