5-V Low Drop Voltage Regulator TLE 4263 Features • • • • • • • • • • • • • Output voltage tolerance ≤ ±2% 200 mA output current capability Low-drop voltage Very low standby current consumption Overtemperature protection Reverse polarity protection Short-circuit proof Adjustable reset threshold Watchdog Wide temperature range Suitable for use in automotive electronics Green Product (RoHS compliant) AEC Qualified P-DSO-14-3, -8, -9, -11, 14 ^ Functional Description P-DSO-20-1, -6, -7, -9, -14, -15, -17, - TLE 4263 is a 5-V low drop voltage regulator in a SMD package PG-DSO-14-30, PG-DSO-20-35, or PG-DSO-8-16. The maximum input voltage is 45 V. The maximum output current is more than 200 mA. The IC is short-circuit proof and incorporates temperature protection which turns off the IC at overtemperature. The IC regulates an input voltage VI in the range of 6 V < P/PG-DSO-8-3, -6, -7, -8, -9, VI < 45 V to VQ,nom = 5.0 V. A reset signal is generated for an output voltage of VQ,rt < 4.5 V. This voltage threshold can be decreased to 3.5 V by external connection of a voltage divider. The reset delay can be set externally by a capacitor. The integrated watchdog logic supervises the connected microcontroller. The IC can be switched off via the inhibit input, which causes the current consumption to drop from 900 µA to typical 0 µA. Type Package Type Package TLE 4263 GS PG-DSO-8-16 TLE 4263 GM PG-DSO-14-30 TLE 4263 G PG-DSO-20-35 Data Sheet 1 Rev. 2.8, 2007-03-20 TLE 4263 Choosing External Components The input capacitor CI is necessary for compensation of line influences. Using a resistor of approx. 1 Ω in series with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output capacitor is necessary for the stability of the regulating circuit. Stability is guaranteed at values ≥ 22 µF and an ESR of ≤ 3 Ω within the operating temperature range. For small tolerances of the reset delay the spread of the capacitance of the delay capacitor and its temperature coefficient should be noted. TLE 4263 G N.C. N.C. RO GND GND GND GND N.C. D RADJ 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 TLE 4263 GM INH N.C. VI GND GND GND GND N.C. VQ W RO N.C. GND GND GND D RADJ 1 2 3 4 5 6 7 14 13 12 11 10 9 8 TLE 4263 GS INH I GND GND GND Q W I INH RO GND 1 2 3 4 8 7 6 5 Q W RADJ D AEP01668_4263 AEP03067 AEP01099_4263 Figure 1 Data Sheet Pin Configuration (top view) 2 Rev. 2.8, 2007-03-20 TLE 4263 Table 1 Pin Definitions and Functions Pin Pin PG-DSO-14 PG-DSO-20-30 35 Pin Symbol Function PG-DSO-8 -16 1 3 3 RO Reset output; open-collector output connected to the output via a resistor of 30 kΩ. 2 1, 2, 19, 13 – N.C. Not connected 3 - 5, 10 - 12 4-7, 14-17 4 GND Ground 6 9 5 D Reset delay; connected to ground with a capacitor. 7 10 6 RADJ Reset threshold; to adjust the switching threshold connect a voltage divider (output to GND) to the pin. If this input is connected to GND, reset is triggered at an output voltage of 4.5 V. 8 11 7 W Watchdog; rising edge triggered input for monitoring a microcontroller. 9 12 8 Q 5-V output voltage; block to ground with a capacitor, C ≥ 22 µF, ESR ≤ 3 Ω at 10 kHz 13 18 1 I Input voltage; block to ground directly at the IC with a ceramic capacitor. 14 20 2 INH Inhibit; TTL-compatible, low-active input. Data Sheet 3 Rev. 2.8, 2007-03-20 TLE 4263 Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If the externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay capacitor is discharged by the reset generator. When the voltage of the capacitor reaches the lower threshold VDRL, a reset signal occurs at the reset output and is held until the upper threshold VDU is exceeded. If the reset threshold input is connected to GND, reset is triggered at an output voltage of typ. 4.65 V. A connected microcontroller will be monitored through the watchdog logic. In case of missing pulses at pin W, the reset output is set to low. The pulse sequence time can be set in a wide range with the reset delay capacitor. The IC can be switched at the TTL-compatible, low-active inhibit input. The IC also incorporates a number of internal circuits for protection against: • • • Overload Overtemperature Reverse polarity W Saturation Control and Protection Circuit Temperature Sensor Input Watchdog Ι Q Control Amplifier Buffer Bandgap Reference Reset Generator Output D Reset Delay RO Reset Output RADJ Reset Threshold Adjustment INH Inhibit Figure 2 Data Sheet GND GND AEB03068 Block Diagram 4 Rev. 2.8, 2007-03-20 TLE 4263 Table 2 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks Min. Max. VI II -42 – 45 – V – – internally limited VR IR -0.3 – 42 – V – – internally limited VRADJ -0.3 6 V – VD ID -0.3 – 42 – V – – internally limited VQ IQ -0.3 – 7 – V – – internally limited VINH -42 45 V – VW -0.3 6 V – IGND -0.5 – A – Tj Tstg – -50 150 150 °C °C – – VI Tj – 45 V – -40 150 °C – Input I Input voltage Input current Reset Output RO Voltage Current Reset Threshold RADJ Voltage Reset Delay D Voltage Current Output Q Voltage Current Inhibit INH Voltage Watchdog W Voltage Ground GND Current Temperature Junction temperature Storage temperature Operating Range Input voltage Junction temperature Data Sheet 5 Rev. 2.8, 2007-03-20 TLE 4263 Table 2 Absolute Maximum Ratings (cont’d) Parameter Symbol Limit Values Min. Max. – 112 – 92 – 185 – 164 – 32 Unit Remarks Thermal Resistance Junction-ambient Junction-pin Rthj-a Rthj-p K/W PG-DSO-14-301); Footprint only K/W PG-DSO-14-301); 300 mm2 Heat sink K/W PG-DSO-8-161); Footprint only K/W PG-DSO-8-161); 300 mm2 Heat sink K/W PG-DSO-14-302) 1) Worst case; package mounted on PCB 80 × 80 × 1.5 mm3; 35µ Cu; 5µ Sn; zero airflow. 2) Measured to pin 4. Data Sheet 6 Rev. 2.8, 2007-03-20 TLE 4263 Table 3 Characteristics VI = 13.5 V; -40 °C < Tj < 125 °C; VINH > 3.5 V; (unless specified otherwise) Parameter Symbol Limit Values Min. Typ. Max. Unit Test Condition Normal Operation Output voltage VQ 4.90 5.00 5.10 V 5 mA ≤ IQ ≤ 150 mA; 6 V ≤ VI ≤ 28 V Output voltage VQ 4.90 5.00 5.10 V 6 V ≤ VI ≤ 32 V; IQ = 100 mA; Tj = 100 °C 200 250 400 mA 1) – 0 50 µA VINH = 0 – – – 900 10 15 1300 µA 18 mA 23 mA – 0.35 0.50 V – – 25 mV – 3 25 mV PSRR – 54 – dB VQ,rt VRADJ,th 4.5 4.65 4.8 V 1.26 1.35 1.44 V VRO,l VD,sat VDU – 0.10 0.40 V – 50 100 mV IRO = 1 mA VQ < VR,th 1.45 1.70 2.05 V – Lower reset timing threshold VDRL 0.20 0.35 0.55 V – Charge current ID,ch trd trr 40 60 85 µA – 1.3 2.8 4.1 ms 0.5 1.2 4 µs CD = 100 nF CD = 100 nF IQ Current consumption; Iq Iq = II - IQ Iq Iq Iq Drop voltage Vdr Load regulation ∆VQ,lo Line regulation ∆VQ.li Output current Power Supply Ripple Rejection IQ = 0 mA IQ = 150 mA IQ = 150 mA; VI = 4.5 V IQ = 150 mA1) IQ = 5 mA to 150 mA VI = 6 V to 28 V; IQ = 150 mA fr = 100 Hz; Vr = 0.5 Vpp Reset Generator Switching threshold Reset adjust threshold Reset low voltage Saturation voltage Upper timing threshold Reset delay time Reset reaction time Data Sheet 7 VRADJ = 0 V VQ > 3.5 V Rev. 2.8, 2007-03-20 TLE 4263 Table 3 Characteristics (cont’d) VI = 13.5 V; -40 °C < Tj < 125 °C; VINH > 3.5 V; (unless specified otherwise) Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max. ID,wd VDU 4.40 6.25 9.10 µA VD = 1.0 V 1.45 1.70 2.05 V – VDWL 0.20 0.35 0.55 V – 16 22.5 27 ms CD = 100 nF 3.6 – – V IC turned on – – 0.8 V IC turned off 5 10 25 µA VINH = 5 V Watchdog Discharge current Upper timing threshold Lower timing threshold Watchdog trigger time TWI,tr Inhibit Switching voltage Turn-OFF voltage Input current VINH,ON VINH,OFF IINH 1) Drop voltage = Vi - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 6 V input). Note: The reset output is low within the range VQ = 1 V to VQ,rt. Data Sheet 8 Rev. 2.8, 2007-03-20 TLE 4263 Ι Input Q Output 470 nF 6 V...45 V KL 15 INH Reset To MC RO D TLE 4263G 100 k Ω 100 nF 22 µF RADJ GND 56 k Ω W Watchdog from MC Figure 3 AES03069 Application Circuit ΙΙ Ι 1000 µF 470 nF ΙE VΙ + Vr VE PSRR = 20 log Q 22 µF TLE 4263G INH VC ΙQ RO D Ι D, ch CD GND Ι GND W RADJ VW VRADJ 5.6 k Ω Ι RD VQ VRO 100 nF Vr ∆VQ, r AES03070_4263 Figure 4 Data Sheet Test Circuit 9 Rev. 2.8, 2007-03-20 TLE 4263 Reset Timing The power-on reset delay time is defined by the charging time of an external capacitor CD which can be calculated as follows: CD = (trd × ID,ch)/∆V (1) Definitions: • • • • • CD = delay capacitor trd = reset delay time ID,ch = charge current, typical 60 µA ∆V = VDU, typical 1.70 V VDU = upper delay switching threshold at CD for reset delay time VI < trr t VQ VQ, rt dV ID, ch = dt CD VD t VDU VDRL trd trr t VRO t Power-ON Reset Figure 5 Data Sheet Overtemperature Voltage Drop at Input Undervoltage Secondary Load Bounce Spike AET03066 Time Response, Watchdog with High-Frequency Clock 10 Rev. 2.8, 2007-03-20 TLE 4263 Reset Switching Threshold The present default value is typ. 4.65 V. When using the TLE 4263 the reset threshold can be set to 3.5 V < VQ,rt < 4.6 V by connecting an external voltage divider to pin RADJ. The calculation can be easily done since the reset adjust input current can be neglected. If this feature is not needed, the pin has to be connected to GND. VQ,rt = (1 + R1/R2) × VRADJ,th (2) Definitions: • • VQ,rt = reset threshold VRADJ,th = comparator reference voltage, typical 1.35 V Watchdog Timing The frequency of the watchdog pulses has to be higher than the minimum pulse sequence which is set by the external reset delay capacitor CD. Calculation can be done according to the formula given in Figure 6. VW t VΙ VQ T WD, p VD T WI, tr t t VDU VDWL VRO T WI, tr = t WD, L (VDU - VDWL ) Ι D, wd t t CD AED03099_4263 Figure 6 Data Sheet Timing of the Watchdog Function Reset 11 Rev. 2.8, 2007-03-20 TLE 4263 Timing Threshold Voltage VDU and VDRL versus Temperature Reset Switching Threshold versus Output Voltage AED01098_4263 1.6 V RADJ V 1.4 AED03062 3.2 V V 2.8 VI = 13.5 V 2.4 1.2 2.0 1.0 VDU V Ι = 13.5 V 0.8 1.6 0.6 1.2 0.4 0.8 0.2 0.4 0 0 1 2 3 0 -40 4 V 5 VQ AED01088 1.0 10 0.8 8 0.6 6 0.4 4 0.2 2 40 80 0 -40 120 ˚C 160 Tj Data Sheet 80 120 ˚C 160 AED03063 16 µA IINH 14 12 0 40 Current Consumption of Inhibit versus Temperature 1.2 0 -40 0 Tj Reset Switching Threshold versus Temperature 1.6 VRADJ V 1.4 VDRL VINH = 5 V 0 40 80 120 ˚C 160 Tj 12 Rev. 2.8, 2007-03-20 TLE 4263 Drop Voltage versus Output Current Vdr Current Consumption versus Output Current AED03060_4263 800 mV 700 600 24 T j = 125 ˚C 25 ˚C 500 AED03061 32 Iq mA 28 20 VI = 13.5 V 400 16 300 12 200 8 100 4 0 0 50 100 150 mA 200 0 300 0 50 100 150 200 IQ Ιq Output Voltage versus Input Voltage AED01096 AED01097 12 mA VQ V 10 25 20 8 R L = 25 Ω 15 6 10 4 5 2 0 300 IQ Current Consumption versus Input Voltage 30 mA 0 0 Data Sheet 10 20 30 40 V 50 VΙ 13 R L = 25 Ω 0 2 4 6 8 V 10 VΙ Rev. 2.8, 2007-03-20 TLE 4263 Charge Current and Discharge Current versus Temperature Ι Output Voltage versus Temperature AED03064 80 µA 70 VQ Ι D, ch 5.1 V Ι = 13.5 V V D = 1.5 V 5.0 60 50 40 AED01090 5.2 V VI = 13.5 V 4.9 30 4.8 20 0 -40 4.7 Ι D, dis 10 0 80 40 4.6 -40 120 C 160 Tj 0 40 80 120 ˚C 160 Tj Pulse Time versus Temperature Output Current versus Input Voltage AED03065_4263 40 ms TWI,tr 35 AED01091 300 ΙQ mA T j = 25 C 250 30 200 V Ι = 13.5 V C D = 100 nF 25 20 150 15 100 10 50 5 0 -40 Data Sheet 0 40 80 0 120 C 160 Tj 14 0 10 20 30 40 V 50 VΙ Rev. 2.8, 2007-03-20 TLE 4263 Package Outlines 1.75 MAX. C 1) 4 -0.2 B 1.27 0.64 ±0.25 0.1 2) 0.41+0.10 -0.06 6±0.2 0.2 M A B 14x 14 0.2 M C 8 1 7 1) 8.75 -0.2 8˚MAX. 0.19 +0.06 0.175 ±0.07 (1.47) 0.35 x 45˚ A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01230 Figure 7 PG-DSO-14-30 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 15 Rev. 2.8, 2007-03-20 1.27 0.35 7.6 -0.2 1) 8˚ MAX. 0.35 x 45˚ 0.23 +0.09 2.65 MAX. 2.45 -0.2 0.2 -0.1 TLE 4263 0.4 +0.8 0.1 +0.15 2) 0.2 20x 20 10.3 ±0.3 11 10 1 12.8 -0.2 1) Index Marking 1) 2) Does not include plastic or metal protrusion of 0.15 max. per side Does not include dambar protrusion of 0.05 max. per side GPS05094 Figure 8 PG-DSO-20-35 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 16 Rev. 2.8, 2007-03-20 TLE 4263 1.27 0.1 0.41 +0.1 -0.06 0.19 +0.0 6 B 0.64 ±0.25 0.2 M A B 8x 8 5 Index Marking 1 4 5 -0.21) 8° MAX. 4 -0.21) 1.75 MAX. 0.175 ±0.07 (1.45) 0.35 x 45° 6 ±0.2 A 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01229 Figure 9 PG-DSO-8-16 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 17 Rev. 2.8, 2007-03-20 TLE 4263 Revision History Version Date Rev. 2.8 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4263 Page 1: AEC certified statement added Page 1 and Page 15 ff:RoHS compliance statement and Green product feature added Page 1 and Page 15 ff: Package changed to RoHS compliant version Legal Disclaimer updated Data Sheet Changes 18 Rev. 2.8, 2007-03-20 Edition 2007-03-20 Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. 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