IRF STR

IRIS-A6372
Features
INTEGRATED SWITCHER
• Oscillator is provided on the monolithic control with adopting On-ChipTrimming technology.
• Small temperature characteristics variation by adopting a comparator to
compensate for temperature on the control part.
Package Outline
• Low start-up circuit current (50uA max)
• Built-in Active Low-Pass Filter for stabilizing the operation in case of light
load
• Avalanche energy guaranteed MOSFET with high VDSS
• The built-in power MOSFET simplifies the surge absorption circuit since the
MOSFET guarantees the avalanche energy.
• No VDSS de-rating is required.
• Built-in constant voltage drive circuit
• Various kinds of protection functions
8 Lead PDIP
• Pulse-by-pulse Overcurrent Protection (OCP)
• Overvoltage Protection with latch mode (OVP)
Key Specifications
• Thermal Shutdown with latch mode (TSD)
Type
Descriptions
IRIS-A6372
MOSFET
VDSS(V)
900
RDS(ON)
MAX
7.7Ω
AC input(V)
Pout(W)
Note 1
230±15%
6
85 to 264
4
IRIS-A6372 is a hybrid IC consists from power MOSFET and a controller IC, designed for PRC
fly-back converter type SMPS (Switching Mode Power Supply) applications, applicable for PRC
operation for small power SMPS. This IC realizes downsizing and standardizing of a power supply
system reducing external components count and simplifying the circuit designs. (Note). PRC is
abbreviation of “Pulse Ratio Control” (On-width control with fixed OFF-time).
Typical Connection Diagram
STR-A6372
1
8
2
7
3
6
4
5
www.irf.com
IRIS-A6372
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are
absolute voltages referenced to terminals stated, all currents are defined positive into any lead. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Symbol
IDpeak
Definition
Drain Current
*1
IDMAX
Maximum switching current *5
EAS
Vin
Vth
P D1
P D2
TF
Top
Tstg
Tch
Single pulse avalanche energy *2
Input voltage for control part
O.C.P/F.B Pin voltage
Power dissipation for MOSFET *3
Power dissipation for control part
(Control IC) *4
Internal frame temperature
in operation
Operating ambient temperature
Storage temperature
Channel temperature
Terminals Max. Ratings
8
1.18
Units
A
8
1.18
A
8-1
3-2
4-2
8-1
24.9
35
6
1.35
mJ
V
V
W
3-2
0.14
W
-
-20 ~ +125
-20 ~ +125
-40 ~ +125
150
℃
℃
℃
℃
Note
Single Pulse
V1-2=0.82V
Ta=-20~+125℃
Single Pulse
VDD=99V,L=20mH
IL=1.18A
*6
Specified by
Vin×Iin
Refer to recommended
operating temperature
*1 Refer to MOS FET A.S.O curve
*2 MOS FET Tch-EAS curve
*3 Refer to MOS FET Ta-PD1 curve
Fig.1
V1-2
*4 Refer to TF-PD2 curve for Control IC (See page 5)
*5 Maximum switching current. The maximum switching current is the Drain current determined by the drive
voltage of the IC and threshold voltage (Vth) of MOS FET. Therefore, in the event that voltage drop
occurs between Pin 1and Pin 2 due to patterning, the maximum switching current decreases as shown by
V1-2 in Fig.1 Accordingly please use this device within the decrease value, referring to the derating
curve of the maximum switching current.
*6 When embedding this hybrid IC onto the printed circuit board (board size 15mm×15mm)
www.irf.com
IRIS-A6372
Electrical Characteristics (for Control IC)
Electrical characteristics for control part (Ta=25℃, Vin=20V,unless otherwise specified)
Symbol
Vin(ON)
Vin(OFF)
Iin(ON)
Iin(OFF)
TOFF(MAX)
Vth
IOCP/FB
Vin(OVP)
Ratings
TYP
17.6
10.1
15
0.76
0.8
25.5
MIN
15.8
9.1
12
0.7
0.7
23.2
Definition
Operation start voltage
Operation stop voltage
*7
Circuit current in operation
Circuit current in non-operation
Maximum OFF time
O.C.P/F.B Pin threshold voltage
O.C.P/F.B Pin extraction current
O.V.P operation voltage
Units
V
V
mA
µA
µsec
V
mA
V
MAX
19.4
11.1
5
50
18
0.82
0.9
27.8
Test
Conditions
Vin=0→19.4V
Vin=19.4→9.1V
Vin=15V
Vin=0→27.8V
Vin=27.8→
Iin(H)
Latch circuit sustaining current *8
Vin(La.OFF) Latch circuit release voltage *7,8
Tj(TSD) Thermal shutdown operating temperature
7.9
135
-
70
10.5
-
µA
V
℃
(Vin(OFF)-0.3)V
Vin=27.8→7.9V
-
*7 The relation of Vin(OFF)>Vin(La.OFF) is applied for each product.
*8 The latch circuit means a circuit operated O.V.P and T.S.D.
Electrical Characteristics (for MOSFET)
(Ta=25℃) unless otherwise specified
Symbol
Definition
MIN
Ratings
TYP
MAX
Units
Test Conditions
900
-
-
V
V2- 1=0V(short)
-
-
300
µA
V2- 1=0V(short)
-
-
7.7
250
Ω
nsec
ID=300µA
VDSS
Drain-to-Source breakdown voltage
IDSS
Drain leakage current
VDS =900V
V3- 2 =10V
RDS(ON) On-resistance
tf
Switching time
ID=0.4A
Between channel and
θch-F
Thermal resistance
*9
-
-
52
℃/W
internal frame
*9 Internal frame temperature (TF) is measured at the root of the Pin 5.
www.irf.com
IRIS-A6372
IRIS-A6372
IRIS-A6372
A.S.O. temperature derating coefficient curve
MOSFET A.S.O. Curve
10
80
Drain current
limit by ON
resistance
Drain CurrentD I[A]
A.S.O. temperature derating coefficient[%]
100
60
40
1
1ms
ASO temperature derating
shall be made by obtaining
ASO Coefficient from the left
curve in your use.
0.1
20
0
0
20
40
60
80
100
0.01
120
1
Internal frame temperature TF [℃]
10
100
D rain-to-Source V oltage V D S[V ]
1000
IRIS-A6372
Avalanche energy derating curve
IRIS-A6372
Maximum Switching current derating curve
Ta=‐20~+125℃
1.4
100
EAS temperature derating coefficient[%]
1.2
Maximum Switchng Current IDMAX[A]
0.1ms
1.0
0.8
0.6
0.4
80
60
40
20
0.2
0
0.0
25
0.8
0.9
1.0
V1-2 [V]
1.1
1.2
50
75
100
125
150
Channel temperature Tch [℃]
www.irf.com
IRIS-A6372
IRIS-A6372
MIC TF-PD2 Curve
IRIS-A6372
MOSFET Ta-PD1 Curve
0.16
1.6
PD2=0.14[W]
PD1=1.35[W]
1.4
0.14
0.12
Power dissipation P D2[W]
Power dissipation P D1[W]
1.2
1
0.8
0.6
0.10
0.08
0.06
0.4
0.04
0.2
0.02
0
0
20
40
60
80
100
120
140
0.00
160
0
Ambient temperature Ta[℃]
20
40
60
80
100 120 140 160
Internal frame temperature TF[℃]
IRIS-A6372
Transient thermal resistance curve
Transient thermal resistance θch-c[℃/W]
10
1
0.1
0.01
1µ
10µ
100µ
1m
10m
100m
tim e t [sec]
www.irf.com
IRIS-A6372
Block Diagram
3 Vin
OVP
UVLO
+
+
-
REG
-
Latch
Delay
TSD
Internal Bias
+
-
REG
PWM
OSC
7,8
D
Latch
Drive
S Q
R
1
S
OCP
Comp.
4
+
-
Icont
OCP/FB
2,5
GND
Lead Assignments
Pin No.
Pin Assignment
(Top View)
Source
1
8
Drain
GND
2
7
Drain
Vin
3
6
N.C.
OCP/FB
4
5
GND
1
2
3
Symbol
S
GND
Vin
4
5
6
7
OCP/FB
GND
N.C.
D
Description
Source Pin
Ground Pin
Power supply Pin
Overcurrent / Feedback
Pin
Ground Pin
Drain Pin
Function
MOSFET source
Ground
Input of power supply for control circuit
Input of overcurrent detection
signal / constant voltage control signal
Ground
Not Connected
MOSFET drain
Other Functions
O.V.P. – Overvoltage Protection Circuit
T.S.D. – Thermal Shutdown Circuit
www.irf.com
IRIS-A6372
Case Outline
8
7
6
5
A6372
a
b
c
IR
1
2
3
4
a. Type Number
b. Lot Number
1st letter:The last digit of year
2nd letter:Month
(1 to 9 for Jan. to Sept.,
O for Oct. N for Nov. D for Dec.)
3rd letter:Week
1~3 : Arabic numerals
c. Registration Number
Material of Pin : Cu
Treatment of Pin : Solder plating
Weight: Approx. 0.51g
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC FAX: (310) 252-7903
Visit us at www.irf.com for sales contact information.
www.irf.com