PROFET® BTS 620 L1 Smart Two Channel Highside Power Switch Features Product Summary Overvoltage protection Operating voltage • Overload protection • Current limitation • Short circuit protection • Thermal shutdown • Overvoltage protection (including load dump) • Reverse battery protection1) • Undervoltage and overvoltage shutdown with auto-restart and hysteresis • Open drain diagnostic output • Open load detection in ON-state • CMOS compatible input • Loss of ground and loss of Vbb protection • Electrostatic discharge (ESD) protection Vbb(AZ) Vbb(on) 43 5.0 ... 24 V V both channels: each parallel 100 50 mΩ 4.4 8.5 A 10 10 A On-state resistance RON Load current (ISO) IL(ISO) Current limitation IL(SCr) TO-220AB/7 Application 7 • µC compatible power switch with diagnostic feedback for 12 V DC grounded loads • Most suitable for resistive and lamp loads 1 Standard General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Fully protected by embedded protection functions. Voltage source V 3 IN1 6 IN2 Level shifter sensor Rectifier 1 Logic 4 PROFET Open load Short to Vbb detection 1 Current limit 2 GND 2 1 Temperature sensor 1 Gate 2 protection OUT2 Level shifter Rectifier 2 1) + V bb Gate 1 protection OUT1 Charge pump 1 Charge pump 2 ST Current limit 1 Logic Voltage ESD 5 Overvoltage protection 7 Temperature sensor 2 Open load Short to Vbb detection 2 Signal GND R R O1 Load O2 GND Load GND With external current limit (e.g. resistor RGND=150 Ω) in GND connection, resistor in series with ST connection, reverse load current limited by connected load. Semiconductor Group 1 12.96 BTS 620 L1 Pin Symbol Function 1 OUT1 (Load, L) Output 1, protected high-side power output of channel 1 2 GND Logic ground 3 IN1 Input 1, activates channel 1 in case of logical high signal 4 Vbb 5 ST Positive power supply voltage, the tab is shorted to this pin Diagnostic feedback: open drain, low on failure 6 IN2 Input 2, activates channel 2 in case of logical high signal 7 OUT2 (Load, L) Output 2, protected high-side power output of channel 2 Maximum Ratings at Tj = 25 °C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 3) Supply voltage for full short circuit protection Tj Start=-40 ...+150°C Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V RI3)= 2 Ω, RL= 2.7 Ω, td= 200 ms, IN= low or high Load current (Short circuit current, see page 4) Operating temperature range Storage temperature range Power dissipation (DC), TC ≤ 25 °C Electrostatic discharge capability (ESD) IN: (Human Body Model) all other pins: Symbol Vbb Vbb 43 24 Unit V V 60 V IL Tj Tstg Ptot VESD self-limited -40 ...+150 -55 ...+150 75 1.0 2.0 A °C VIN IIN IST -10 ... +16 ±2.0 ±5.0 V mA Values typ max -1.7 -3.4 -75 Unit VLoad dump4) Values W kV acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 Input voltage (DC) Current through input pin (DC) Current through status pin (DC) see internal circuit diagrams page 6 Thermal Characteristics Parameter and Conditions Thermal resistance 2) 3) 4) Symbol chip - case, both channels: RthJC each channel: junction - ambient (free air): RthJA min ---- K/W Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a 150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the protection of the input is integrated. RI = internal resistance of the load dump test pulse generator VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 Semiconductor Group 2 BTS 620 L1 Electrical Characteristics Parameter and Conditions, each channel Symbol at Tj = 25 °C, Vbb = 12 V unless otherwise specified Values min typ max Unit Load Switching Capabilities and Characteristics On-state resistance (pin 4 to 1 or 7) IL = 2 A Tj=25 °C: RON Tj=150 °C: each channel Nominal load current, ISO Norm (pin 4 to 1 or 7) VON = 0.5 V, TC = 85 °C each channel: IL(ISO) both channels parallel: Output current (pin 1 or 7) while GND disconnected or GND pulled up, Vbb=30 V, VIN= 0, see diagram page 7 Turn-on time IN to 90% VOUT: Turn-off time IN to 10% VOUT: RL = 12 Ω, Tj =-40...+150°C Slew rate on 10 to 30% VOUT, RL = 12 Ω, Tj =-40...+150°C Slew rate off 70 to 40% VOUT, RL = 12 Ω, Tj =-40...+150°C Operating Parameters Operating voltage 5) Operating voltage6) Undervoltage shutdown Undervoltage restart Tj =-40...+150°C: Tj =-40...+150°C: Tj =-40...+150°C: Tj =-40...+25°C: Tj =+150°C: Undervoltage restart of charge pump Tj =-40...+150°C: see diagram page 10 Undervoltage hysteresis ∆Vbb(under) = Vbb(u rst) - Vbb(under) Tj =-40...+150°C: Overvoltage shutdown Tj =-40...+150°C: Overvoltage restart Tj =-40...+150°C: Overvoltage hysteresis Tj =-40...+150°C: Overvoltage protection7) Ibb=40 mA Standby current (pin 4) VIN=0 Tj=-40...+25°C: Tj= 150°C: 5) 6) 7) -- 80 100 200 3.5 6.8 160 4.4 8.5 -- -- --10 ton toff 80 80 200 200 400 400 µs dV /dton 0.1 -- 1 V/µs -dV/dtoff 0.1 -- 1 V/µs Vbb(on) Vbb(on) Vbb(under) Vbb(u rst) 5.0 5.0 3.5 -- ----- V V V V Vbb(ucp) -- 5.6 34 24 5.0 5.0 7.0 7.0 ∆Vbb(under) -- 0.2 -- V Vbb(over) Vbb(o rst) ∆Vbb(over) Vbb(AZ) 24 23 -42 --0.5 47 34 ---- V V V V --- 14 17 30 35 µA IL(GNDhigh) Ibb(off) At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V At supply voltage increase up to Vbb= 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V See also VON(CL) in table of protection functions and circuit diagram page 7. Semiconductor Group 3 mΩ A mA V BTS 620 L1 Parameter and Conditions, each channel Symbol at Tj = 25 °C, Vbb = 12 V unless otherwise specified Leakage output current (included in Ibb(off)) VIN=0 Operating current (Pin 2)8), VIN=5 V both channels on, Tj =-40...+150°C Operating current (Pin 2)8) one channel on, Tj =-40...+150°C: Protection Functions Initial peak short circuit current limit (pin 4 to 1 or 7) Tj =-40°C: Tj =25°C: Tj =+150°C: Repetitive short circuit shutdown current limit Tj = Tjt (see timing diagrams, page 9) Thermal overload trip temperature Thermal hysteresis Reverse battery (pin 4 to 2) 9) Reverse battery voltage drop (Vout > Vbb) IL = -2.9 A, each channel Tj=150 °C: Diagnostic Characteristics Open load detection current (on-condition, ) Unit IL(off) -- -- 12 µA IGND -- 4 6 mA IGND -- 2 3 mA 16 12 7 22 18 11 28 24 15 A -150 --- 10 -10 -- ---32 A °C K V -- 610 -- mV 800 800 550 ---- 1450 1300 1200 mA 2 3 4 V 4 10 30 kΩ IL(SCp) IL(SCr) Tjt ∆Tjt -Vbb -VON(rev) Tj=-40 °C: IL (OL) Tj=25°C: Tj=150°C: Open load detection voltage10) (off-condition) VOUT(OL) Tj=-40..150°C: Internal output pull down (pin 1 or 7 to 2), VOUT=5 V, Tj=-40..150°C RO 8) Values min typ max Add IST, if IST > 0, add IIN, if VIN>5.5 V Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 2 and circuit page 7). 10) External pull up resistor required for open load detection in off state. 9) Semiconductor Group 4 BTS 620 L1 Parameter and Conditions, each channel Symbol Values min typ max RI 2.5 3.5 6 kΩ VIN(T+) VIN(T-) ∆ VIN(T) IIN(off) 1.7 1.5 -1 --0.5 -- 3.5 --50 V V V µA On state input current (pin 3 or 6), VIN = 3.5 V, Tj =-40..+150°C IIN(on) 20 50 90 µA Delay time for status with open load after switch off (other channel in off state) (see timing diagrams, page 10), Tj =-40..+150°C Delay time for status with open load after switch off (other channel in on state) (see timing diagrams, page 10), Tj =-40..+150°C Status invalid after positive input slope Tj=-40 ... +150°C: (open load) Status output (open drain) Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: Tj =-40...+25°C, IST = +1.6 mA: ST low voltage Tj = +150°C, IST = +1.6 mA: td(ST OL4) 100 320 800 µs td(ST OL5) -- 5 20 µs td(ST) -- 200 600 µs 5.4 --- 6.1 --- -0.4 0.6 V at Tj = 25 °C, Vbb = 12 V unless otherwise specified Input and Status Feedback11) Input resistance Tj=-40..150°C, see circuit page 6 Input turn-on threshold voltage Tj =-40..+150°C: Tj =-40..+150°C: Input turn-off threshold voltage Input threshold hysteresis Off state input current (pin 3 or 6), VIN = 0.4 V, Tj =-40..+150°C 11) VST(high) VST(low) If a ground resistor RGND is used, add the voltage drop across this resistor. Semiconductor Group 5 Unit BTS 620 L1 Truth Table Normal operation Channel 1 Open load Channel 2 Channel 1 Short circuit to Vbb Channel 2 both channel Overtemperature Channel 1 Channel 2 Undervoltage/ Overvoltage L = "Low" Level H = "High" Level IN1 IN2 OUT1 OUT2 L L H H L L H L H X L L H L H X L X H L H X X X L H L H L H X L L H L H X L L H L H X X X L H X L L H H Z Z H L H X H H H L H X L L L L L X X L L H L H L H X Z Z H L H X H H H L L L X X L L L X = don't care Z = high impedance, potential depends on external circuit Status signal after the time delay shown in the diagrams (see fig 5. page 10) Terms V bb ST BTS620L1 BTS621L1 H H H H H(L12)) H L H(L12)) H L L13) H H(L14)) L13) H H(L14)) H L L H L H L H Input circuit (ESD protection) 4 I IN1 3 Ibb Vbb IN1 OUT1 I IN2 6 IN2 I ST ST V V IN1 IN2 V 5 ST 1 PROFET OUT2 GND GND IN I L1 I ESD-ZD I I L2 I I GND 7 V OUT1 2 R R V ON1 V ON2 I GND ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). VOUT2 12) With additional external pull up resistor An external short of output to Vbb, in the off state, causes an internal current from output to ground. If R GND is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious. 14) Low resistance to V may be detected in the ON-state by the no-load-detection bb 13) Semiconductor Group 6 BTS 620 L1 Status output Open-load detection +5V ON-state diagnostic condition: VON < RON * IL(OL); IN high R ST(ON) ST + V bb ESDZD GND VON ON ESD-Zener diode: 6.1 V typ., max 5 mA; RST(ON) < 380 Ω at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). OUT Open load detection Logic unit overvoltage output clamp + V bb V OFF-state diagnostic condition: VOUT > 3 V typ.; IN low Z VON R OFF OUT GND PROFET V Open load detection Logic unit VON clamped to 47 V typ. Overvolt. and reverse batt. protection R O Signal GND + V bb IN1 V RI GND disconnect Z2 IN2 Logic R ST V 4 bb ST 3 V IN1 Ibb Vbb OUT1 Z1 6 GND IN2 5 ST GND 2 Signal GND V VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI= 3.5 kΩ typ, RGND= 150 Ω V V IN1 IN2 ST V GND In case of Input=high is VOUT ≈ VIN - VIN(T+) . Due to VGND >0, no VST = low signal available. 7 1 PROFET OUT2 R GND Semiconductor Group EXT 7 OUT BTS 620 L1 Typ. transient thermal impedance chip case ZthJC = f(tp), both Channel active GND disconnect with GND pull up ZthJC [K/W] 1 4 3 V Vbb IN1 OUT1 IN1 V 6 IN2 5 IN2 PROFET ST GND OUT2 1 7 2 V V bb V ST GND 0.1 If VGND > VIN - VIN(T+) device stays off Due to VGND >0, no VST = low signal available. D= 0.5 0.2 0.1 0.05 0.02 0.01 0 Typ. transient thermal impedance chip case ZthJC = f(tp), one Channel active ZthJC [K/W] 10 0.01 1E-5 1E-3 1E-2 1E-1 1E0 1E1 tp [s] 1 D= 0.5 0.2 0.1 0.05 0.02 0.01 0 0.1 0.01 1E-5 1E-4 1E-4 1E-3 1E-2 1E-1 1E0 1E1 tp [s] Semiconductor Group 8 BTS 620 L1 Timing diagrams Both channels are symmetric and consequently the diagrams are valid for each channel as well as for permuted channels Figure 1a: Vbb turn on: Figure 3a: Short circuit shut down by overtempertature, reset by cooling IN1 IN other channel: normal operation IN2 V bb IL V I L(SCp) OUT1 IL(SCr) V OUT2 ST ST open drain t t Heating up may require several milliseconds, depending on external conditions Figure 2a: Switching a lamp: Figure 4a: Overtemperature: Reset if Tj <Tjt IN ST IN V ST OUT V I OUT L t T J t Semiconductor Group 9 BTS 620 L1 Figure 5a: Open load: detection in ON-state, open load occurs in on-state Figure 5c: Open load: detection in ON- and OFF-state (with REXT), turn on/off to open load IN1 IN1 IN2 channel 2: normal operation IN2 V VOUT1 OUT1 channel 1: open load IL1 channel 2: normal operation normal load t d(ST OL1) t d(ST OL2) I L1 open load t d(ST OL1) t d(ST OL2) ST channel 1: open load t t d(ST) d(ST) t d(ST OL5) ST t t td(ST OL1) = 30 µs typ., td(ST OL2) = 20 µs typ td(ST OL5) depends on external circuitry because of high impedance Figure 5b: Open load: detection in ON-state, turn on/off to open load Figure 6a: Undervoltage: IN1 IN IN2 channel 2: normal operation V bb V V bb(under) OUT1 I Vbb(u cp) V bb(u rst) V OUT L1 channel 1: open load t d(ST) t d(ST OL4) t d(ST) t ST open drain d(ST OL5) ST t Semiconductor Group t 10 BTS 620 L1 Figure 6b: Undervoltage restart of charge pump on-state off-state V V bb(u rst) V V V bb(over) off-state VON(CL) V on bb(o rst) bb(u cp) bb(under) V bb charge pump starts at Vbb(ucp) =5.6 V typ. Figure 7a: Overvoltage: IN V bb V ON(CL) Vbb(over) V bb(o rst) V OUT ST t Semiconductor Group 11 BTS 620 L1 Package and Ordering Code All dimensions in mm Standard TO-220AB/7 BTS620L1 Ordering code Q67060-S6301-A2 Changed since 04.96 Date Change td(ST OL4) max reduced from Dec 1996 1500 to 800µs, typical from 400 to 320µs, min limit unchanged Zth specification added max Output leakage current IL(off) reduced from 20 to 12 µA increased ESD capability Typ. reverse battery voltage drop VON(rev) added Semiconductor Group 12