5-V Low Drop Fixed Voltage Regulator TLE 4279 Features • • • • • • • • • • • • Output voltage tolerance ≤ ±2% 150 mA current capability Very low current consumption Early warning Reset output low down to VQ = 1 V Overtemperature protection Reverse polarity proof Adjustable reset threshold Very low-drop voltage Wide temperature range Green Product (RoHS compliant) AEC Qualified P-DSO-8-3, -6, -7, -8, -9 Functional Description This device is an automotive suited voltage regulator with P-DSO-14-3, -8, -9, -11, 14 a fixed 5-V output, e.g. in a PG-DSO-8-16 package. The maximum operating voltage is 45 V. The output is able to drive 150 mA load. It is short circuit protected and the thermal shutdown switches the output off if the junction temperature is in excess of 150 °C. A reset signal is generated for an output voltage of VQ < 4.65 V. The reset threshold voltage can be decreased by external connection of a voltage divider. The reset delay time can be set by an external capacitor. If the application requires pull-up resistors at the logic outputs (Reset, Sense Out) the TLE 4269 with integrated resistors can be used. It is also possible to supervise the input voltage by using an integrated comparator to give a low voltage warning. Type Package TLE 4279 G PG-DSO-8-16 TLE 4279 GM PG-DSO-14-30 Data Sheet 1 Rev. 2.4, 2007-03-20 TLE 4279 PG-DSO-8-16 Ι SΙ RADJ D 1 2 3 4 8 7 6 5 Q SO RO GND AEP01668 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions (TLE 4279 G) Pin No. Symbol Function 1 I Input; block to GND directly at the IC with a ceramic capacitor 2 SI Sense input; if not needed connect to Q 3 RADJ Reset threshold adjust; if not needed connect to ground 4 D Reset delay; to select the delay time, connect to GND via external capacitor 5 GND Ground 6 RO Reset output; open-collector output. Keep open, if not needed 7 SO Sense output; open-collector output. Keep open, if not needed 8 Q 5-V output; connect to GND with a 10 µF capacitor, ESR < 10 Ω Data Sheet 2 Rev. 2.4, 2007-03-20 TLE 4279 PG-DSO-14-30 RADJ D GND GND GND GND RO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 SI Ι GND GND GND Q SO AEP02248 Figure 2 Pin Configuration (top view) Table 2 Pin Definitions and Functions (TLE 4279 GM) Pin No. Symbol Function 1 RADJ Reset threshold adjust; if not needed connect to GND 2 D Reset delay; connect to GND via external delay capacitor for setting delay time 3, 4, 5, 6 GND Ground 7 RO Reset output; open-collector output. Keep open, if not needed 8 SO Sense output; open-collector output. Keep open, if not needed 9 Q 5-V output; connect to GND via 10 µF capacitor, ESR < 10 Ω 10, 11, 12 GND Ground 13 I Input; block to GND directly at the IC by a ceramic capacitor 14 SI Sense input; if not needed connect to Q Data Sheet 3 Rev. 2.4, 2007-03-20 TLE 4279 Circuit Description The control amplifier compares a reference voltage, made highly accurate by resistance balancing, with a voltage proportional to the output voltage and drives the base of the series PNP transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or equal VUD. The delay capacitor CD is charged with the current ID for output voltages greater than the reset threshold VRT. If the output voltage gets lower than VRT (‘reset condition’) a fast discharge of the delay capacitor CD sets in and as soon as VD gets lower than VLD the reset output RO is set to low-level. The time gap for the delay capacitor discharge is the reset reaction time tRR. The reset threshold VRT can be decreased via an external voltage divider connected to the pin RADJ. In this case the reset condition is reached if VQ < VRT and VRADJ < VRAQDJ,TH. Dimensioning the voltage divider (see Figure 4) according to: VTHRES = VRADJ,TH × (RRADJ1 + RRADJ2) / RRADJ2, (1) the reset threshold can be decreased down to 3.5 V. If the reset-adjust-option is not needed the RADJ-pin should be connected to GND causing the reset threshold to go to its default value (typ. 4.65 V). A built in comparator compares the signal of the pin SI, normally fed by a voltage divider from the input voltage, with the reference and gives an early warning on the pin SO. It is also possible to superwise another voltage e.g. of a second regulator, or to build a watchdog circuit with few external components. Application Description The input capacitor CI is necessary for compensating line influences. Using a resistor of approx. 1 Ω in series with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output capacitor CQ is necessary for the stability of the regulating circuit. Stability is guaranteed at values ≥ 10 µF and an ESR ≤ 10 Ω within the operating temperature range. Both reset output and sense output are open collector outputs and have to be connected to 5 V output via external pull-up resistors ≥ 10 kΩ. For small tolerances of the reset delay the spread of the capacitance of the delay capacitor and its temperature coefficient should be noted. Data Sheet 4 Rev. 2.4, 2007-03-20 TLE 4279 Ι Q Error Amplifier Current and Saturation Control Reference Trimming D RO & Reference SO RADJ SI AEB01955 Figure 3 Data Sheet Block Diagram 5 Rev. 2.4, 2007-03-20 TLE 4279 Table 3 Absolute Maximum Ratings Tj = -40 to 150 °C Parameter Symbol Limit Values Unit Notes Min. Max. VI II -40 45 V – – – – internal limited VSI ISI -40 45 V – 1 1 mA – VRADJ IRADJ -40 7 V – -10 10 mA – VD ID -0.3 7 V – – – – internal limited IGND 50 – mA – VR IR -0.3 7 V – – – – internal limited VSO ISO -0.3 7 V – – – – internal limited VQ IQ -0.5 7 V – -10 – mA – Tj TStg – 150 °C – -50 150 °C – Input Input voltage Input current Sense Input Input voltage Input current Reset Threshold Voltage Current Reset Delay Voltage Current Ground Current Reset Output Voltage Current Sense Output Voltage Current 5-V Output Output voltage Output current Temperature Junction temperature Storage temperature Data Sheet 6 Rev. 2.4, 2007-03-20 TLE 4279 Table 3 Absolute Maximum Ratings (cont’d) Tj = -40 to 150 °C Parameter Symbol Limit Values Unit Notes Min. Max. VI Tj – 45 V – -40 150 °C – Junction-ambient Rthja – – 200 70 K/W K/W PG-DSO-8-16 PG-DSO-14-30 Junction-pin Rthjp – 30 K/W Operating Range Input voltage Junction temperature Thermal Data PG-DSO-14-30 1) 1) measured to Pin 4 Data Sheet 7 Rev. 2.4, 2007-03-20 TLE 4279 Table 4 Characteristics VI = 13.5 V; Tj = -40 °C < Tj < 125 °C Parameter Symbol Limit Values Min. Typ. Max. Unit Measuring Condition Output voltage VQ 4.90 5.00 5.10 V 1 mA ≤ IQ ≤ 100 mA 6 V ≤ VI ≤ 16 V Current limit IQ Iq 150 200 500 mA – – 150 300 µA IQ ≤ 1 mA, Tj < 85 °C Current consumption; Iq = II - IQ Iq – 250 700 µA IQ = 10 mA Current consumption; Iq = II - IQ Iq – 2 8 mA IQ = 50 mA Drop voltage Vdr ∆VQ ∆VQ – 0.25 0.5 V – 10 30 mV – 10 40 mV IQ = 100 mA1) IQ = 5 mA to 100 mA VI = 6 V to 26 V IQ = 1 mA VRT VRADJ,TH 4.50 4.65 4.80 V – 1.26 1.35 1.44 V VQ > 3.5 V VRO,SAT VUD – 0.1 0.4 V Rextern = 20 kΩ 1.4 1.8 2.2 V – VLD 0.3 0.45 0.60 V – – – 0.1 V 3.0 6.5 9.5 µA 17 28 – ms – 1 – µs VQ < VRT VD = 1 V CD = 100 nF CD = 100 nF Current consumption; Iq = II - IQ Load regulation Line regulation Reset Generator Switching threshold Reset adjust switching voltage Reset low voltage Upper delay switching threshold Lower delay switching threshold Reset delay low voltage VD,SAT Charge current Delay time L → H Delay time H → L Data Sheet ID td tt 8 Rev. 2.4, 2007-03-20 TLE 4279 Table 4 Characteristics (cont’d) VI = 13.5 V; Tj = -40 °C < Tj < 125 °C Parameter Symbol Limit Values Unit Measuring Condition Min. Typ. Max. VSI, high VSI, low VSO, low 1.24 1.31 1.38 V – 1.16 1.20 1.28 V – – 0.1 0.4 V VSI < 1.20 V; VQ > 3 V; Rextern = 20 kΩ ISI -1 0.1 1 µA – Input Voltage Sense Sense threshold high Sense threshold low Sense output low voltage Sense input current 1) Drop voltage = VI - VQ (measured when the output voltage has dropped 100 mV from the nominal value obtained at 13.5 V input.) Data Sheet 9 Rev. 2.4, 2007-03-20 TLE 4279 ΙΙ 1000 µF Ι CΙ 470 nF Q TLE 4279 Ι SΙ SI D VΙ GND ΙD VSΙ RADJ SO CQ 22 µF RADJ1 Ι RADJ VQ Ι GND VD CD 100 nF RO ΙQ VRO VSO VRADJ RADJ2 AES01956 Figure 4 Measuring Circuit VI t VQ < t RR V RT dV I D = dt C D VD t V UD V LD V RO td t t RR VRO, SAT t Power-on-Reset Figure 5 Data Sheet Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED01542 Reset Timing Diagram 10 Rev. 2.4, 2007-03-20 TLE 4279 Sense Input Voltage VSI, High VSI, Low t Sense Output High Low t AED03049 Figure 6 Data Sheet Sense Input Timing Diagram 11 Rev. 2.4, 2007-03-20 TLE 4279 Charge Current ID versus Temperature Tj ΙD Switching Voltage VUD and VLD versus Temperature Tj AED01803 16 µA 14 V Ι = 13.5 V V C = 1.0 V 12 AED01804 3.2 VD V 2.8 V Ι = 13.5 V 2.4 10 2.0 8 1.6 6 1.2 4 0.8 VUD VLD 0.4 2 0 -40 0 40 80 0 -40 120 C 160 0 40 80 Tj Tj Drop Voltage Vdr versus Output Current IQ Reset Adjust Switching Threshold VRADJ,TH versus Temperature Tj AED01805 500 V dr 120 C 160 AED01806 1.7 V V RADJ, TH 1.6 mV 400 1.5 1.4 300 1.3 Tj = 125 C 200 1.2 Tj = 25 C 1.1 100 1.0 0 0 30 60 90 120 mA 0.9 -40 180 ΙQ Data Sheet 0 40 80 120 C 160 Tj 12 Rev. 2.4, 2007-03-20 TLE 4279 Current Consumption IQ versus Input Voltage VI Output Voltage VQ versus Input Voltage VI AED01807 30 Ι q mA VQ V 25 10 20 8 RL = 33 Ω 15 6 10 RL = 50 Ω 4 RL = 50 Ω RL = 100 Ω 5 0 AED01808 12 2 RL = 200 Ω 0 10 20 30 0 40 V 50 0 2 4 6 VΙ V SI Output Voltage VQ versus Temperature Tj AED01809 AED01671 5.2 VQ V V Ι = 13.5 V 1.5 V 10 VΙ Sense Threshold VSI versus Temperature Tj 1.6 8 V 5.1 V Ι = 13.5 V 1.4 5.0 Sense Output High 1.3 4.9 Sense Output Low 1.2 4.8 1.1 4.7 1.0 -40 0 40 80 4.6 -40 120 C 160 Tj Data Sheet 0 40 80 120 C 160 Tj 13 Rev. 2.4, 2007-03-20 TLE 4279 Output Current IQ versus Input Voltage VI Current Consumption Iq versus Output Current IQ AED01810 350 AED01811 12 Ι Q mA Ι q mA 300 10 V Ι = 13.5 V Tj = 25 C 250 8 Tj = 25 C 200 6 150 Tj = 125 C 4 100 2 50 0 0 10 20 30 0 40 V 50 0 20 40 60 80 mA 120 ΙQ VΙ Current Consumption Iq versus Output Current IQ Ιq AED01812 1.6 mA 1.4 V Ι = 13.5 V Tj = 25 C 1.2 1.0 0.8 0.6 0.4 0.2 0 0 10 20 30 40 mA 50 ΙQ Data Sheet 14 Rev. 2.4, 2007-03-20 TLE 4279 Package Outlines 1.27 0.1 0.41 +0.1 -0.06 0.19 +0.0 6 B 0.64 ±0.25 0.2 M A B 8x 8 5 Index Marking 1 4 5 -0.21) 8° MAX. 4 -0.21) 1.75 MAX. 0.175 ±0.07 (1.45) 0.35 x 45° 6 ±0.2 A 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01229 Figure 7 PG-DSO-8-16 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 15 Rev. 2.4, 2007-03-20 TLE 4279 1.75 MAX. C 1) 4 -0.2 B 1.27 0.64 ±0.25 0.1 2) 0.41+0.10 -0.06 6±0.2 0.2 M A B 14x 14 0.2 M C 8 1 7 1) 8.75 -0.2 8˚MAX. 0.19 +0.06 0.175 ±0.07 (1.47) 0.35 x 45˚ A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01230 Figure 8 PG-DSO-14-30 (Plastic Dual Small Outline) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 16 Rev. 2.4, 2007-03-20 TLE 4279 Revision History Version Date Rev. 2.4 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4279 Page 1: AEC certified statement added Page 1 and Page 15f: RoHS compliance statement and Green product feature added Page 1 and Page 15f: Packages changed to RoHS compliant version Legal Disclaimer updated Data Sheet Changes 17 Rev. 2.4, 2007-03-20 Edition 2007-03-20 Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. 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