IPP13N03LB G OptiMOS®2 Power-Transistor Product Summary Features V DS • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC1) for target application 30 R DS(on),max 12.8 ID 30 V mΩ A • N-channel - Logic level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) PG-TO220-3-1 • Superior thermal resistance • 175 °C operating temperature • dv /dt rated • Pb-free lead plating; RoHS compliant Type Package Marking IPP13N03LB G PG-TO220-3-1 13N03LB Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C2) 30 T C=100 °C 30 Unit A Pulsed drain current I D,pulse T C=25 °C3) 120 Avalanche energy, single pulse E AS I D=30 A, R GS=25 Ω 64 mJ Reverse diode dv /dt dv /dt I D=30 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C 6 kV/µs Gate source voltage4) V GS Power dissipation P tot Operating and storage temperature T j, T stg T C=25 °C IEC climatic category; DIN IEC 68-1 1) ±20 V 52 W -55 ... 175 °C 55/175/56 J-STD20 and JESD22 Rev. 0.95 page 1 2008-05-06 IPP13N03LB G Parameter Values Symbol Conditions Unit min. typ. max. - - 2.9 minimal footprint - - 62 6 cm2 cooling area5) - - 40 30 - - Thermal characteristics Thermal resistance, junction - case R thJC SMD version, device on PCB R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=20 µA 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=30 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=30 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=20 A - 15.2 18.9 mΩ V GS=10 V, I D=30 A - 10.7 12.8 - 1 - Ω 57 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=60 A 2) Current is limited by bondwire; with an R thJC=2.9 K/W the chip is able to carry 47 A. 3) See figure 3 T j,max=150 °C and duty cycle D <0.25 for V GS<-5 V 4) 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 5 Diagrams are related to straight lead versions. Rev. 0.95 page 2 2008-05-06 IPP13N03LB G Parameter Values Symbol Conditions Unit min. typ. max. - 1019 1355 - 364 485 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 49 74 Turn-on delay time t d(on) - 4 7 Rise time tr - 4 6 Turn-off delay time t d(off) - 16 24 Fall time tf - 2.8 4.2 Gate to source charge Q gs - 4.0 5 Gate charge at threshold Q g(th) - 1.6 2.2 Gate to drain charge Q gd - 2.3 3.5 Switching charge Q sw - 5 7 Gate charge total Qg - 8 10 Gate plateau voltage V plateau - 3.9 - V Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 5 V - 7 9 nC Output charge Q oss V DD=15 V, V GS=0 V - 8 11 - - 78 - - 120 V GS=0 V, V DS=15 V, f =1 MHz V DD=15 V, V GS=10 V, I D=20 A, R G=2.7 Ω pF ns Gate Charge Characteristics 6) V DD=15 V, I D=40 A, V GS=0 to 5 V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=80 A, T j=25 °C - 1.23 1.2 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/µs - - 10 nC 6) T C=25 °C A See figure 16 for gate charge parameter definition Rev. 0.95 page 3 2008-05-06 IPP13N03LB G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 60 40 50 30 I D [A] P tot [W] 40 30 20 20 10 10 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 1000 10 0.5 1 1 µs limited by on-state resistance 100 0.1 Z thJC [K/W] I D [A] 10 µs 100 µs DC 10 0.05 0.1 0.02 0.01 single pulse 1 ms 0.01 10 ms 1 0.001 0.1 1 10 100 -6 010 -5 10 0 100-4 10-30 10-20 10-1 0 100 1 t p [s] V DS [V] Rev. 0.95 0.2 page 4 2008-05-06 IPP13N03LB G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 100 100 3 V 3.2 V 10 V 90 90 4.1 V 4.5 V 80 80 70 70 R DS(on) [mΩ] 4.5 V 60 I D [A] 3.8 V 2.8 V 50 4.1 V 40 60 50 40 3.8 V 30 30 3.5 V 20 20 3.2 V 10 10 3V 2.8 V 0 0 0 1 2 10 V 0 3 20 40 V DS [V] 60 80 100 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 70 100 60 50 60 g fs [S] I D [A] 80 40 30 40 20 20 175 °C 10 25 °C 0 0 0 1 2 3 4 5 Rev. 0.95 0 20 40 60 80 I D [A] V GS [V] page 5 2008-05-06 IPP13N03LB G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 2.5 24 22 20 2 18 200 µA 98 % 14 12 1.5 V GS(th) [V] R DS(on) [mΩ] 16 typ 10 20 µA 1 8 6 0.5 4 2 0 0 -60 -20 20 60 100 140 180 -60 -20 20 T j [°C] 60 100 140 180 T j [°C] 11 Typ. Capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 10000 1000 Ciss 1000 100 175 °C 25 °C I F [A] C [pF] Coss 100 175°C 98% 25°C 98% 10 Crss 10 1 0 5 10 15 20 25 30 V DS [V] Rev. 0.95 0.0 0.5 1.0 1.5 2.0 V SD [V] page 6 2008-05-06 IPP13N03LB G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=40 A pulsed parameter: Tj(start) parameter: V DD 100 12 15 V 10 5V 20 V 25 °C 8 100 °C V GS [V] I AV [A] 150 °C 10 6 4 2 1 0 1 10 100 1000 0 10 20 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 38 V GS 36 Qg 34 V BR(DSS) [V] 32 30 28 V g s(th) 26 24 Q g(th) 22 Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 0.95 page 7 2008-05-06 IPP13N03LB G PG-TO220-3-1 Packaging Rev. 0.95 page 8 2008-05-06 IPP13N03LB G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 0.95 page 9 2008-05-06