Type IPD170N04N G OptiMOS®3 Power-Transistor Product Summary Features • Fast switching MOSFET for SMPS • Optimized technology for DC/DC converters V DS 40 V R DS(on),max 17 mΩ ID 30 A 1) • Qualified according to JEDEC for target applications • N-channel, normal level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • 100% Avalanche tested • Pb-free plating; RoHS compliant Type IPD170N04N G Package PG-TO252-3 Marking 170N04N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 °C 30 V GS=10 V, T C=100 °C 23 Pulsed drain current2) I D,pulse T C=25 °C 210 Avalanche current, single pulse 3) I AS T C=25 °C 30 Avalanche energy, single pulse E AS I D=30 A, R GS=25 Ω 5 Gate source voltage V GS 1) Rev. 1.0 ±20 Unit A mJ V J-STD20 and JESD22 page 1 2007-12-11 IPD170N04N G Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Operating and storage temperature T j, T stg Value T C=25 °C IEC climatic category; DIN IEC 68-1 Parameter Unit 31 W -55 ... 175 °C 55/175/56 Values Symbol Conditions Unit min. typ. max. - - 4.9 minimal footprint - - 75 6 cm² cooling area 4) - - 50 40 - - Thermal characteristics Thermal resistance, junction - case R thJC SMD version, device on PCB R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=10 µA 2 - 4 Zero gate voltage drain current I DSS V DS=40 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=40 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=30 A - 14.2 17 mΩ Gate resistance RG - 1.2 - Ω Transconductance g fs 14 28 - S 2) See figure 3 for more detailed information 3) See figure 13 for more detailed information |V DS|>2|I D|R DS(on)max, I D=30 A 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 2 2007-12-11 IPD170N04N G Parameter Values Symbol Conditions Unit min. typ. max. - 660 880 - 230 310 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=20 V, f =1 MHz Output capacitance C oss Reverse transfer capacitance Crss - 7.0 - Turn-on delay time t d(on) - 5.7 - Rise time tr - 1.0 - Turn-off delay time t d(off) - 7.0 - Fall time tf - 2.2 - Gate to source charge Q gs - 4.1 - Gate to drain charge Q gd - 1.1 - - 3.3 - V DD=20 V, V GS=10 V, I D=30 A, R G=1.6 Ω pF ns Gate Charge Characteristics 5) V DD=20 V, I D=30 A, V GS=0 to 10 V nC Switching charge Q sw Gate charge total Qg - 8.2 11 Gate plateau voltage V plateau - 6.2 - V Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V - 7.8 - nC Output charge Q oss V DD=20 V, V GS=0 V - 8.4 - - - 26 - - 210 Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=30 A, T j=25 °C - 1 1.2 Reverse recovery charge Q rr V R=20 V, I F=I S, di F/dt =400 A/µs - 30 - 5) Rev. 1.0 T C=25 °C A V nC See figure 16 for gate charge parameter definition page 3 2007-12-11 IPD170N04N G 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 35 35 30 30 25 25 20 20 I D [A] P tot [W] 1 Power dissipation 15 15 10 10 5 5 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 10 limited by on-state resistance 0.5 102 1 µs 0.2 1 10 µs 101 Z thJC [K/W] I D [A] 0.1 100 µs DC 1 ms 10 0 single pulse 10 ms 100 101 102 0.01 0 0 0 0 0 0 1 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.0 0.01 0.1 10-1 10-1 0.05 0.02 page 4 2007-12-11 IPD170N04N G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 70 40 35 60 5.5 V 10 V 30 50 7V R DS(on) [mΩ] 6V I D [A] 40 6.5 V 30 6V 20 25 6.5 V 7V 20 15 10 V 10 5.5 V 10 5 5V 0 0 0 1 2 3 0 10 20 V DS [V] 30 40 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 70 40 35 60 30 50 25 I D [A] g fs [S] 40 30 20 15 20 10 175 °C 10 5 25 °C 0 0 0 2 4 6 8 V GS [V] Rev. 1.0 0 20 40 60 I D [A] page 5 2007-12-11 IPD170N04N G 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=30 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=250 µA 32 4 28 3.5 24 3 20 2.5 98 % 16 V GS(th) [V] R DS(on) [mΩ] 9 Drain-source on-state resistance typ 2 12 1.5 8 1 4 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 1000 25 °C 103 Coss 102 25 °C, 98% 100 175 °C, 98% I F [A] C [pF] Ciss 175 °C 10 101 Crss 100 1 0 10 20 30 40 Rev. 1.0 0.0 0.5 1.0 1.5 2.0 V SD [V] V DS [V] page 6 2007-12-11 IPD170N04N G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=30 A pulsed parameter: T j(start) parameter: V DD 100 12 20 V 10 8V 32 V V GS [V] I AV [A] 8 10 25 °C 6 100 °C 4 150 °C 2 1 0 10-1 100 101 102 103 0 2 4 6 8 10 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 45 V GS Qg V BR(DSS) [V] 40 35 V g s(th) 30 25 Q g(th) Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 1.0 page 7 2007-12-11 IPD170N04N G Package Outline Footprint: Rev. 1.0 PG-TO252-3 Packaging: page 8 2007-12-11 IPD170N04N G Published by Infineon Technologies AG 81726 Munich, Germany © 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 9 2007-12-11