PROFET® BTS 430 K2 Smart Highside Power Switch Features Product Summary • Clamp of negative voltage at output Vbb-VOUT Avalanche • Short-circuit protection Vbb (operation) • Current limitation Vbb (reverse) • Thermal shutdown RON • Diagnostic feedback IL(lim) • Open load detection in ON-state IL(ISO) • CMOS compatible input • Electrostatic Discharge (ESD) protection • Loss of ground and loss of Vbb protection1) • Reverse battery protection • Undervoltage and overvoltage shutdown with auto-restart and hysteresis Clamp 50 4.5 ... 32 -32 38 36 11 V V V mΩ A A Application • µC compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads • All types of resistive, inductive and capacitve loads • Replaces electromechanical relays and discrete circuits 5 General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic fault feedback, integrated in Smart SIPMOS chip on chip technology. Fully protected by embedded protection functions. R bb Voltage Overvoltage Current Gate source protection limit protection + V bb 3 V Logic 2 Voltage Charge pump sensor Level shifter Limit for unclamped ind. loads Rectifier IN OUT 5 Temperature sensor Open circuit ESD 4 Logic Load detection ST Short circuit detection GND PROFET 1 Signal GND 1) Load GND Additional external diode required for charged inductive loads Semiconductor Group 1 04.96 BTS 430 K2 Pin Symbol Function 1 GND - Logic ground 2 IN I Input, activates the power switch in case of logical high signal 3 Vbb + Positive power supply voltage, the tab is shorted to this pin 4 ST S Diagnostic feedback, low on failure 5 OUT (Load, L) O Output to the load Maximum Ratings at Tj = 25 °C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 3) Symbol Vbb Values Load current (Short-circuit current, see page 4) Operating temperature range Storage temperature range Power dissipation (DC) Inductive load switch-off energy dissipation Electrostatic discharge capability (ESD) Input voltage (DC) Current through input pin (DC) Current through status pin (DC) IL Tj Tstg Ptot EAS VESD VIN IIN IST self-limited -40 ...+150 -55 ...+150 125 1.7 2.0 -10 ... +16 ±5.0 ±5.0 RthJC RthJA ≤1 ≤ 75 54 Unit V A °C W J kV V mA see internal circuit diagrams page 6... Thermal resistance Semiconductor Group chip - case: chip - ambient: 2 K/W BTS 430 K2 Electrical Characteristics Parameter and Conditions Symbol at Tj = 25 °C, Vbb = 12 V unless otherwise specified Values min typ max Unit Load Switching Capabilities and Characteristics On-state resistance (pin 3 to 5) IL = 2 A Tj=25 °C: RON Tj=150 °C: IL(ISO) Nominal load current (pin 3 to 5) ISO Proposal: VON = 0.5 V, TC = 85 °C Output current (pin 5) while GND disconnected or GND pulled up, see diagram page 7 Turn-on time to 90% VOUT: Turn-off time to 10% VOUT: RL = 12 Ω Slew rate on 10 to 30% VOUT, RL = 12 Ω Slew rate off 70 to 40% VOUT, RL = 12 Ω Operating Parameters Tj =-40...+150°C: Operating voltage Tj =-40...+150°C: Undervoltage shutdown Tj =-40...+150°C: Undervoltage restart Undervoltage restart of charge pump see diagram page 12 Undervoltage hysteresis ∆Vbb(under) = Vbb(u rst) - Vbb(under) Tj =-40...+150°C: Overvoltage shutdown Tj =-40...+150°C: Overvoltage restart Tj =-40...+150°C: Overvoltage hysteresis Tj =-40...+150°C: Overvoltage protection2) Ibb=4 mA Standby current (pin 3) Tj=-40...+25°C: VIN=0 Tj=150°C: 3) Operating current (Pin 1) , VIN=5 2) 3) -- 30 38 mΩ 9 55 11 70 -- A -- -- 1 mA ton toff 50 10 160 -- 260 60 µs dV /dton 0.4 -- 2 V/µs -dV/dtoff 1 -- 4 V/µs Vbb(on) Vbb(under) Vbb(u rst) Vbb(ucp) 4.5 2.4 --- ---6.5 32 4.5 4.5 7.5 V V V V ∆Vbb(under) -- 0.2 -- V Vbb(over) Vbb(o rst) ∆Vbb(over) Vbb(AZ) 32 32 -50 --0.2 57 46 ---- V V V V IL(GNDhigh) µA Ibb(off) IGND ---- 12 18 1.1 25 60 -- see also VON(CL) in table protection functions and circuit diagram page 7. Meassured without load. Add IST, if IST > 0 Semiconductor Group 3 mA BTS 430 K2 Parameter and Conditions Symbol at Tj = 25 °C, Vbb = 12 V unless otherwise specified Protection Functions Overload current limit (pin 3 to 5) Tj=-40...+150°C IL(lim) Short circuit shutdown delay after input pos. slope VON > VON(SC), Tj =-40..+150°C: td(SC) Values min typ max 19 36 57 A 80 -- 400 µs VON(CL) -- 50 -- V V VON(SC) Tjt ∆Tjt EAS ELoad12 ELoad24 -150 --- 8.3 -10 -- ---1.7 1.3 1.0 --- -120 32 -- V Ω 10 10 --- 500 600 mA -- 6 -- µA min value valid only, if input "low" time exceeds 30 µs Output clamp (inductive load switch off) at VOUT = Vbb - VON(CL) Short circuit shutdown detection voltage (pin 3 to 5) Thermal overload trip temperature Thermal hysteresis Inductive load switch-off energy dissipation4), Tj Start = 150 °C Vbb = 12 V: Vbb = 24 V: Reverse battery (pin 3 to 1) 5) Integrated resistor in Vbb line Unit -Vbb Rbb °C K J Diagnostic Characteristics Open load detection current (on-condition, ) Leakage output current Tj=25..150°C: IL (OL) Tj=-40 °C: IL(off) (off-condition) 4) 5) While demagnetizing load inductance, dissipated energy in PROFET is EAS= ∫ VON(CL) * iL(t) dt, approx. VON(CL) 2 ), see diagramm page 8 EAS= 1/2 * L * IL * ( VON(CL) - Vbb Reverse load current (through intrinsic drain-source diode) is normally limited by the connected load. Reverse current IGND of ≈ 0.3 A at Vbb= -32 V through the logic heats up the device. Time allowed under these condition is dependent on the size of the heatsink. Reverse IGND can be reduced by an additional external GND-resistor (150 Ω). Input and Status currents have to be limited (see max. ratings page 2 and circuit page 7). Semiconductor Group 4 BTS 430 K2 Parameter and Conditions Symbol at Tj = 25 °C, Vbb = 12 V unless otherwise specified Input and Status Feedback6) Input resistance see circuit page 6 Input turn-on threshold voltage RI Tj =-40..+150°C: Input turn-off threshold voltage Tj =-40..+150°C: Input threshold hysteresis VIN = 0.4 V: Off state input current (pin 2) VIN = 3.5 V: On state input current (pin 2) Tj=-40 ... +150°C: Status valid after input slope (short circuit) Tj=-40 ... +150°C: Status valid after input slope (open load) Status output (open drain) Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA: ST low voltage Tj =-40...+150°C, IST = +1.6 mA: Status voltage while Vbb <2.4 V Tj=25 ... +150°C: IST = 500 µA Tj=40°C: 6) Values min typ max Unit -- 10 -- kΩ VIN(T+) 1.5 -- 2.4 V VIN(T-) 1.0 -- -- V ∆ VIN(T) IIN(off) IIN(on) td(ST SC) -1 10 80 0.5 -25 200 -30 50 400 V µA td(ST) 350 -- 1600 µs VST(high) VST(low) VST 5.4 --- 6.1 --- 6.9 0.4 1.0 1.2 V µs V If a ground resistor RGND is used, add the voltage drop across this resistor. Internal Z-diode typ. 6.1 V, see maximum ratings page 2, circuit page 7 Semiconductor Group 5 BTS 430 K2 Truth Table Input- Output level level 432 D2 432 E2/F2 432 I2 430 K2 L H L H L H L H L H L H L H L H H H H L H L H H (L9)) L L L10) L10) L L H H H L H L H H (L9)) L L H H H H H H L H H L L H L L L10) L10) L L H H H L Normal operation Open load Short circuit to GND Short circuit to Vbb Overtemperature Undervoltage Overvoltage Status 7) H L L H H L L L L L L 8) L H H (L9)) L L L11) L11) L L L = "Low" Level H = "High" Level Terms Status output +5V Ibb 3 I IN 2 Vbb IN IL V V IN VST OUT PROFET I ST 4 ST VON 5 ST GND 1 bb R GND IGND VOUT ESDZD ESD zener diodes are not designed for continuous current GND Short Circuit detection Fault Condition: VON > 8.3 V typ.; IN high Input circuit (ESD protection) + V bb R IN I V ON ESD-ZD I I I OUT GND Logic unit Short circuit detection ESD zener diodes are not designed for continuous current 7) 8) 9) 10) 11) Power Transistor off, high impedance The short circuit signal from last ON state is latched until next turn-on, see timing diagram page 10 Low resistance short Vbb to output may be detected by no-load-detection No current sink capability during undervoltage shutdown Current sink capability see page 5 Semiconductor Group 6 BTS 430 K2 Inductive and overvoltage output clamp GND disconnect + V bb V Z V 3 ON 2 IN OUT Vbb PROFET GND 4 VON clamped to 50 V typ. V bb V I V OUT 5 ST GND 1 S V GND Overvolt. and reverse batt. protection Any kind of load. In case of Input=high VOUT ≈ VI - VIN(T+) Due to VGND >0, no VS = low signal available. + V bb V R IN Z R bb GND disconnect with GND pull up IN Logic V R ST ST GND 3 OUT 2 PROFET IN Vbb PROFET R GND 4 Signal GND OUT 5 ST GND Rbb 120 Ω typ., VZ 57 V typ., , add RGND, RIN, RST for extended protection 1 V V bb I V V S GND Open-load detection Fault Condition: VON < RON * IL(OL); IN high Any kind of load. If VGND > VI - VIN(T+) device stays off Due to VGND >0, no VS = low signal available. + V bb Vbb disconnect with charged inductive load VON ON 3 high OUT Logic unit 2 Open load detection IN Vbb PROFET 4 ST GND 1 V Semiconductor Group 7 bb OUT 5 BTS 430 K2 Inductive Load switch-off energy dissipation 3 high 2 E AS PROFET 4 E bb Vbb IN OUT IN V bb GND 1 PROFET = V ELoad 5 ST ST OUT EL GND bb ER Energy dissipated in PROFET EAS = Ebb + EL - ER. 2 ELoad < EL, EL = 1/2 * L * I L Semiconductor Group 8 BTS 430 K2 Options Overview all versions: High-side switch, Input protection, ESD protection, load dump and reverse battery protection Type Logic version BTS 432D2 432E2 432F2 432I2 430K2 Overtemperature protection Tj >150 °C, latch function12)13) Tj >150 °C, with auto-restart on cooling Short-circuit to GND protection switches off when VON>8.3 V typ.12) (when first turned on after approx. 200 µs) D E X F I X X X X X K X X X X Open load detection in OFF-state with sensing current 30 µA typ. in ON-state with sensing voltage drop across power transistor X X X X X Undervoltage shutdown with auto restart X X X X X Overvoltage shutdown with auto restart X X X X X overtemperature X X X X X short circuit to GND X X X X X15) -14) -14) -14) X -14) open load X X X X X undervoltage X - - X X overvoltage X - - X X X X X X X X X Status feedback for short to Vbb Status output type CMOS X Open drain X X Output negative voltage transient limit (fast inductive load switch off) to Vbb - VON(CL) X X X X Load current limit high level (can handle loads with high inrush currents) medium level X low level (better protection of application) 12) Latch except when Vbb -VOUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT ≠ 0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 4). No latch between turn on and td(SC). 13) With latch function. Reseted by a) Input low, b) Undervoltage, c) Overvoltage 14) Low resistance short V to output may be detected by no-load-detection bb 15) with status latch until next turn on Semiconductor Group 9 BTS 430 K2 Timing diagrams Figure 2b: Switching an inductive load Figure 1a: Vbb turn on, : IN IN V bb t d(bb IN) t d(ST) ST *) V OUT VOUT A ST open drain IL A IL(OL) t in case of too early VIN=high the device may not turn on (curve A) td(bb IN) approx. 150 µs t *) if the time constant of load is too large, open-load-status may occur Figure 2a: Switching a lamp, Figure 3a: Turn on into short circuit, IN IN ST ST V **) *) OUT V OUT t I d(SC) L I L t t typ. td(SC) approx. 200µs, *) depends on history, **) error signal latched until next turn on Semiconductor Group 10 BTS 430 K2 Figure 5a: Open load: detection in ON-state, turn on/off to open load Figure 3b: Short circuit while on: IN IN t ST d(ST) ST *) V V I I OUT OUT L open L t t *) error signal latched until next turn on Figure 5b: Open load: detection in ON-state, open load occurs in on-state Figure 4a: Overtemperature: Reset if Tj <Tjt IN IN td(ST OL1) t d(OL ST2) ST ST V V OUT OUT I T L normal open normal J t t td(ST OL1) = tbd µs typ., td(ST OL2) = tbd µs typ Semiconductor Group 11 BTS 430 K2 Figure 6a: Undervoltage: Figure 7a: Overvoltage: IN IN Vbb Vbb V bb(under) ST ST t Figure 6b: Undervoltage restart of charge pump VON [V] VON(CL) off Vbb(over) Vbb(o rst) bb(u rst) Vbb(u cp) V bb(under) on Vbb [V] charge pump starts at Vbb(ucp) 6.5 V typ. Semiconductor Group Vbb(over) V bb(o rst) bb(u rst) VOUT V ON(CL) V VOUT off V 12 t BTS 430 K2 Package and Ordering Code All dimensions in mm Standard TO-220 AB/5 BTS430K2 TO-220 AB/5, OPTION E3043 Ordering code Ordering code BTS430K2 E3043 Q67060-S6200-A2 Q67060-S6200-A3 SMD TO-220 AB/5, OPTION E3122 BTS430K2 E3122A T&R: Ordering code Q67060-S6200-A4 Changed since 04/96 Case E3122A drawing changed Semiconductor Group 13