INFINEON TLE6282G

Data Sheet TLE6282G
Dual Half Bridge Driver IC
Features
Product Summary
• Compatible to very low ohmic normal Turn on current
level input N-Channel MOSFETs
Turn off current
• Separate input for each MOSFET
Supply
voltage range
• PWM frequency up to 50 kHz
Gate Voltage
• Operates down to 7.5V
Temperature range
supply voltage
• Low EMC sensitivity and emission
• Adjustable dead time with shoot through protection
• Deactivation of dead time and shoot through protection possible
• Short circuit protection for each Mosfet
• Driver undervoltage shut down
• Reverse polarity protection for the driver IC
• Disable function
• Input with TTL characteristics
• 1 bit diagnosis
• Integrated bootstrap diodes
Application
IGxx(on)
IGxx(off)
VVs
VGS
TJ
850
580
7.5 … 60
10
-40...+150
mA
mA
V
V
°C
P-DSO 20
• Dedicated for DC-brush high current motor bridges in PWM control mode and adapted for use in injector and
valve applications for 12, 24 and 42V powernet applications. Useable as four fold lowside driver for unipolar 4
phase motor drives.
• The two half bridges can operate independently. The two half bridges can even operate at different supply
voltages.
General Description
Dual half bridge driver IC for MOSFET power stages with multiple protection functions.
Block Diagram
VS
Charge Pump
Linear
Regulator
BH1
BH2
GND
Floating HS Driver 1
+
VGS limitation HS1
+
Short circuit
SCD
detect.
+
Undervoltage
INH
IH1
IL1
HS1
Input control
IH2
IL2
LS1
Level
HS2
Dead time
LS2
DT/DIS
Undervoltage
ERR
Short circuit Detect.
OR
Undervoltage HSx
Undervoltage LSx
Short Circuit Detection
1
Shift
Floating HS Driver 2
+
VGS limitation HS2
+
Short circuit
SCD
detect.
+
Undervoltage
DH1
GH1
SH1
DH2
GH2
SH2
Floating LS Driver 1
+
VGS limitation LS1
+
Short circuit
SCD
detect.
+
Undervoltage
DL1
Floating LS Driver 2
+
VGS limitation LS2
+
Short circuit
SCD
detect.
+
Undervoltage
DL2
GL1
GL2
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Application Block Diagram – Injector / Valve Drive
W atchdog
TLE
4278G
Reset
Q
I
V S =12V
R
10 Ω
D
CQ
22µF
CS
47µF
CD
47nF
CS
1µF
RQ
47 kΩ
WD
R
V CC
VS
BH1
DH1
CB
220nF
GH1
ER1
SH1
BH2
RQ
47 kΩ
CB
220nF
DH2
Load 1
GH2
DT/
DIS
SH2
µC
DL1
Load 2
GL1
IH1
IL1
DL2
IH2
GL2
IL2
GND
This application diagram shows the principle schematics of a typical injector / valve drive. Other
configurations are possible as well. Freewheeling diodes are not considered. The 10 mΩ resistor
is not needed by the Driver IC, but may be needed for load current measurement. The voltage
devider networks, e.g. R = 10 kΩ, across the two Low Side MOSFETs are an example as well;
they allow to increas the current limit threshold for Short Circuit protection SCD for the Low Side
MOSFETs. As they pull down the Sources of the High Side MOSFETs (while the Low Side MOSFETs are off), they allow to pre-charge the CBx capacitors during start-up (before the Driver IC
gets enabled). The SCD current limit threshold can be increased for the High Side MOSFETs as
well by using voltage devider networks across the High Side MOSFETs. SCD can also be disabled (High Side and / or Low Side MOSFETs).
2
Rev 2.2 2006-03-07
Data Sheet TLE6282G
DT/DIS
1
20
GL2
ERR
2
19
SH2
IH1
3
18
GH2
IL1
4
17
BH2
IH2
5
16
DH2
IL2
6
15
DH1
GND
7
14
BH1
VS
8
13
GH1
DL2
9
12
SH1
DL1
10
10
11
GL1
TLE6282G
Pin
Symbol
Function
1
DT/DIS
a) Set adjustable dead time by external resistor
b) Deactivate deadtime and shoot through protection
by connecting to 0V
c) Reset ERR register
d) Disable output stages
2
ERR
Error flag for driver shut down
3
IH1
Control input for high side switch 1
4
IL1
Control input for low side switch 1
5
IH2
Control input for high side switch 2
6
IL2
Control input for low side switch 1
7
GND
8
VS
Voltage supply
9
DL2
Sense contact for short circuit detection low side 2
10
DL1
Sense contact for short circuit detection low side 1
11
GL1
Output to gate low side switch 1
12
SH1
Connection to source high side switch 1
13
GH1
Output to gate high side switch 1
14
BH1
Bootstrap supply high side switch 1
15
DH1
Sense contacts for short circuit detection high side 1
16
DH2
Sense contacts for short circuit detection high side 2
17
BH2
Bootstrap supply high side switch 2
18
GH2
Output to gate high side switch 2
19
SH2
Connection to source high side switch 2
20
GL2
Output to gate low side switch 2
Ground
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Maximum Ratings at Tj=-40…+150°C unless specified otherwise
Parameter
Supply voltage 1
Operating temperature range
Storage temperature range
Max. voltage range at Ixx; DT/DIS
Max. voltage range at ERR
Max. voltage range at BHx
Max. voltage range at DHx2
Max. voltage range at GHx3
Max. voltage range at SHx3
Max. voltage range at DLx
Max. voltage range at GLx
Max. voltage difference BHx - SHx
Max. voltage difference GHx – SHx; GLx
Power dissipation (DC) @ TA=125°C / min.footprint
Power dissipation (DC) @ TA=85°C / min.footprint
Electrostatic discharge voltage (Human Body Model)
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 – 1993
Jedec Level
Thermal resistance junction - ambient (minimal footprint with thermal vias)
Thermal resistance junction - ambient (6 cm2)
Symbol
VS
Tj
Tstg
VBHx
VDHx
VGHx
VSHx
VDLx
VGLx
VBHx-VSHx
VGxx-VSxx
Ptot
Ptot
VESD4
Limits Values
-4
60
-40
150
-55
150
-1
6
-0.3
6
-0.3
90
-4
75
-7
86
-7
75
-7
75
-2
12
-0.3
17
-0.3
11
0.33
0.85
2
Unit
V
°C
V
V
V
V
V
V
V
V
V
V
W
W
kV
3
RthJA
75
K/W
RthJA
75
K/W
Functional range
Parameter and Conditions
Symbol
Values
Unit
at Tj = –40…+150 °C, unless otherwise specified
Supply voltage
Operating temperature range
Max. voltage range at Ixx, DT/DIS
Max. voltage range at ERR
Max. voltage range at BHx
Max. voltage range at DHx2
Max. voltage range at GHx3
Max. voltage range at SHx3
VS
Tj
VBHx
VDHx
VGHx
VSHx
7.5
-40
-0.3
-0.3
-0.3
-4
-7
-7
60
150
5.5
5.5
90
75
86
75
V
°C
V
V
V
V
V
V
1
With external resistor (≥10 Ω ) and capacitor
The min value -4V is increased to –( VBHx - VSHx) in case of bootstrap voltages <4V
3
The min value -7V is reduced to –(VBHx-VSHx-1V) in case of bootstrap voltages <8V
4
All test involving Gxx pins VESD=1 kV!
2
4
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Max. voltage range at DLx3
Max. voltage range at GLx
Max. voltage difference BHx - SHx
Max. voltage difference GHx – SHx; GLx
PWM frequency
Minimum on time external lowside switch – static condition @ 20 kHz; QGate = 200nC
VDLx
VGLx
VBHx-VSHx
VGxx-VSxx
FPWM
tp(min)
-7
-2
-0.3
-0.3
0
75
12
12
11
50
2
V
V
V
V
kHz
µs
Electrical Characteristics
Parameter and Conditions
Symbol
at Tj = –40…+150 °C, unless otherwise specified
and supply voltage range VS = 7.5 ... 60V; fPWM = 20kHz
Static Characteristics
Low level output voltage (VGSxx) @ I=10mA
High level output voltage (VGSxx) @ I=-10mA;
Vs>12V
Supply current at VS (device disabled)
@ Vbat= VS =14V RDT=400kΩ
Supply current at VS (device disabled)
@ Vbat= VS =42V RDT=400kΩ
Supply current at VS @ Vbat= VS =14V 20kHz (Outputs open)
Supply current at VS @ Vbat= VS =14V 50kHz (Outputs open)
Supply current at VS @ Vbat= VS =42V 20kHz (Outputs open)
Low level input voltage
High level input voltage
Input hysteresis
5
Values
min
typ
max
Unit
∆VLL
∆VHL
-8
60
10
150
11
mV
V
IVS(dis)14V
--
4
8
mA
IVS(dis)42V
--
4
8
mA
IVS(open)14V
--
7
15
mA
IVS(open)14V
--
7
15
mA
IVS(open)42V
--
7
15
mA
-2.0
100
--170
1.0
--
V
V
mV
VIN(LL)
VIN(HL)
∆VIN
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Dynamic characteristics (pls. see test circuit and timing diagram)
Turn on current @ VGxx -VSxx = 0V; Tj=25°C
-IGxx(on)
[email protected] VGxx -VSxx = 4V; Tj=125°C
@ CLoad=22nF; RLoad=0Ω
Turn off current @ VGxx -VSxx = 10V; Tj=25°C
-IGxx(off)
[email protected] VGxx -VSxx = 4V; Tj=125°C
@ CLoad=22nF; RLoad=0Ω
Dead time (adjustable) @ RDT = 1 kΩ
tDT
-0.05
@ RDT = 10 kΩ
0.40
@ RDT = 50 kΩ
[email protected] RDT = 200 kΩ
@ CLoad=10nF ; Rload=1Ω
Rise time @ CLoad=10nF ; Rload=1Ω (20% to 80%)
t rise
-Fall time @ CLoad=10nF ; Rload=1Ω (80% to 20%)
tfall
-Disable propagation time
tP(DIS)
3.4
@ CLoad=10nF ; Rload=1Ω
Reset time of diagnosis
1
tP(CL)
@ CLoad=10nF ; Rload=1Ω
Input propagation time
tP(ILN)
-(low side turns on, 0% to 10%)
Input propagation time
tP(ILF)
-(low side turns off, 100% to 90%)
Input propagation time
tP(IHN)
-(high side turns on, 0% to 10%)
Input propagation time
tP(IHF)
-(high side turns off, 100% to 90%)
Input propagation time difference
tP(Diff)
20
(all channels turn on)
Input propagation time difference
tP(Diff)
-(all channels turn off)
Input propagation time difference
tP(Diff)
-(one channel; low on – high off)
Input propagation time difference
tP(Diff)
-(one channel; high on – low off)
Input propagation time difference
tP(Diff)
-(all channels; low on – high off)
Input propagation time difference
tP(Diff)
-(all channels; high on – low off)
6
850
700
---
mA
580
300
---
mA
0
0.24
1.0
3.1
-0.38
2.50
--
µs
100
150
5
300
440
7
ns
ns
µs
2
3.1
µs
160
500
ns
100
500
ns
120
500
ns
120
500
ns
40
70
ns
20
50
ns
40
150
ns
20
150
ns
40
150
ns
20
150
ns
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Test Circuit and Timing Diagram
x2
IHx
+
ILx
GHx
IHX
Rload = 1 Ohm
ILX
Cload = 10 nF
50%
VGHX_C
SHx
t
P(IHN)
GLx
t
rise
t
t
P(IHF)
fall
VGHX_C
Rload = 1 Ohm
Cload = 10 nF
t
90%
80%
VGLX_C
20%
10%
t
t
P(ILF)
Test Conditions :
VGLX_C
t
t
fall
P(ILN)
t
rise
90%
80%
Junction temperature Tj = -40 … 150oC
20%
Supply voltage range Vs = 7.5 … 60V
10%
t
PWM frequency fPWM = 20 kHz
Diagnosis and Protection Functions
Short circuit protection filter time
Short circuit criteria (VDS of Mosfets)
For Low Sides
For High Sides
Disable input level
Disable input hysteresis
Deactivation level for dead time and shoot
through protection
Deactivation input hysteresis
Error level @ 1.6mA IERR
Under voltage lock out for highside output – bootstrap voltage
Under voltage lock out for lowside output –
supply voltage
7
tSCP(off)
VDS(SCP)
VDIS
∆VDIS
VDIS
∆VDIS
VERR
VBHx (uvlo)
VVs (uvlo)
6
9
12
µs
0.5
0.45
3.3
0.75
0.75
3.7
180
0.85
1.0
1.05
4.0
V
0.6
--
1.1
V
mV
V
170
-3.7
1.0
4.6
mV
V
V
4.8
5.9
V
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Remarks:
Default status of input pins:
To assure a defined status of all input pins in case of disconnection, these pins are internally
secured by pull up / pull down current sources with approx. 20µA.
The following table shows the default status of each input pin.
Input pin
ILx (active high)
IHx (active low)
DT/DIS (active high)
Default status
Low
High
High
Definition:
In this datasheet a duty cycle of 98% means that the GLx pin is 2% of the PWM period in
high condition.
Functional description
Description of Dead Time Pin / Disable Pin / Reset
In the range between 1.5 and 3.5 V the dead time is varied from 100ns to 3.1µs typ. In the
range below 1.0V the dead time is disabled / shoot through is allowed. Both external Mosfets
of the same half bridge can be switched on simultaneously. This function allows the use of a
half bridge for valves and injectors. In the range above 4.0V the device is disabled.
If DIS is pulled up to 5V for 3.1 to 3.4µs only the ERR register is cleared (reset), no output
stage is shut down. A shut down of all external Mosfets occurs if DIS is pulled up for longer
than 7µs.
Condition of DT/DIS pin
0 - 1V
1.5 - 3.5V
> 4V
Function
Disable of dead time; Shoot through is allowed
Adjust dead time between 100ns and 3.1µs typ.
a) Reset of diagnosis register if DT/DIS voltage is higher than
4V for a time between 3.1µs and 3.4µs
b) Shut down of output stages if DT/DIS voltage is higher
than 4V for a time above 7µs (Active pull down of gate voltage)
Description of Diagnosis
The ERR pin is an open collector output and has to be pulled up with external pull up resistors to 5V. In normal conditions the ERR signal is high. In case of shutdown of any output
stage the ERR is pulled down. This shut down can be caused by undervoltage or short circuit.
Recommended Start-up procedure
The following procedure is recommended whenever the Driver IC is powered up:
•
•
Disable the Driver IC via DT/DIS pin
After the supply voltage has ramped up, wait for several ms to pre-charge the bootstrap capacitors of the High Side MOSFETs CBx through the resistors R on the DLx
8
Rev 2.2 2006-03-07
Data Sheet TLE6282G
•
•
pins (voltage devider network, pls. see Application block diagram on pg. 2)
tWAIT ≈ 3 x CBx x 2 x R, whereas R = 10 kΩ
Enable the Driver IC via DT/DIS pin
Start the operation by applying the desired pulse patterns. Do not apply any pulse patterns to the IHx or ILx pins, before the CBx capacitors are charged up.
Alternatively, the Driver IC can be enabled via the DT/DIS pin right after ramping up the supply voltage VS. Now, the two Low Side MOSFETs are turned on via the ILx control inputs (to
pull down the Sources of the High Side MOSFETs and to charge up the bootstrap capacitors
CBx within several 10 µs). The regular operation can be started when the bootstrap capacitors are charged up.
Short Circuit protection
The current threshold limit to activate the Short Circuit protection function can be adjusted to
larger values, it can not be adjusted to lower values. This can be done by external resistors
to form voltage deviders across the “sense element” (pls. see Application block diagram on
pg. 2), consisting of the Drain-Source-Terminals, a fraction of the PCB trace and – in some
cases – current sense resistors (used by the µC not by the Driver IC).
The Short Circuit protection can be disabled for the High Side MOSFETs by shorting DH1
with SH1 and DH2 with SH2 on the PCB; in this case the DHx pins may not be connected to
the Drains of the associated MOSFETs. To disable Short Circuit protection for the Low Side
MOSFETs the DL1 and DL2 pin should be connected to the Driver IC´s Ground.
Shut down of the driver
A shut down can be caused by undervoltage or short circuit.
A short circuit will shut down only the affected Mosfet until a reset of the error register by a
disable of the driver occurs. A shut down due to short circuit will occur only when the Short
Circuit criteria VDS(SCP) is met for a duration equal to or longer than the Short Circuit filter time
tSCP(off). Yet, the exposure to or above VDS(SCP) is not counted or accumulated. Hence, repetitive Short Circuit conditions shorter than tscp(off) will not result in a shut down of the affected
MOSFET.
An undervoltage shut down shuts only the affected output down. The affected output will
auto restart after the undervoltage situation is over.
Operation at Vs<12V
If Vs<11.5V the gate voltage will not reach 10V. It will reach approx. Vs-1.5V, dependent on
duty cycle, total gate charge and switching frequency.
Operation at different voltages for Vs, DH1 and DH2
If DH1 and DH2 are used with a voltage higher than Vs, a duty cycle of 100% can not be
guaranteed. In this case the driver is acting like a normal driver IC based on the bootstrap
principle. This means that after a maximum “On” time of the highside switch of more than
1ms a refresh pulse to charge the bootstrap capacitor of about 1µs is needed to avoid undervoltage lock out of this output stage.
Operation at extreme duty cycle:
The integrated charge pump allows an operation at 100% duty cycle. The charge pump is
strong enough to replace leakage currents during “on”-phase of the highside switch. The
gate charge for fast switching of the highside switches is supplied by the bootstrap capacitors. This means, that the bootstrap capacitor needs a minimum charging time of about 1µs,
if the highside switch is operated in PWM mode (e.g. with 20kHz a maximum duty cycle of
96% can be reached). The exact value for the upper limit is given by the RC time formed by
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
the impedance of the internal bootstrap diode and the capacitor formed by the external Mosfet (CMosfet=QGate / VGS). The size of the bootstrap capacitor has to be adapted to the external
MOSFET the driver IC has to drive. Usually the bootstrap capacitor is about 10-20 times bigger then CMosfet. External components at the Vs Pin have to be considered, too.
General remark:
It is assured that after the removal of any fault condition, which did not damage the device,
the device will return to normal conditions without external trigger. Only short circuit condition
needs restart by reset.
Estimation of power loss within the Driver IC
The power loss within the Driver IC is strongly dependent on the use of the driver and the
external components. Nevertheless a rough estimation of the worst case power loss is possible.
Worst case calculation is:
PLoss = (Qgate*n*const* fPWM + IVS(open)/20kHz)* VVs - PRGate
With:
PLoss = Power loss within the Driver IC
fPWM = Switching freqency
Qgate = Total gate charge of used MOSFETs at 10V VGS
n
= Number of switched MOSFETs
const = Constant considering some leakage current in the driver (about 1.2)
IVS(open) = Current consumption of driver without connected Mosfets during switching
VVS = Voltage at Vs
PRGate = Power dissipation in the external gate resistors
This value can be reduced dramatically by usage of external gate resistors.
Estimated Power Loss PLOSS within the Driver IC
Estimated Power Loss PLOSS within the Driver IC
for different gate charges QG
for different supply voltages Vs
at supply voltage Vs = 14V
at QG = 100nC @ VGS = 10V
0,8
0,8
0,7
0,6
Vs = 8V
0,5
Vs = 14V
0,4
Vs = 18V
QG = 50nC
0,6
PLOSS (W)
PLOSS (W)
0,7
0,3
QG = 100nC
0,5
QG = 200nC
0,4
0,3
0,2
0,2
0,1
0,1
0
0
0
10
20
30
40
50
60
0
PWM Frequency (kHz)
10
20
30
40
50
60
PWM Frequency (kHz)
Conditions :
Junction temperature Tj = 25oC
Number of switched MOSFET n = 2
Power dissipation in the external gate resistors PRGate = 0,2*PLoss
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Gate Drive characteristics
VIHx
BHx
VIHx
Logic
+
Level
Shift
+
VGS
limit
+
Under
voltage
Vs
SCD
iGxx(on)
iGxx(on)
DHx
850 mA Peak
CB
GHx
iGxx(off)
iGHx
SHx
iGxx(off)
580 mA Peak
Load
TLE6282G
High Side Driver
iGHx
Test Conditions :
- Turn On : VGS = 0V, Tj = 25oC
- Turn Off : VGS = 10V, Tj = 25oC
This figure represents the simplified internal
circuit of one high side gate drive. The drive
circuit of the low sides looks similar.
11
This figure illustrates typical voltage and
current waveforms of the high side gate drive;
the associated waveforms of the low side
drives look similar.
Rev 2.2 2006-03-07
Data Sheet TLE6282G
Truth Table
ILx
1
Input
IHx DT / DIS
Conditions
UV
SC
GLx
Output
GHx
ERR
<3.5V
0
0
1
0
5V
0
1
0
<3.5V
0
0
0
1
5V
1
0
1.5-3.5V
0
0
A
A
5V
1
0
<1V
0
0
1
1
5V
0
1
<3.5V
0
0
0
0
5V
1
<3.5V
1
0
B
0
C
0
1
0
<3.5V
1
0
0
B
C
1
0
1.5-3.5V
1
0
D
D
C
1
0
<1V
1
0
B
B
C
0
1
<3.5V
1
0
0
0
C
1
<3.5V
0
1
E
0
F
0
1
0
<3.5V
0
1
0
E
F
1
0
1.5-3.5V
0
1
D
D
F
1
0
<1V
0
1
E
E
F
0
1
<3.5V
0
1
0
0
F
X
X
X
X
X
X
0
0
5V
>4V
X
X
0
0
5V
X
A) stays in the condition before the shoot throught command occurs (see also dead time
diagrams)
B) 0 when affected; 1 when not affected; self recovery
C) 0V when output does not correspond to input patterns; 5V when output corresponds to
input patterns.
D) stays in the condition before the shoot throught command occurs (see also dead time
diagrams); 0 when affected
E) 0 when affected– the outputs of the affected halfbridge are shut down and stay latched
until reset; 1 when not affected
F) 0V when output does not correspond to input patterns – the outputs of the affected halfbridge are shut down and stay latched until reset; 5V when output corresponds to input
patterns.
X) Condition has no influence
Remark: Please consider the influence of the dead time for your input duty cycle
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Package and Ordering Code
(all dimensions in mm)
Package Code
P-DSO 20
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Rev 2.2 2006-03-07
Data Sheet TLE6282G
Published by
Infineon Technologies AG,
Bereich Kommunikation
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address
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Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the human body, or to support and/or maintain and
sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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Rev 2.2 2006-03-07