Data Sheet No. PD94139 IRU1261 DUAL 6A AND 1A LOW DROPOUT POSITIVE FIXED 1.5V AND 2.5V REGULATOR DESCRIPTION FEATURES Guaranteed to Provide 1.5V and 2.5V Supplies with 3.1V Input Fast Transient Response 1% Voltage Reference Initial Accuracy Built-In Thermal Shutdown The IRU1261, using a proprietary process, combines a dual low dropout regulator with fixed outputs of 1.5V and 2.5V in a single package with the 1.5V output having a minimum of 6A and the 2.5V having a 1A output current capability. This product is specifically designed to provide well regulated supplies from 3.3V to generate 1.5V for GTL+ termination resistor supply and 2.5V clock supply for the new generation of the Pentium IITM processor applications. APPLICATIONS Pentium IITM Processor Applications TYPICAL APPLICATION 3.3V C1 IRU1261 VOUT1 5 VIN 4 Gnd 3 VOUT2 2 VCTRL 1 2.5V / 1A C3 C2 1.5V / 6A C4 5V R1 Figure 1 - Typical application of IRU1261 in a Pentium IITM processor application. Note: Pentium IITM is trademark of Intel Corp. PACKAGE ORDER INFORMATION TJ (°C) 0 To 150 Rev. 2.0 09/19/02 5-PIN PLASTIC TO-263 (M) IRU1261CM www.irf.com 5-PIN PLASTIC Ultra Thin-PakTM (P) IRU1261CP 1 IRU1261 ABSOLUTE MAXIMUM RATINGS Input Voltage (V IN) .................................................... Power Dissipation ..................................................... Storage Temperature Range ...................................... Operating Junction Temperature Range ..................... 7V Internally Limited -65°C To 150°C 0°C To 150°C PACKAGE INFORMATION 5-PIN ULTRA THIN-PAKTM (P) 5-PIN PLASTIC TO-263 (M) 5 VOUT1 5 V OUT1 4 VIN 4 V IN 3 Gnd 3 Gnd 2 VOUT2 2 V OUT2 1 VCTRL 1 V CTRL θJA=308C/W for 1"sq pad θJA=308C/W for 1"sq pad ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over CIN=1mF, COUT=100mF and TJ=0 to 1508C. Typical values refer to TJ=258C. IFL=6A for output #2 and 1A for output #1. VCTRL=5V, VIN=3.3V. PARAMETER VCTRL Input Voltage Output Voltage #2 SYM Output Voltage #1 VO1 Line Regulation Load Regulation (Note 1) Dropout Voltage (Output #2) Dropout Voltage (Output #1) Current Limit (Output #2) Current Limit (Output #1) Minimum Load Current Thermal Regulation Ripple Rejection Temperature Stability Long Term Stability RMS Output Noise VO2 TEST CONDITION Io=10mA, TJ=25°C Io=10mA Io=10mA, TJ=25°C Io=10mA Io=10mA, 3.1V<VIN<3.6V 10mA<Io<IFL Note 2, Io=6A, VCTRL=4.75V Note 2, Io=1A, VCTRL=4.75V DVo=100mV DVo=100mV Note 3 30ms Pulse, Io=IFL f=120Hz, Co=25mF Tantalum, Io=0.5 3 IFL Io=10mA TJ=1258C, 1000Hrs 10Hz<f<10KHz Note 1: Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data. Note 2: Dropout voltage is defined as the minimum differential voltage between VIN and VOUT required to maintain regulation at VOUT. It is measured when the output voltage drops 1% below its nominal value. 2 MIN 3.0 1.485 1.470 2.462 2.425 TYP MAX 1.500 1.500 2.500 2.500 0.2 0.4 1.515 1.530 2.537 2.575 0.4 1.3 0.6 5 0.01 10 0.02 6.1 1.1 70 0.5 0.3 0.003 UNITS V V V % % V V A A mA %/W dB % % %VO Note 3: Minimum load current is defined as the minimum current required at the output in order for the output voltage to maintain regulation. Typically the resistor dividers are selected such that it automatically maintains this current. www.irf.com Rev. 2.0 09/19/02 IRU1261 PIN DESCRIPTIONS PIN # PIN SYMBOL PIN DESCRIPTION 1 VCTRL The control input pin of the regulator. This pin is connected, via a 10V resistor, to the 5V supply to provide the base current for the pass transistor of both regulators. This allows the regulator to have very low dropout voltage which allows one to generate a well regulated 2.5V supply from the 3.3V input. A high frequency, 1mF capacitor is connected between this pin and VIN pin to insure stability. 2 VOUT2 The output #2 (high current) of the regulator. A minimum of 100mF capacitor must be connected from this pin to ground to insure stability. 3 Gnd This pin is connected to ground. It is also the Tab of the package. 4 VIN The power input pin of the regulator. Typically a large storage capacitor is connected from this pin to ground to insure that the input voltage does not sag below the minimum drop out voltage during the load transient response. This pin must always be higher than both VOUT pins by the amount of the dropout voltage (see data sheet) in order for the device to regulate properly. 5 VOUT1 The output #1 (low current) of the regulator. A minimum of 100mF capacitor must be connected from this pin to ground to insure stability. BLOCK DIAGRAM VIN 4 5 VOUT1 V CTRL 1 THERMAL SHUTDOWN 1.20V + 3 Gnd 2 VOUT2 Figure 2 - Simplified block diagram of the IRU1261. Rev. 2.0 09/19/02 www.irf.com 3 IRU1261 APPLICATION INFORMATION Introduction The IRU1261 is a dual fixed output Low Dropout (LDO) regulator available in a TO-263 package. This voltage regulator is designed specifically for Pentium II processor applications requiring 2.5V and 1.5V supplies, eliminating the need for a second regulator resulting in lower overall system cost. The IRU1261 is designed to take advantage of 5V supply to provide the drive for the pass transistor, allowing 2.5V supply to be generated from 3.3V input. This feature improves the power dissipation of the 2.5V regulator substantially allowing a smaller heat sink to be used for the application. Compared to the IRU1260 dual adjustable regulator, the IRU1261 includes the resistor dividers that are otherwise needed with the IRU1260, eliminating four external components and their tolerances, resulting in a more accurate initial accuracy for each output voltage. Other features of the device include: fast response to sudden load current changes, such as GTL+ termination application and thermal shutdown protection to protect the device if an overload condition occurs. Stability The IRU1261 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for the microprocessor applications use standard electrolytic capacitors with typical ESR in the range of 50 to 100mV and the output capacitance of 500 to 1000mF. Fortunately as the capacitance increases, the ESR decreases resulting in a fixed RC time constant. The IRU1261 takes advantage of this phenomena in making the overall regulator loop stable. For most applications a minimum of 100mF aluminum electrolytic capacitor with the maximum ESR of 0.3V such as Sanyo, MVGX series, Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. The IRU1261 also requires a 1mF ceramic capacitor connected from V IN to VCTRL and a 10V, 0.1W resistor in series with VCTRL pin in order to further insure stability. Thermal Design The IRU1261 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the maximum allowable junction temperature. Although this device can operate with junction temperatures in the range of 1508C, it is recommended that the selected heat sink be chosen such that during maxi- 4 mum continuous load operation the junction temperature is kept below this number. The example given shows the steps in selecting the proper regulator heat sink for driving the Pentium II processor GTL+ termination resistors and the Clock IC using IRU1261 in TO-263 package. Example: Assuming the following specifications: VIN = 3.3V VOUT1 = 2.5V VOUT2 = 1.5V IOUT1(MAX) = 0.2A IOUT2(MAX) = 1.5A TA = 358C The steps for selecting a proper heat sink to keep the junction temperature below 1358C is given as: 1) Calculate the maximum power dissipation using: PD = IOUT13(V IN - VOUT1) + IOUT23(V IN - VOUT2) PD = 0.23(3.3 - 2.5) + 1.53(3.3 - 1.5) = 2.86W 2) Assuming a TO-263 surface mount package, the junction to ambient thermal resistance of the package is: uJA = 308C/W for 1" square pad area 3) The maximum junction temperature of the device is calculated using the equation below: TJ = TA + PD3uJA TJ = 35 + 2.86330 = 1218C Since this is lower than our selected 1358C maximum junction temperature (1508C is the thermal shutdown of the device), TO-263 package is a suitable package for our application. Layout Consideration The IRU1261 like all other high speed linear regulators need to be properly laid out to insure stable operation. The most important component is the output capacitor, which needs to be placed close to the output pin and connected to this pin using a plane connection with a low inductance path. www.irf.com Rev. 2.0 09/19/02 IRU1261 TYPICAL APPLICATION PENTIUM ΙΙ APPLICATION 3.3V C1 IRU1261 VOUT1 5 VIN 4 Gnd 3 VOUT2 2 VCTRL 1 2.5V / 1A C3 C2 1.5V / 6A C4 5V R1 Figure 3 - Typical application of IRU1261 in the Pentium IITM design with the 1.5V output providing for GTL+ termination while 2.5V supplies the clock chip. Note: Pentium IITM is trademark of Intel Corp. Ref Desig U1 C1, C4 C3 C2 R1 HS1 Description Dual LDO Regulator Capacitor Capacitor Capacitor Resistor Heat Sink Qty Part # Manuf 1 IRU1261CM IR 2 Elect, 680mF, EEUFA1A681L Panasonic 1 Elect, 220mF, 6.3V, ECAOJFQ221 Panasonic 1 Ceramic, 1mF, 16V, Z5U 1 3V, 0.1W, 0805 SMT Panasonic 1) Use 1" Square Copper Pad area if IOUT2<1.7A and IOUT1<0.2A. 2) For IOUT2<3A and IOUT1<0.5A, use IRU1261CT and Thermalloy 6030B 3) For IOUT2<5.4A and IOUT1<0.5A, use IRU1261CT and Thermalloy 7021B IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 Rev. 2.0 09/19/02 www.irf.com 5 IRU1261 (M) TO-263 Package 5-Pin A E U K S V B M H L P G D N C R C L SYMBOL MIN MAX A 10.05 10.668 B 8.28 9.169 C 4.31 4.597 D 0.66 0.91 E 1.14 1.40 G 1.575 1.829 H 14.605 15.875 K 1.143 1.68 L 0.00 0.305 M 2.49 2.74 N 0.33 0.58 P 2.286 2.794 R 08 88 S 1.143 2.67 U 6.50 REF V 7.75 REF NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. 6 www.irf.com Rev. 2.0 09/19/02 IRU1261 (P) Ultra Thin-PakTM 5-Pin A A1 E U K V B H M L P G D N C R C L SYMBOL A A1 B C D E G H K L M N P R U V MIN MAX 9.27 9.52 8.89 9.14 7.87 8.13 1.78 2.03 0.63 0.79 0.25 NOM 1.72 10.41 10.67 0.76 1.27 0.03 0.13 0.89 1.14 0.25 0.79 1.04 38 68 5.59 NOM 7.49 NOM NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. Rev. 2.0 09/19/02 www.irf.com 7 IRU1261 PACKAGE SHIPMENT METHOD PKG DESIG M P PACKAGE DESCRIPTION TO-263 Ultra Thin-Pak 1 TM 1 PIN COUNT PARTS PER TUBE PARTS PER REEL T&R Orientation 5 50 750 Fig A 5 75 2500 Fig B 1 1 Feed Direction Figure A 8 1 1 Feed Direction Figure B www.irf.com Rev. 2.0 09/19/02