Low Drop Voltage Regulator TLE 4296-2 Features • • • • • • • • • • • • Two versions: 3.3 V, 5.0 V Output voltage tolerance ≤ ±4% Very low drop voltage Output current: 30 mA Inhibit input Low quiescent current consumption Wide operation range: up to 45 V Wide temperature range: -40 °C ≤ Tj ≤ 150 °C Output protected against short circuit Overtemperature protection Reverse polarity proof Very small SMD-Package P-SCT595-5 SCT 595 Functional Description The TLE 4296-2 G is a monolithic integrated low-drop voltage regulator in the very small SMD package P-SCT595-5. It is designed to supply e.g. microprocessor systems under the severe conditions of automotive applications. Therefore the device is equipped with additional protection functions against overload, short circuit and reverse polarity. At overtemperature the regulator is automatically turned off by the integrated thermal protection circuit. Input voltages up to 40 V are regulated to VQ,nom = 3.3 V (V33 version) or 5.0 V (V50 version). The output is able to drive a load of more than 30 mA while it regulates the output voltage within a 4% accuracy. To save energy the device can be switched in stand-by mode via an inhibit input which causes the current consumption to drop below 5 µA. Type Ordering Code Package TLE 4296-2 GV33 Q67006-A9608 P-SCT595-5 TLE 4296-2 GV50 Q67006-A9609 P-SCT595-5 Data Sheet 1 Rev. 1.0, 2004-01-01 TLE 4296-2 INH 1 GND 2 Ι 3 5 GND 4 Q AEP02253 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 INH Inhibit input; high level to turn IC on 2 GND Ground; connected to pin 5 3 I Input voltage 4 Q Output voltage; must be blocked with a ceramic capacitor CQ ≥ 3.3 µF, ESR ≤ 2 Ω 5 GND Ground; connected to pin 2 Data Sheet 2 Rev. 1.0, 2004-01-01 TLE 4296-2 Saturation Control and Protection Circuit Temperature Control Ι 3 4 Band-GapReferenz + 2,5 1 GND INH Figure 2 Data Sheet Q AEB02312 Block Diagram 3 Rev. 1.0, 2004-01-01 TLE 4296-2 Table 2 Absolute Maximum Ratings -40 °C < Tj < 150 °C Parameter Symbol Limit Values Unit Remarks Min. Max. VI II -42 45 V – – – mA internally limited VQ IQ -0.3 30 V – – – mA internally limited VINH IINH IINH -42 45 V – -500 * µA * internally limited -5 5 mA -0.3 V < VI < 45 V; tp < 1 ms Tj Tstg -40 150 °C – -50 150 °C – Rthj-pin Rthja – 30 K/W measured to pin 5 – 179 K/W zero airflow zero heat sink area Input Voltage Current Output Voltage Current Inhibit Voltage Current Current Temperatures Junction temperature Storage temperature Thermal Resistances Junction pin Junction ambient1) 1) Worst case regarding peak temperature. Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet 4 Rev. 1.0, 2004-01-01 TLE 4296-2 Table 3 Operating Range Parameter Input voltage Inhibit voltage Junction temperature Data Sheet Symbol VI VI VINH Tj Limit Values Unit Remarks Min. Max. 4.0 45 V TLE 4296-2 GV33 5.5 45 V TLE 4296-2 GV50 -0.3 40 V – -40 150 °C – 5 Rev. 1.0, 2004-01-01 TLE 4296-2 Table 4 Electrical Characteristics VI = 13.5 V; VINH > +2.5 VQ; -40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition Min. Typ. Max. 3.17 3.30 3.43 V 1 mA < IQ < 30 mA VI = 13.5 V 3.17 3.30 3.43 V 4.80 5.00 5.20 V 4.80 5.00 5.20 V IQ = 10 mA 4.3 V < VI < 40 V 1 mA < IQ < 30 mA VI = 13.5 V IQ = 10 mA 6 V < VI < 40 V 30 – – mA 1) – 0.25 0.30 V IQ = 20 mA1) Output capacitor IQ Vdr CQ 3.3 – – µF ESR ≤ 2 Ω at 10 kHz Current consumption Iq – 2 5.2 mA IQ < 30 mA Iq – 130 170 µA Quiescent current (stand-by) Iq = II - IQ Iq – 0 1 µA IQ < 0.1 mA; Tj < 85 °C VINH = 0.4 V; Tj < 85 °C Quiescent current (stand-by) Iq = II - IQ Iq – 0 5 µA Output voltage V33 version Output voltage V50 version Output current limitation Drop voltage VQ VQ Iq = II - IQ Current consumption Iq = II - IQ Data Sheet 6 VINH = 0.4 V Rev. 1.0, 2004-01-01 TLE 4296-2 Table 4 Electrical Characteristics (cont’d) VI = 13.5 V; VINH > +2.5 VQ; -40 °C < Tj < 150 °C; unless otherwise specified Parameter Load regulation Symbol ∆VQ Limit Values Unit Test Condition Min. Typ. Max. – 17 50 mV 1 mA < IQ < 25 mA; Tj = 25 °C TLE 4296-2 GV50 – 14 40 mV 1 mA < IQ < 25 mA; Tj = 25 °C TLE 4296-2 GV33 Line regulation ∆VQ – 10 25 mV VI = (VQ,nom + 0.5 V) to 36 V IQ = 5 mA; Tj = 25 °C Power Supply Ripple Rejection PSRR – 60 – dB fr = 100 Hz; Vr = 0.5 Vpp VINH, high VINH, low IINH, high IINH, low – – 2.2 V 0.4 – – V – 8 12 µA -2 – 2 µA VQ > 0.95 VQ,nom VQ > 0.1 V VINH = 5 V VINH = 0 V Logic Inhibit Input Inhibit, Turn-on voltage Inhibit, Turn-off voltage H-input current L-input current 1) Measured when the output voltage VQ has dropped 100 mV from the nominal value. Data Sheet 7 Rev. 1.0, 2004-01-01 TLE 4296-2 V Q ,nom + 0.5V to 45V Ι CΙ 100 nF Inhibit 4 3 TLE 4296-2G INH 1 2,5 Q 3.0V / 3.3V / 5.0V CQ 4.7 µF e.g. TDK C3216X7R1C475M GND AES02313_4296-2 Figure 3 Application Circuit Application Information In the TLE 4296-2 G the output voltage is divided and compared to an internal reference of 2.5 V typical. The regulation loop controls the output to achieve a stabilized output voltage. Figure 3 shows a typical application circuit. In order to maintain the stability of the control loop the TLE 4296-2 G output requires an output capacitor CQ of at least 3.3 µF with a maximum permissible ESR of 2 Ω. It is recommended to use a multi layer ceramic capacitor for CQ, e.g. the TDK C3216X7R1C475M with a nominal capacitance of 4.7 µF. Aluminum electrolytic as well as tantalum capacitors do not cover the required ESR range over the full operating temperature range of -40 °C to 150 °C. At the input of the regulator an input capacitor is necessary for compensating line influences (100 nF ceramic capacitor recommended). A resistor of approx. 1 Ω in series with CI, can damp any oscillation occurring due the input inductivity and the input capacitor. If the regulator is sourced via long input lines of several meters it is recommended to place an additional electrolytic capacitor ≥ 47 µF at the input. Data Sheet 8 Rev. 1.0, 2004-01-01 TLE 4296-2 Typical Performance Characteristics Output Voltage VQ versus Input Voltage VI AED03349.VSD 10 VQ Current Consumption Iq versus Input Voltage VI VINH = 5 V RL = 1 kΩ V AED03347.VSD 1000 Iq µA 8 800 6 600 VINH = 5 V GV50 4 2 0 RL = 1 kΩ 400 GV33 200 0 2 4 6 8 0 V 10 VI Data Sheet RL = 5 kΩ 0 10 20 30 40 V 50 VI 9 Rev. 1.0, 2004-01-01 TLE 4296-2 Package Outlines 2.9 ±0.2 B (2.2) 1.2 +0.1 -0.05 1.1 max (0.3) 10˚max 1.6 ±0.1 10˚max 1) +0.2 acc. to DIN 6784 2.6 max 0.25 min 0.1 max (0.23) (0.13) (0.4) 1) 0.3 +0.1 -0.05 0.15 +0.1 -0.06 0.6 +0.1 -0.05 0.20 0.95 1.9 0.25 M B 1) M A A Contour of slot depends on profile of gull-wing lead form GPW05997 Figure 4 P-SCT595-5 (Plastic Small Outline) You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. Dimensions in mm SMD = Surface Mounted Device Data Sheet 10 Rev. 1.0, 2004-01-01 Edition 2004-01-01 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany © Infineon Technologies AG 2004. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. 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