Power over Ethernet Consortium Clause # 33 PSE Conformance Test Suite v 2.2 Report UNH-IOL — 121 Technology Drive, Suite 2 — Durham, NH 03824 — +1-603- 862-4196 Consortium Manager: Gerard Nadeau — [email protected] — +1-603- 862-0166 Dilian Reyes Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 September 19, 2006 Report Rev. 3.0 Enclosed are the results from the Clause # 33 PSE Conformance testing performed on: Device Under Test (DUT): Ports Tested: Hardware Version: Power Chipset: Power Supply Voltage: Magnetics: DC981A/B, LTC4263 Midspan/Endpoint PSE Endpoint Port, Midspan OUT Not Available Linear LTC4263 48 Volts Pulse Jack, JK0-0044 The test suite referenced in this report is available at the UNH-IOL website: ftp://ftp.iol.unh.edu/pub/ethernet/test_suites/CL33_PSE/PSE_test_suite_V2.2.pdf There were no issues uncovered during Clause 33 PSE testing. Testing Completed 08/29/2006 iol Matthew Borowski [email protected] Digitally signed by UNH-IOL Date: 2006.09.19 14:26:31 04'00' Review Completed 09/19/2006 David Schwarzenberg [email protected] Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Digital Signature Information This document was created using an Adobe digital signature. A digital signature helps to ensure the authenticity of the document, but only in this digital format. For information on how to verify this document’s integrity proceed to the following site: http://www.iol.unh.edu/certifyDoc If the document status still indicates “Validity of author NOT confirmed”, then please contact the UNH-IOL to confirm the document’s authenticity. To further validate the certificate integrity, Adobe 6.0 should report the following fingerprint information: MD5 Fingerprint: A569 F807 031D B1EC E509 4110 95E3 5362 SHA-1 Fingerprint: F007 7D91 2FAA A22C A3D9 F93F 05AC 09DB E219 84B2 Result Key The following table contains possible results and their meanings: Result PASS PASS with Comments FAIL Warning Informative Refer to Comments Not Applicable Not Available Borderline Not Tested Interpretation The Device Under Test (DUT) was observed to exhibit conformant behavior. The DUT was observed to exhibit conformant behavior however an additional explanation of the situation is included, such as due to time limitations only a portion of the testing was performed. The DUT was observed to exhibit non-conformant behavior. The DUT was observed to exhibit behavior that is not recommended. Results are for informative purposes only and are not judged on a pass of fail basis. From the observations, a valid pass or fail could not be determined. An additional explanation of the situation is included. The DUT does not support the technology required to perform these tests. Due to testing station or time limitations, the tests could not be performed. The observed values of the specified parameters are valid at one extreme, and invalid at the other. Not tested due to the time constraints of the test period. UNH-IOL PoE Consortium 2 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test Setup Testing Equipment Real-time DSO Current Probe and Amplifier Digital Multimeter Digital Power Supply Arbitrary Waveform Generator Vector Network Analyzer UNH-IOL Developed Test Board TEKTRONIX, TDS 3014 TEKTRONIX, TPS305 and TPSA300 HEWLETT-PACKARD, 34401A AGILENT TECHNOLOGIES, E3641A SONY/TEK,AWG2041,0,CF:91.1CT FV:1.26 “HEWLETT-PACKARD,8712B,US34400165,B.03.02” PoE Test Board Version 1.0 Basic Testing Configuration The basic testing configuration is defined in the UNH Interoperability Laboratory PSE Parametric Test Suite v2.2 UNH-IOL PoE Consortium 3 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE GROUP 1: DETECTION CHARACTERISTICS Test # and Label 33.1.1 – PSE location Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the PSE is in a valid location with respect to the link segment, and it performs detection and powers on the correct set of pins. a. A PSE operating as an endpoint must perform detection and apply power on Alternative A or Alternative B. A PSE operating as a midspan must perform detection and supply power on the Alternative B pairs. An Alternative B device must supply positive Vport on pins 4 and 5, and negative Vport on pins 7 and 8. Comments on Test Results a. The PSE is in a valid location and powers on the correct set of pins. Test # and Label 33.1.2 - Detection Circuit Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify the Thevenin equivalent detection circuit of the PSE detection source. a. The DUT loaded circuit voltage should be less than half the open circuit PI voltage or reject current into Vdetect+. The open circuit voltage should not exceed 30V. Comments on Test Results a. Open circuit voltage = 13.5 V The DUT was observed to reject current into Vdetect+ port. This is compliant with the Alternative PSE detection source shown in Figure 33-9. Output Impedance was not calculated (not applicable due to diode configuration). Test # and Label 33.1.3 - BackDrive Current Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the detection circuit of the PSE can withstand maximum backdrive current over the range of VPort. a. The DUT should not be affected by backdrive current Comments on Test Results a. The DUT was observed to properly ignore the backdrive current. UNH-IOL PoE Consortium 4 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.1.4 - Open Circuit Voltage Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the open circuit voltage at the PI of the PSE during detection mode is below the conformance limits. b. The open circuit voltage (Voc) should not exceed 30 Volts. Comments on Test Results b. Open Circuit Voltage =13.5 V Test # and Label 33.1.5 – Detector Circuit Output Current Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the short circuit output current of the PSE during PD detection is within the conformance limits. a. The output short circuit current should not exceed 5 mA. Comments on Test Results a. The observed short circuit output current was 2.5 mA. Test # and Label 33.1.6 – Detector Circuit Output Voltage Part(s) a b c Result(s) PASS PASS PASS Expected Results and Procedural Comments Purpose: To verify the voltage output of the PSE's detection circuit conforms to the specified limits. a. b. c. The loaded circuit voltage should be between 2.8 and 10V. The voltage difference between any consecutive detection probe voltages should be at least 1V. The slew rate of the probe voltages should be no greater than 0.1V/µs. Comments on Test Results a. b. c. Probe Voltage1 = 6.95 V Probe Voltage2 = 5.50 V Detection probe voltage difference = 1.84 V Maximum slew rate of the probe voltages = 0.029 V/µs Please refer to the figures appended to the report. UNH-IOL PoE Consortium 5 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.1.7 – PD Detection Timing Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PSE probes its PI with valid detection pulses and completes an entire detection sequence within the proper time period. a. b. The total pulse width of the detection pulse should not be greater than 500ms. The detection probe voltages should have a duration of at least 2 ms. Comments on Test Results a. b. Probe Voltage1 pulse width = 117.0 ms Probe Voltage2 pulse width = 131.0 ms Duration of the detection probe voltages > 2 ms Please refer to the figures appended to the report. Test # and Label 33.1.8 – PD Signature Detection Limits Part(s) a b c d Result(s) PASS PASS PASS PASS Expected Results and Procedural Comments Purpose: To verify that the DUT will properly detect a PD's Signature impedance. a. b. c. d. The minimum accepted input resistance should be between 15 kΩ and 19 kΩ. The maximum accepted input resistance should be between 26.5kΩ and 33 kΩ. The DUT must detect a proper signature if the input capacitance is less than 150nF. The DUT must accept capacitances below 10µF and reject capacitances above 10µF. Comments on Test Results a. b. c. d. 16.7 kΩ ≤ Raccept(min) ≤ 16.8 kΩ 31.2 k Ω ≤ Raccept(max) ≤ 31.3 kΩ The DUT was observed to accept capacitances less than 150nF. The DUT was observed to reject improper capacitances above 10µF. UNH-IOL PoE Consortium 6 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.1.9 – PD Classification Part(s) a b c d Result(s) PASS PASS with comments PASS PASS Expected Results and Procedural Comments Purpose: To verify that a DUT supporting Classification properly performs PD class detection. a. b. c. d. During classification the PSE should supply a voltage between 15.5 and 20.5 V. The DUT should accurately classify the PD. The DUT should classify the PD as Class 0 if the current drawn is equal to or greater than 51mA. The DUT should not supply a current greater than 100 mA. Comments on Test Results a. b. c. d. VClass= 18.58 V During the do_classification portion of the state diagram, only the pd_request_power variable was available, and not mr_pd_class_detected. This variable indicates the power class of the PD. pd_request_power has a value of 0 for Class 1, 1 for Class 2, and 2 for Class 0, Class 3 and Class 4. The DUT was observed to correctly classify the PD as Class0. The DUT was observed to supply a maximum current of 60 mA. Please refer to the figures appended to the report. Test # and Label 33.1.10 – Classification Timing Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that a PSE capable of classifying a PD completes classification within the proper time period after successfully completing the detection of a PD. a. The DUT should complete classification between 10ms and 75ms after PD detection. Comments on Test Results a. Tpdc = 36.4 ms Please refer to the figures appended to the report. UNH-IOL PoE Consortium 7 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.1.11 – New Detection Cycle Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that if the PSE is unable to supply power within Tpon then, it initiates and successfully completes a new detection cycle before powering on. a. The DUT should complete a full detection cycle before applying power onto the link segment. Comments on Test Results a. The DUT was observed to successfully complete a new detection cycle before applying power onto the link segment. Test # and Label 33.1.12 – Alternative A Backoff Cycle Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that if a PSE implementing Alternative A detects an invalid signature at its PI, it will resume detection within the maximum conformant time. a. The DUT should resume detection in times less than 1 seconds. Comments on Test Results a. The DUT was observed to wait for 240ms before resuming detection. Test # and Label 33.1.13 – Alternative B Backoff Cycle Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that if a PSE implementing Alternative B fails to detect a valid detection signature at its PI, it will wait for the appropriate period of time before beginning a new detection cycle and applies a voltage on to the PI that falls within the defined limits. a. The DUT should not apply a voltage greater than 2.8 Vdc to the PI. b. The value for Tdbo should be at least 2 sec. Comments on Test Results a. b. The DUT was observed to apply a voltage less than 2.8V to the PI during the backoff cycle. The DUT was observed to wait for 3.1 seconds before resuming detection. UNH-IOL PoE Consortium 8 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE GROUP 2: POWER FEED CHARACTERISTICS Test # and Label 33.2.1 – Turn On Rise Time Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that when the PSE turns on power, the response times of the PSE are within the conformance limits. a. The measured slew rate should not exceed 3.04V/µs. Comments on Test Results a. The observed slew rate was 0.67 V/µs Please refer to the figures appended to the report. Test # and Label 33.2.2 – Power Feed Ripple and Noise Part(s) a b c d Result(s) Informative Informative Informative Informative Expected Results and Procedural Comments Purpose: To verify that the power feeding ripple and noise are within the conformance limits. The peak-to-peak values of ripple and noise transmitted on the line by the DUT, in both the common mode and pairto-pair, should not exceed: a. 0.5 Vpp between 0-500 Hz b. 0.2 Vpp between 500 Hz -150 kHz c. 0.15 Vpp between 150-500 kHz d. 0.1 Vpp between 500 kHz-1 MHz Comments on Test Results Total Ripple and Noise = 0.036 Vpp Note: This test is currently under development. Individual frequency range information is not currently available. UNH-IOL PoE Consortium 9 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.2.3 – Load Regulation Part(s) a b Result(s) Not Available PASS Expected Results and Procedural Comments Purpose: To verify that the PSE performs load regulation while supplying power to the PI. a. b. Voltage transients should not exceed 3.5 V/µs. The DUT output voltage should be between 44 and 57 V for all values of IPort. Comments on Test Results a. b. This test is currently under development. VPort (max)= 47.8 V VPort (min)= 46.6 V Test # and Label 33.2.4 – Power Turn On Timing Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the DUT supplies power onto the link segment within the acceptable turn on time after it has successfully detected a PD. a. The DUT should start supplying power within Tpon (400ms) after detection. Comments on Test Results a. Tpon = 95.6 ms Test # and Label 33.2.5 – Apply Power Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PSE applies power on the same pairs as those used for detection after completing a valid detection. a. b. The PSE should perform a valid detection sequence before powering the PD. The PSE should supply power on the same pairs as that it performed detection for the PD. Comments on Test Results a. b. The DUT performed a valid detection sequence before supplying power onto the link segment. The DUT applied power on the same pairs as those it detected on. UNH-IOL PoE Consortium 10 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.2.6 – PSE Current Unbalance Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the current unbalance between the two conductors of the power pairs of the PSE over the current load range is within the permissible range. a. The current unbalance between the two conductors per power pair should not be greater than 10.5mA. Comments on Test Results a. The DUT was observed to have a current unbalance less than 1.1 mA for minimum and maximum Iport. UNH-IOL PoE Consortium 11 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE GROUP 3: ERROR DETECTION AND POWER REMOVAL Test # and Label 33.3.1 – Overload Current Detection Range Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PSE removes power if the Iport exceeds the specified limits. a. If the DUT supports classification, then the value of ICUT should be between P_class/44 to 400mA, otherwise ICUT is between15.4/Vport and 400mA (inclusive). b. The voltage at the PI of the DUT should be between 44 to 57V (inclusive). Comments on Test Results a. b. ICUT = 381 mA VPort (min) = 46.6 V Test # and Label 33.3.2 – Overload Time Limits Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the PSE removes power if the Iport exceeds ICUT for greater than overload time interval. a. The overload time limit (Tovld) should be between 50ms and 75ms (inclusive). Comments on Test Results a. Tovld = 55.4 ms Test # and Label 33.3.3 – Inrush Current Part(s) a b Result(s) PASS Not Available Expected Results and Procedural Comments Purpose To verify that the PSE will start removing power from the PI within TLIM when it detects a short circuit condition. a. b. The inrush current at the PI of the DUT should be between 400 to 450mA (inclusive). The inrush current at the PI of the DUT should be at least 60mA. Comments on Test Results a. IINRUSH = 430 mA b. This test is currently under development. UNH-IOL PoE Consortium 12 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.3.4 – Short Circuit Time Limit Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose To verify that when the PSE detects a short circuit condition it starts removing power from the PI within TLIM and must be done removing power within the conformant time limit. a. The short circuit time limit (TLIM) should be between 50ms and 75ms (inclusive). Comments on Test Results a. TLIM = 59.0 ms Test # and Label 33.3.5 – Error Delay Timing Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PSE waits for at least the minimum conformant time before attempting subsequent detection after it removes power due to detection of error condition. a. The DUT should wait for at least 750ms after detecting a short circuit condition and removing power before resuming detection b. The DUT should wait for at least 750ms after detecting an overload condition and removing power before resuming detection Comments on Test Results a. b. The DUT was observed to wait 3.9 s after a short circuit event before resuming signature detection. The DUT was observed to wait 3.9 s after an overload event before resuming signature detection. Test # and Label 33.3.6 – Range of TMPDO Timer Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that PSE correctly monitors the PD Maintain Power Signature a. DC disconnect: 300ms ≤ TMPDO ≤ 400ms b. AC disconnect: 300ms ≤ TMPDO ≤ 400ms Comments on Test Results a. b. DC disconnect: 343 ms ≤ TMPDO ≤ 347 ms AC disconnect: 348 ms ≤ TMPDO ≤ 351 ms UNH-IOL PoE Consortium 13 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.3.7 - PD MPS Dropout Current Limits (IMIN measurement) Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that PSE correctly monitors the PD Maintain Power Signature for DC disconnect. a. b. The DUT may remove power if the current drawn is between 5 mA and 10 mA (IMIN2 (max)) for 400 ms. The DUT must remove power if the current drawn is less than 5 mA (IMIN1 (max)) for 400 ms. Comments on Test Results a. b. 7.3 mA ≤ IMIN2 (max) ≤ 7.4 mA The DUT removes power when current draw is less than 5mA. Test # and Label 33.3.8 – PD MPS Time for Validity Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the PSE waits for at least the minimum MPS validity time when it monitors the DC MPS component. a. The DUT should not remove power from a PD that provides a valid DC MPS signature for at least TMPS every TMPS+TMPDO. Comments on Test Results a. The DUT was observed to remain powering when a valid DC MPS signature was presented for at least TMPS every TMPS+TMPDO. Test # and Label 33.3.9 – AC MPS Signal Parameters Part(s) a b c Result(s) PASS PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PI probing AC signals fall within the conformance limits. a. The PI probing AC voltage (V_open) should be between 1.9V to 10% of Vport (Vpp). b. The AC probing signal frequency should not be greater than 500 Hz. c. The AC probing signal slew rate should not be greater than 0.1V/µs. Comments on Test Results a. b. c. V_open = 2.75 V AC probing signal frequency= 110 Hz Slew rate =0.003 V/µs UNH-IOL PoE Consortium 14 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.3.10 – AC Disconnect Detection Voltages Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PI probing AC voltages during AC disconnect detection fall within the conformance limits. a. b. The AC ripple voltage (VCLOSE ) should be less than 0.5Vpp. The measured VPort (Vp) should not exceed 60V. Comments on Test Results a. b. VCLOSE = 0.036 Vpp Vp= 49.9 Test # and Label 33.3.11 – AC MPS Signature Part(s) a b Result(s) PASS PASS Expected Results and Procedural Comments Purpose: To verify that the PSE that implements AC MPS component correctly monitors the PD Maintain Power Signature. a. The DUT should supply power to the PD for signature impedance less than 27KΩ. b. The measured impedance should be between 27KΩ and 1980KΩ (inclusive). Comments on Test Results a. b. The DUT remained powering for maintain power signatures less than 27kΩ. 490 kΩ ≤ Zac2 ≤ 500 kΩ Test # and Label 33.3.12 – Turn Off Time Limits Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the PSE disconnects power within TOff through a test resistor. a. The DUT should remove power in times less than 500ms through a test resistor of 320kΩ. Comments on Test Results a. The DUT was observed to remove power in 97 ms. UNH-IOL PoE Consortium 15 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE GROUP 4: PSE TRANSMITTER AND RECEIVER CHARACTERISTICS Test # and Label 33.4.1 – Midspan PSE Return Loss Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the return loss of a Midspan PSE is greater than the minimum conformant value. a. The DUT’s return loss should be greater than 23dB from 1 to 20MHz and greater than 14dB from 20MHz to 100MHz. Comments on Test Results TX pair Return Loss Margin 14.26 dB RX pair 6.24 dB Please refer to the figures appended to the report. Test # and Label 33.4.2 – Midspan PSE Insertion Loss Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the insertion loss of a Midspan PSE is no greater than the maximum conformant value. a. The DUT’s insertion loss should be no greater than the limit described by equation 33-6 and the maximum conformant value of 0.1dB. Comments on Test Results TX pair Insertion Loss Margin 0.08 dB RX pair 0.08 dB Please refer to the figures appended to the report. Test # and Label 33.4.3 – Midspan PSE NEXT Loss Expected Results and Procedural Comments Part(s) a Result(s) Not Available Purpose: To verify that the NEXT between the transmit and receive pairs of the DUT is within conformance limits. a. The DUT’s NEXT loss should be no greater than the limit described by equation 33-5 and the minimum conformant value of 65 dB. Comments on Test Results This test is currently under development. UNH-IOL PoE Consortium 16 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Test # and Label 33.4.4 – PSE Impedance Balance Expected Results and Procedural Comments Part(s) a Result(s) PASS Purpose: To verify that the common-mode to differential-mode impedance balance of the transmit and receive pairs of the PI is greater than the specified limits. a. The common-mode to differential-mode impedance balance for a 100Mb/s transmitter and receiver shall exceed 34-19.2log10(f/50) dB (where f is the frequency in MHz) over the frequency range of 1.0 MHz to 100 MHz Comments on Test Results TX pair Impedance Balance Margin 9.12 dB RX pair 7.87 dB Please refer to the figures appended to the report. Test # and Label 33.4.5 – PSE Common Mode Output Voltage Expected Results and Procedural Comments Part(s) a Result(s) Not Available Purpose: To verify that the common mode AC output voltage at the PI is below the conformant limits. a. The magnitude of the common-mode AC output voltage, Ecm_out, shall not exceed 50 mV peak when operating at 10 Mb/s, and 50 mV peak-to-peak when operating at 100 Mb/s or greater. Comments on Test Results This test is currently under development. UNH-IOL PoE Consortium 17 Report Rev. 3.0 Clause # 33 PSE Conformance Test Suite v2.2Report DUT: DC981A/B, LTC4263 Midspan/Endpoint PSE Annex A: Figures Attached are the figures illustrating the Detection Pulse Sequence, Classification Pulse (Optional), Turn on Rise Time, VPORT, Midspan PSE Return Loss, Midspan PSE Insertion Loss, and Midspan Impedance Balance. These were captured either with the real time DSO or the Vector Network Analyzer and post processed using custom Matlab scripts. UNH-IOL PoE Consortium 18 Report Rev. 3.0 Detection Pulse Identification 14 Detection Sequence Detection Pulse 12 Amplitude - Volts 10 8 6.95 Volts 6 5.53 Volts 4 2 0 0 100 200 300 400 Time - ms 500 600 700 Classification Pulse Identification 22 Detection/Startup Sequence Class Pulse 21 20 19 Amplitude - Volts 18.59 volts 18 17 16 15 14 13 0.62 0.64 0.66 0.68 0.7 0.72 Time - Seconds 0.74 0.76 0.78 Power on Rise Time 50 45 40 Amplitude - Volts 35 30 25 20 15 10 5 0 0 200 400 600 800 1000 Time - us 1200 1400 1600 1800 2000 Vport Measurement 50 46.6 Volts 45 40 35 Voltage 30 25 20 15 10 5 0 550 600 650 700 750 800 Time - ms 850 900 950 1000 AC Maintain Power Signature 52 50 48 Amplitude - Volts 46 44 42 40 38 ACMPS Sequence ACMPS Pulse 36 0 50 100 150 200 Time - ms 250 300 350 400 Midspan Return Loss: Transmit Pair 55 50 45 Magnitude (dB) 40 35 30 25 20 15 10 0 10 20 30 40 50 60 Frequency (MHz) 70 80 90 100 Midspan Return Loss: Receive Pair 55 50 45 Magnitude (dB) 40 35 30 25 20 15 10 0 10 20 30 40 50 60 Frequency (MHz) 70 80 90 100 Midspan Insertion Loss: Transmit Pair 0.4 0.35 0.3 Magnitude (dB) 0.25 0.2 0.15 0.1 0.05 0 -0.05 0 10 20 30 40 50 60 Frequency (MHz) 70 80 90 100 Midspan Insertion Loss: Receive Pair 0.4 0.35 0.3 Magnitude (dB) 0.25 0.2 0.15 0.1 0.05 0 0 10 20 30 40 50 60 Frequency (MHz) 70 80 90 100 Impedance Balance: Transmit Pair 80 70 Magnitude (dB) 60 50 40 30 20 0 10 20 30 40 50 60 Frequency (MHz) 70 80 90 100 Impedance Balance: Receive Pair 80 70 Magnitude (dB) 60 50 40 30 20 0 10 20 30 40 50 60 Frequency (MHz) 70 80 90 100