LTC2900 - Programmable Quad Supply Monitor with Adjustable Reset Timer

LTC2900
Programmable Quad Supply
Monitor with Adjustable Reset Timer
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FEATURES
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DESCRIPTIO
Simultaneously Monitors Four Supplies
16 User Selectable Combinations of 5V, 3.3V, 3V,
2.5V, 1.8V, 1.5V and/or ±Adjustable Voltage
Thresholds
Guaranteed Threshold Accuracy: ±1.5% of
Monitored Voltage Over Temperature
Low Supply Current: 43µA Typ
Adjustable Reset Time
Small MSOP and 3mm × 3mm DFN Packages
Manual Reset Pin
Open-Drain RST Output (LTC2900-1)
Push-Pull RST Output (LTC2900-2)
Power Supply Glitch Immunity
Guaranteed RST for VCC ≥ 1V
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APPLICATIO S
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The reset delay time is adjustable using an external
capacitor and the manual reset input may be used with a
momentary switch to issue reset pulses with programmed
duration. Tight voltage threshold accuracy and glitch
immunity ensure reliable reset operation without false
triggering. The RST output is guaranteed to be in the
correct state for VCC down to 1V. The LTC2900-1 features
an open-drain RST output, while the LTC2900-2 has a
push-pull RST output.
The 43µA supply current makes the LTC2900 ideal for
power conscious systems and it may be configured to
monitor less than four inputs. The parts are available in
the 10-lead MSOP and the 10-lead 3mm × 3mm DFN
packages.
Desktop and Notebook Computers
Multivoltage Systems
Telecom Equipment
Portable Battery-Powered Equipment
Network Servers
, LTC and LT are registered trademarks of Linear Technology Corporation.
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The LTC®2900 is a programmable supply monitor for
systems with up to four supply voltages. One of 16 preset
or adjustable voltage monitor combinations can be selected using an external resistor divider connected to the
program pin. The preset voltage thresholds are accurate
to ±1.5% over temperature.
TYPICAL APPLICATIO
Quad Supply Monitor (5V, 3.3V, 2.5V, 1.8V)
5V
3.3V
DC/DC
CONVERTER
SYSTEM
LOGIC
2.5V
1.8V
C1
0.1µF
C2
0.1µF
R1
59k
1%
R2
40.2k
1%
V3
V4
V1
LTC2900-2
V2
VREF
VPG
GND
RST
PBR
CRT
CRT
47nF
PUSH-BUTTON
RESET
2900 TA01
tRST = 216ms
2900f
1
LTC2900
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AXI U
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ABSOLUTE
RATI GS
(Notes 1, 2, 3)
V1, V2, V3, V4, VPG, PBR ............................. – 0.3V to 7V
RST (LTC2900-1)........................................ – 0.3V to 7V
RST (LTC2900-2).......................... – 0.3V to (V2 + 0.3V)
CRT ............................................. – 0.3V to (VCC + 0.3V)
VREF ............................................. – 0.3V to (VCC + 0.3V)
Reference Load Current (IVREF) ............................ ±1mA
V4 Input Current (– ADJ Mode) ............................ – 1mA
Operating Temperature Range
LTC2900-1C/LTC2900-2C ....................... 0°C to 70°C
LTC2900-1I/LTC2900-2I .................... –40°C to 85°C
Storage Temperature Range .................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................... 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
V3
V1
CRT
RST
PBR
10
9
8
7
6
1
2
3
4
5
V2
V4
VREF
VPG
GND
MS PACKAGE
10-LEAD PLASTIC MSOP
LTC2900-1CMS
LTC2900-2CMS
LTC2900-1IMS
LTC2900-2IMS
V3
1
10 V2
V1
2
9 V4
CRT
3
8 VREF
RST
4
7 VPG
PBR
5
6 GND
LTC2900-1CDD
LTC2900-2CDD
LTC2900-1IDD
LTC2900-2IDD
MS PART MARKING
TJMAX = 125°C, θJA = 250°C/W
LTYJ
LTYL
LTYK
LTYM
DD PART MARKING
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
LABU
LABW
LABV
LABX
TJMAX = 125°C, θJA = 43°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VRT50
5V, 5% Reset Threshold
V1 Input Threshold
●
4.600
4.675
4.750
V
VRT33
3.3V, 5% Reset Threshold
V1, V2 Input Threshold
●
3.036
3.086
3.135
V
VRT30
3V, 5% Reset Threshold
V2 Input Threshold
●
2.760
2.805
2.850
V
VRT25
2.5V, 5% Reset Threshold
V2, V3 Input Threshold
●
2.300
2.338
2.375
V
VRT18
1.8V, 5% Reset Threshold
V3, V4 Input Threshold
●
1.656
1.683
1.710
V
VRT15
1.5V, 5% Reset Threshold
V3, V4 Input Threshold
●
1.380
1.403
1.425
V
VRTA
ADJ Reset Threshold
V3, V4 Input Threshold
●
0.492
0.500
0.508
VRTAN
– ADJ Reset Threshold
V4 Input Threshold
●
– 18
0
18
mV
VCC
Minimum Internal Operating Voltage
RST in Correct Logic State,
VCC Rising Prior to Program
●
1
V
VCCMINP
Minimum Required for Programming
VCC Rising
●
2.42
V
VREF
Reference Voltage
VCC ≥ 2.3V, IVREF = ±1mA, CREF ≤ 1000pF
●
1.192
1.228
V
VPG
Programming Voltage Range
VCC ≥ VCCMINP
●
0
VREF
V
IVPG
VPG Input Current
VPG = VREF
●
IV1
V1 Input Current
V1 = 5V, IVREF = 12µA, (Note 4)
●
1.210
43
V
±20
nA
75
µA
2900f
2
LTC2900
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
IV2
V2 Input Current
V2 = 3.3V
●
0.8
2
µA
IV3
V3 Input Current
V3 = 2.5V
V3 = 0.55V (ADJ Mode)
●
●
0.52
–15
1.2
15
µA
nA
V4 = 1.8V
V4 = 0.55V (ADJ Mode)
V4 = –0.05V (–ADJ Mode)
●
●
●
0.34
–15
–15
0.8
15
15
µA
nA
nA
IV4
V4 Input Current
MIN
TYP
MAX
UNITS
ICRT(UP)
CRT Pull-Up Current
VCRT = 0V
●
–1.4
–2
–2.6
µA
ICRT(DN)
CRT Pull-Down Current
VCRT = 1.3V
●
10
20
30
µA
tRST
Reset Time-Out Period
CRT = 1500pF
●
5
7
9
ms
tUV
VX Undervoltage Detect to RST
VX Less Than Reset Threshold VRTX
by More Than 1%
VOL
Output Voltage Low RST
ISINK = 2.5mA; V1 = 3V, V2 = 3V;
V3, V4 = 0V; VPG = 0V
●
0.15
0.4
V
ISINK = 100µA; V2 = 1V; V1, V3, V4 = 0V
ISINK = 100µA; V1 = 1V; V2, V3, V4 = 0V
●
●
0.05
0.05
0.3
0.3
V
V
Output Voltage High RST (LTC2900-1)
(Note 5)
ISOURCE = 1µA
●
V2 – 1
V
Output Voltage High RST (LTC2900-2)
(Note 6)
ISOURCE = 200µA
●
0.8 • V2
V
VOH
µs
150
Manual Reset Pin
VIH
PBR Input Threshold High
VCC = 3.3V to 5.5V
●
VIL
PBR Input Threshold Low
VCC = 3.3V to 5.5V
●
0.4
1.6
tPBW
PBR Input Pulse Width
VCC = 3.3V
●
150
tPBD
Manual Reset Propagation Delay
VCC = 3.3V, VPBR Falling
●
IPBR
PBR Pull-Up Current
VPBR = 0V
V
ns
0.1
1
µs
µA
–10
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 2: All currents into pins are positive, all voltages are referenced to GND
unless otherwise noted.
Note 3: The greater of V1, V2 is the internal supply voltage (VCC).
Note 4: Under static no-fault conditions, V1 will necessarily supply quiescent
current. If at any time V2 is larger than V1, V2 must be capable of supplying
V
the quiescent current, programming (transient) current and reference load
current.
Note 5: The RST output pin on the LTC2900-1 has an internal pull-up to V2
of typically 6µA. However, an external pull-up resistor may be used when
faster rise times are required or for VOH voltages greater than V2.
Note 6: The push-pull RST output pin on the LTC2900-2 is actively pulled up
to V2.
TEST CIRCUITS
V1
V2
V3
V4
LTC2900-1 RST
LTC2900-1
ISOURCE
1µA
2900 F01
Figure 1. RST VOH Test
V1
V2
V3
V4
RST
2900 F02
Figure 2. RST VOL Test
ISINK
2.5mA,
100µA
V1
V2
V3
V4
LTC2900-2 RST
ISOURCE
200µA
2900 F03
Figure 3. Active Pull-Up
RST VOH Test
2900f
3
LTC2900
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TI I G DIAGRA
Monitor Timing
VX
VRTX
tPBD
tRST
tUV
tRST
1.5V
RST
2900 TD
PBR
tPBW
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TYPICAL PERFOR A CE CHARACTERISTICS
5V Threshold Voltage
vs Temperature
3.3V Threshold Voltage
vs Temperature
THESHOLD VOLTAGE, VRT50 (V)
4.725
4.700
4.675
4.650
4.625
3.135
2.850
3.125
2.840
THRESHOLD VOLTAGE, VRT30 (V)
THRESHOLD VOLTAGE, VRT33 (V)
4.750
3V Threshold Voltage
vs Temperature
3.115
3.105
3.095
3.085
3.075
3.065
3.055
3.035
–60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80 100
2.810
2.800
2.790
2.780
80
2.760
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
100
2900 G02
2900 G01
2.5V Threshold Voltage
vs Temperature
1.425
1.705
1.420
2.3450
2.3375
2.3300
2.3225
2.3150
2.3075
2.3000
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
THRESHOLD VOLTAGE, VRT15 (V)
1.710
2.3675
2.3525
1.700
1.695
1.690
1.685
1.680
1.675
1.670
1.665
100
2900 G04
1.655
–60 –40 –20 0
20 40 60
TEMPERATURE (°C)
1.415
1.410
1.405
1.400
1.395
1.390
1.385
1.660
80
100
1.5V Threshold Voltage
vs Temperature
2.3750
2.3600
80
2900 G03
1.8V Threshold Voltage
vs Temperature
THRESHOLD VOLTAGE, VRT18 (V)
THRESHOLD VOLTAGE, VRT25 (V)
2.820
2.770
3.045
4.600
20 40 60
–60 –40 –20 0
TEMPERATURE (°C)
2.830
80
100
2900 G05
1.380
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
100
2900 G06
2900f
4
LTC2900
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TYPICAL PERFOR A CE CHARACTERISTICS
ADJ Threshold Voltage
vs Temperature
– ADJ Threshold Voltage
vs Temperature
0.504
0.502
0.500
0.498
0.496
0.494
0.492
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
1.228
0.012
1.222
0.006
1.216
VREF (V)
0.506
THRESHOLD VOLTAGE, VRTAN (V)
0
1.204
–0.012
1.198
–0.018
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
100
2900 G07
IV1 vs Temperature
1.192
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
100
IV2 vs Temperature
V1 = 5V
1.4 V2 = 3.3V
V3 = 2.5V
1.3
V4 = 1.8V
1.2
V1 = 5V
1.0 V2 = 3.3V
V3 = 2.5V
0.9
V4 = 1.8V
0.8
60
1.1
0.7
IV3 (µA)
V1 = 5V
90 V2 = 3.3V
V3 = 2.5V
80
V4 = 1.8V
70
40
1.0
0.9
0.6
0.5
30
0.8
0.4
20
0.7
0.3
10
0
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
100
0.6
0.2
0.5
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
0.1
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
2900 G09
100
450
TYPICAL TRANSIENT DURATION (µs)
0.6
0.5
0.4
0.3
0.2
0.1
80
100
2900 G12
350
300
RESET OCCURS
ABOVE CURVE
250
200
150
100
50
0
0.1
1
10
100
RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
2900 G13
100
Typical Transient Duration
vs Comparator Overdrive (V3, V4)
220
TA = 25°C
400
80
2900 G11
Typical Transient Duration
vs Comparator Overdrive (V1, V2)
1.0
V1 = 5V
0.9 V2 = 3.3V
V3 = 2.5V
0.8
V4 = 1.8V
0.7
0
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80
2900 G10
IV4 vs Temperature
100
IV3 vs Temperature
1.1
50
80
2900 G21
1.5
IV2 (µA)
IV1 (µA)
80
2900 G08
100
IV4 (µA)
1.210
–0.006
TYPICAL TRANSIENT DURATION (µs)
THRESHOLD VOLTAGE, VRTA (V)
0.508
VREF vs Temperature
0.018
200
180
160
TA = 25°C
RESET OCCURS
ABOVE CURVE
140
120
100
80
60
40
20
0
1
10
100
0.1
RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
2900 G20
2900f
5
LTC2900
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TYPICAL PERFOR A CE CHARACTERISTICS
RST Output Voltage
vs V1, VPG = 0V
Reset Time-Out Period
vs Temperature
8.9
5
3
2
1
0
0
10
CRT = 1500pF
8.4 (SILVER MICA)
RESET TIME-OUT PERIOD, tRST (sec)
RESET TIME-OUT PERIOD, tRST (ms)
V1 = V2 = V3 = V4
10k PULL-UP FROM RST TO V1
TA = 25°C
4
RST OUTPUT VOLTAGE (V)
Reset Time-Out Period
vs Capacitance
7.9
7.4
6.4
5.9
5.4
80
2900 G14
1m
100µ
10p
100
100p
10n
1n
CRT (FARAD)
100n
RST High Level Output Voltage
vs Output Source Current
(LTC2900-2)
3.0
3.5
V2 = 3V
V1 = 5V
3.0
– 40°C
85°C
2.5
VOH (V)
2.0
1.5
1.0
VOL = 0.2V
V1 = 5V
V2 = 3V
V3 = 2.5V
V4 = 1V
25°C
2.5
VOL = 0.4V
1µ
2900 G16
RST Voltage Output Low
vs Output Sink Current
VOL (V)
ISINK (mA)
10m
2900 G15
RST, ISINK vs Supply Voltage
13
T = 25°C
12 A
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
100m
6.9
4.9
–60 –40 –20 0 20 40 60
TEMPERATURE (°C)
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V1 (V)
TA = 25°C
2.0
– 40°C
1.5
25°C
1.0
85°C
0.5
2
3
4
V1 OR V2 (V)
5
0
6
0.5
0
0
10
20
30
70
50 60
ISINK (mA)
40
80
2900 G17
1
1.5
ISOURCE (mA)
2
2.5
2900 G19
RST Pull-Up Current vs V2
(LTC2900-2)
6
TA = 25°C
TA = 25°C
18
5
PULL-UP CURRENT (mA)
16
PULL-UP CURRENT (µA)
0.5
2900 G18
RST Pull-Up Current vs V2
(LTC2900-1)
20
0
90
14
12
10
8
VRT33
6
VRT30
VRT25
4
4
3
VRT33
VRT30
2
VRT25
1
2
0
2
2.5
3
3.5
V2 (V)
4
4.5
5
2900 G22
0
2
2.5
3
3.5
V2 (V)
4
4.5
5
2900 G23
2900f
6
LTC2900
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PI FU CTIO S
V3 (Pin 1): Voltage Input 3. Select from 2.5V, 1.8V, 1.5V
or ADJ. See Table 1 for details.
V1 (Pin 2): Voltage Input 1. Select from 5V or 3.3V. See
Table 1 for details. The greater of (V1, V2) is also VCC for
the device. Bypass this pin to ground with a 0.1µF (or
greater) capacitor.
CRT (Pin 3): Reset Delay Time Programming Pin. Attach
an external capacitor (CRT) to GND to set a reset delay time
of 4.6ms/nF. Leaving the pin open generates a minimum
delay of approximately 50µs. A 47nF capacitor will generate a 216ms reset delay time.
RST (Pin 4): Reset Logic Output. Active low with weak
pull-up to V2 (LTC2900-1) or active pull-up to V2
(LTC2900-2). Pulls low when any voltage input is below
the reset threshold and held low for the programmed delay
time after all voltage inputs are above threshold. May be
pulled above V2 using an external pull-up (LTC2900-1
only).
PBR (Pin 5): Manual Reset Pin. Attach a push-button
switch between this pin and ground. A logic low on this pin
will pull RST low. When the PBR pin returns high, RST will
return high after the programmed reset delay assuming all
four voltage inputs are above threshold. A weak internal
pull-up allows the pin to be left floating for normal monitor
operation. When using a switch, the switch is debounced
through the reset circuitry using the delay provided by the
CRT timing capacitor.
GND (Pin 6): Ground.
VPG (Pin 7): Voltage Threshold Combination Select Input.
Connect to an external 1% resistive divider between VREF
and GND to select 1 of 16 combinations of preset and/or
±adjustable voltage thresholds (see Table 1). Do not add
capacitance on the VPG pin.
VREF (Pin 8): Buffered Reference Voltage. A 1.210V
nominal reference used for the programming voltage
(VPG) and for the offset of negative adjustable applications. The buffered reference can source and sink up to
1mA. The reference can drive a bypass capacitor of up to
1000pF without oscillation.
V4 (Pin 9): Voltage Input 4. Select from 1.8V, 1.5V, ADJ or
– ADJ. See Table 1 for details.
V2 (Pin 10): Voltage Input 2. Select from 3.3V, 3V or 2.5V.
See Table 1 for details. The greater of (V1, V2) is also VCC
for the device. Bypass this pin to ground with a 0.1µF (or
greater) capacitor. RST is weakly pulled up to V2
(LTC2900-1). RST is actively pulled up to V2 in the
LTC2900-2.
2900f
7
LTC2900
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BLOCK DIAGRA
V1
–
POWER
DETECT
+
VCC
V2
–
V1
2
V2
10
+
RESISTIVE
DIVIDER
MATRIX
V3
1
–
V4
9
+
LTC2900-1
V2
6µA
GND
6
RST
–
4
ADJUSTABLE
RESET PULSE
GENERATOR
+
VPG
2µA
A/D
7
BUFFER
VREF
8
VCC
1.210V
V2
22µA
BANDGAP
REFERENCE
RST
10µA
4
VCC
PBR 5
LTC2900-2
3 CRT
CRT
2900 DB-1
2900f
8
LTC2900
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APPLICATIO S I FOR ATIO
Table 1. Voltage Threshold Programming
Power-Up
The greater of V1, V2 is the internal supply voltage (VCC).
On power-up, VCC will power the drive circuits for the RST
pin. This ensures that the RST output will be low as soon
as V1 or V2 reaches 1V. The RST output will remain low until
the part is programmed. After programming, if any one of
the VX inputs is below its programmed threshold, RST will
be a logic low. Once all the VX inputs rise above their thresholds, an internal timer is started and RST is released after
the programmed delay time. If VCC < (V3 – 1) and VCC < 2.4V,
the V3 input impedance will be low (1kΩ typ).
Monitor Programming
The LTC2900 input voltage combination is selected by
placing the recommended resistive divider from VREF to
GND and connecting the tap point to VPG, as shown in
Figure 4. Table 1 offers recommended 1% resistor values
LTC2900
8
VREF
7
VPG
6
GND
R1
1%
R2
1%
2900 F04
Figure 4. Monitor Programming
for the various modes. The last column in Table 1 specifies
optimum VPG/VREF ratios (±0.01) to be used when programming with a ratiometric DAC.
During power-up, once V1 or V2 reaches 2.4V max, the
monitor enters a programming period of approximately
150µs during which the voltage on the VPG pin is sampled
and the monitor is configured to the desired input combination. Do not add capacitance to the VPG pin. Immediately
after programming, the comparators are enabled and
supply monitoring will begin.
MODE
V1 (V) V2 (V) V3 (V) V4 (V) R1 (kΩ) R2 (kΩ)
VPG
VREF
0
5.0
3.3
ADJ
ADJ
Open
Short
0.000
1
5.0
3.3
ADJ
–ADJ
93.1
9.53
0.094
2
3.3
2.5
ADJ
ADJ
86.6
16.2
0.156
3
3.3
2.5
ADJ
–ADJ
78.7
22.1
0.219
4
3.3
2.5
1.5
ADJ
71.5
28.0
0.281
5
5.0
3.3
2.5
ADJ
66.5
34.8
0.344
6
5.0
3.3
2.5
1.8
59.0
40.2
0.406
7
5.0
3.3
2.5
1.5
53.6
47.5
0.469
8
5.0
3.0
2.5
ADJ
47.5
53.6
0.531
9
5.0
3.0
ADJ
ADJ
40.2
59.0
0.594
10
3.3
2.5
1.8
1.5
34.8
66.5
0.656
11
3.3
2.5
1.8
ADJ
28.0
71.5
0.719
12
3.3
2.5
1.8
–ADJ
22.1
78.7
0.781
13
5.0
3.3
1.8
–ADJ
16.2
86.6
0.844
14
5.0
3.3
1.8
ADJ
9.53
93.1
0.906
15
5.0
3.0
1.8
ADJ
Short
Open
1.000
Supply Monitoring
The LTC2900 is a low power, high accuracy programmable quad supply monitoring circuit with a common
reset output and a manual reset input. Reset timing is
adjustable using an external capacitor. Single pin programming selects 1 of 16 input voltage monitor combinations. All four voltage inputs must be above predetermined
thresholds for the reset not to be invoked. The LTC2900
will assert the reset output during power-up, power-down
and brownout conditions on any one of the voltage inputs.
The inverting inputs on the V3 and/or V4 comparators are
set to 0.5V when the positive adjustable modes are selected (Figure 5). The tap point on an external resistive
divider, connected between the positive voltage being
2900f
9
LTC2900
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APPLICATIO S I FOR ATIO
VTRIP
8
LTC2900
R3
1%
R4
1%
+
V3 OR V4
VREF
9 V4
R3
1%
R4
1%
–
+
–
LTC2900
–
+
VTRIP
0.5V
2900 F06
2900 F05
Figure 5. Setting the Positive Adjustable Trip Point
sensed and ground, is connected to the high impedance
noninverting inputs (V3, V4). The trip voltage is calculated
from:
 R3 
VTRIP = 0.5V 1 + 
 R4 
In the negative adjustable mode, the noninverting input on
the V4 comparator is connected to ground (Figure 6). The
tap point on an external resistive divider, connected between the negative voltage being sensed and the VREF pin,
is connected to the high impedance inverting input (V4).
VREF provides the necessary level shift required to operate
at ground. The trip voltage is calculated from:
 R3 
VTRIP = – VREF   ; VREF = 1.210 V No min al
 R4 
In a negative adjustable application, the minimum value
for R4 is limited by the sourcing capability of VREF (±1mA).
With no other load on VREF, R4 (minimum) is:
1.21V ÷ 1mA = 1.21kΩ.
Tables 2 and 3 offer suggested 1% resistor values for
various adjustable applications.
Figure 6. Setting the Negative Adjustable Trip Point
Table 2. Suggested 1% Resistor Values for the ADJ Inputs
VSUPPLY (V)
VTRIP (V)
R3 (kΩ)
R4 (kΩ)
12
11.25
2150
100
10
9.4
1780
100
8
7.5
1400
100
7.5
7
1300
100
6
5.6
1020
100
5
4.725
845
100
3.3
3.055
511
100
3
2.82
464
100
2.5
2.325
365
100
1.8
1.685
237
100
1.5
1.410
182
100
1.2
1.120
124
100
1
0.933
86.6
100
0.9
0.840
68.1
100
Table 3. Suggested 1% Resistor Values for the –ADJ Input
VSUPPLY (V)
VTRIP (V)
R3 (kΩ)
R4 (kΩ)
–2
–1.87
187
121
–5
–4.64
464
121
–5.2
–4.87
487
121
–10
–9.31
931
121
–12
–11.30
1130
121
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10
LTC2900
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APPLICATIO S I FOR ATIO
Although all four supply monitor comparators have builtin glitch immunity, bypass capacitors on V1 and V2 are
recommended because the greater of V1 or V2 is also the
VCC for the device. Filter capacitors on the V3 and V4
inputs are allowed.
Power-Down
On power-down, once any of the VX inputs drop below
their threshold, RST is held at a logic low. A logic low of
0.4V is guaranteed until both V1 and V2 drop below 1V. If
the bandgap reference becomes invalid (VCC < 2V typ), the
part will reprogram once VCC rises above 2.4V max.
Monitor Output Rise and Fall Time Estimation
The RST output has strong pull-down capability. If the
external load capacitance (CLOAD) is known, output fall
time (10% to 90%) is estimated using:
tFALL ≈ 2.2 • RPD • CLOAD
where RPD is the on-resistance of the internal pull-down
transistor. The typical performance curve (VOL vs ISINK)
demonstrates that the pull-down current is somewhat
linear versus output voltage. Using the 25°C curve, RPD is
estimated to be approximately 40Ω. Assuming a 150pF
load capacitance, the fall time is about 13.2ns.
Although the RST output of the LTC2900-1 is considered
to be “open-drain,” it does have weak pull-up capability
(see RST Pull-Up Current vs V2 curve). Output rise time
(10% to 90%) is estimated using:
tRISE ≈ 2.2 • RPU • CLOAD
where RPU is the on-resistance of the pull-up transistor.
The on-resistance as a function of the V2 voltage at room
temperature is estimated using:
RPU =
6 • 105
Ω
V2 – 1
with V2 = 3.3V, RPU is about 260k. Using 150pF for load
capacitance, the rise time is 86µs. If the output needs to
pull up faster and/or to a higher voltage, a smaller
external pull-up resistor may be used. Using a 10k pullup resistor, the rise time is reduced to 3.3µs for a 150pF
load capacitance.
The LTC2900-2 has an active pull-up to V2 on the RST
output. The typical performance curve (RST Pull-Up Current vs V2 curve) demonstrates that the pull-up current is
somewhat linear versus the V2 voltage and RPU is estimated to be approximately 625Ω. A 150pF load capacitance makes the rise time about 206ns.
Selecting the Reset Timing Capacitor
The reset time-out period is adjustable in order to accommodate a variety of microprocessor applications. The
reset time-out period, tRST, is adjusted by connecting a
capacitor, CRT, between the CRT pin and ground. The value
of this capacitor is determined by:
CRT = tRST • 217 • 10 –9
with CRT in Farads and tRST in seconds. The CRT value per
millisecond of delay can also be expressed as CRT/ms =
217 (pF/ms).
Leaving the CRT pin unconnected will generate a minimum reset time-out of approximately 50µs. Maximum
reset time-out is limited by the largest available low
leakage capacitor. The accuracy of the time-out period will
be affected by capacitor leakage (the nominal charging
current is 2µA) and capacitor tolerance. A low leakage
ceramic capacitor is recommended.
2900f
11
LTC2900
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APPLICATIO S I FOR ATIO
Ensuring Reset Valid for VCC Down to 0V (LTC2900-2)
Some applications require the reset output (RST) to be
valid with VCC down to 0V. The LTC2900-2 is designed to
handle this requirement with the addition of an external
resistor from RST to ground. The resistor will provide a
path for stray charge and/or leakage currents, preventing
the RST output from floating to undetermined voltages
when connected to high impedance (such as CMOS logic
inputs). The resistor value should be small enough to
provide effective pull-down without excessively loading
the active pull-up circuitry. Too large a value may not pull
down well enough. A 100k resistor from RST to ground is
satisfactory for most applications.
U
TYPICAL APPLICATIO S
Quad Supply Monitor with Push-Button Reset
5V, 3V, 1.8V, 12V (ADJ)
1.8V
5V
1
2
V3
V2
V1
V4
10
3V
9
R3
2.15M
1%
LTC2900
8
VREF
CRT
4
7
RST
VPG
6
5
PBR
GND
3
SYSTEM
RESET
CRT
12V
VTRIP = 11.25V
R4
100k
1%
NORMALLY
OPEN
2900 TA02
5V, – 5V Monitor and Unused V2, V3 Inputs
Pulled Above Trip Thresholds
1
5V
V3
V2
9
V4
LTC2900
8
VREF
CRT
4
7
VPG
RST
5
6
GND
PBR
2
R3
464k
1%
10
V1
–5V
VTRIP = –4.64V
3
SYSTEM
RESET
CRT
R1
R4
16.2k 121k
1%
1%
R2
86.6k
1%
2900 TA03
2900f
12
LTC2900
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TYPICAL APPLICATIO S
5V, 3.3V, 12V, –5.2V Monitor with Manual Reset and LED Indication on RST
12V
R5
VTRIP = 11.25V 2.15M
1%
R6
100k
1%
1
V2
10
3.3V
9
V4
V1
LTC2900-1
8
VREF
CRT
4
7
RST
VPG
6
5
PBR
GND
2
5V
RL1
1k
SYSTEM
RESET
V3
CRT
LED
10k*
R3
487k
1%
R4
121k
1%
R1
93.1k
1%
R2
9.53k
1%
3
MANUAL RESET
BUTTON
(NORMALLY OPEN)
*OPTIONAL RESISTOR RECOMMENDED
TO EXTEND ESD TOLERANCE
–5.2V
VTRIP = –4.87V
2900 TA05
Low Voltage Quad Supply Monitor 3.3V, 2.5V, 1V (ADJ), 0.9V (ADJ)
R5
86.6k
1%
1V
VTRIP = 0.933V
1
3.3V
V3
V2
10
9
V4
LTC2900
8
VREF
CRT
4
7
RST
VPG
5
6
PBR
GND
2
R3
68.1k
1%
2.5V
V1
0.9V
VTRIP = 0.84V
3
R6
100k
1%
SYSTEM
RESET
CRT
R1
86.6k
1%
R2
16.2k
1%
R4
100k
1%
2900 TA04
2900f
13
LTC2900
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PACKAGE DESCRIPTIO
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.675 ±0.05
3.50 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
R = 0.115
TYP
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
0.38 ± 0.10
6
10
5
1
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 5)
0.200 REF
(DD10) DFN 0403
0.75 ±0.05
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. EXPOSED PAD SHALL BE SOLDER PLATED
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
2900f
14
LTC2900
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PACKAGE DESCRIPTIO
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.2 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.497 ± 0.076
(.0196 ± .003)
REF
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
NOTE 4
4.90 ± 0.15
(1.93 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.01
(.021 ± .006)
DETAIL “A”
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.13 ± 0.076
(.005 ± .003)
MSOP (MS) 0802
2900f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC2900
U
TYPICAL APPLICATIO
Monitor Eight Supplies Using Supervisory Cascade
12V (ADJ), 5V, 3.3V, 3V, 2.5V, 1.8V, 1V (ADJ), – 5V (– ADJ)
R5A
86.6k 1%
MASTER
RESET
R3B
464k 1%
–5V
2.5V
1V
R3A
2150k 1%
3V
1
12V
5V
V3
V2
10
9
V4
V1
LTC2900-2
8
VREF
CRT
4
7
RST
VPG
5
6
PBR
GND
1
1.8V
2
R6A
100k
1%
CRTA
20k
V2
R4B
121k
1%
10
9
V4
V1
LTC2900-2
8
VREF
CRT
4
7
RST
VPG
6
5
PBR
GND
2
3.3V
3
3
R4A
100k
1%
V3
R1A
40.2k
1%
CRTB
R2A
59k
1%
R1B
22.1k
1%
R2B
78.7k
1%
100k
2900 TA06
RELATED PARTS
PART NUMBER
LTC690
LTC694-3.3
LTC699
LTC1232
LTC1326
LTC1326-2.5
LTC1536
LTC1726-2.5
LTC1726-5
LTC1727-2.5/LTC1727-5
LTC1728-1.8/LTC1728-3.3
LTC1728-2.5/LTC1728-5
LTC1985-1.8
LTC2901
DESCRIPTION
5V Supply Monitor, Watchdog Timer and Battery Backup
3.3V Supply Monitor, Watchdog Timer and Battery Backup
5V Supply Monitor and Watchdog Timer
5V Supply Monitor, Watchdog Timer and Push-Button Reset
Micropower Precision Triple Supply Monitor for 5V, 3.3V and ADJ
Micropower Precision Triple Supply Monitor for 2.5V, 3.3V and ADJ
Precision Triple Supply Monitor for PCI Applications
Micropower Triple Supply Monitor for 2.5V, 3.3V and ADJ
Micropower Triple Supply Monitor for 5V, 3.3V and ADJ
Micropower Triple Supply Monitors with Open-Drain Reset
Micropower Triple Supply Monitors with Open-Drain Reset
Micropower Triple Supply Monitors with Open-Drain Reset
Micropower Triple Supply Monitor with Push-Pull Reset Output
Programmable Quad Supply Monitor
LTC2902
Programmable Quad Supply Monitor
COMMENTS
4.65V Threshold
2.9V Threshold
4.65V Threshold
4.37V/4.62V Threshold
4.725V, 3.118V, 1V Thresholds (±0.75%)
2.363V, 3.118V, 1V Thresholds (±0.75%)
Meets PCI tFAIL Timing Specifications
Adjustable RESET and Watchdog Time-Outs
Adjustable RESET and Watchdog Time-Outs
Individual Monitor Outputs in MSOP
5-Lead SOT-23 Package
5-Lead SOT-23 Package
5-Lead SOT-23 Package
Adjustable Reset and Watchdog Timers, 16-Lead
Narrow SSOP Package
Adjustable Reset Timer, Supply Tolerance and
Margining Functions, 16-Lead Narrow SSOP Package
2900f
16
Linear Technology Corporation
LT/TP 0403 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2002