Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C DESCRIPTION PIN CONFIGURATIONS The 555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200mA. D, N, FE Packages GND 1 8 VCC TRIGGER 2 7 DISCHARGE OUTPUT 3 6 THRESHOLD RESET 4 5 CONTROL VOLTAGE FEATURES F Package • Turn-off time less than 2µs • Max. operating frequency greater than 500kHz • Timing from microseconds to hours • Operates in both astable and monostable modes • High output current • Adjustable duty cycle • TTL compatible • Temperature stability of 0.005% per °C GND 1 14 VCC NC 2 13 NC TRIGGER 3 12 DISCHARGE OUTPUT 4 11 NC NC 5 10 THRESHOLD RESET 6 9 NC NC 7 8 CONTROL VOLTAGE TOP VIEW APPLICATIONS • Precision timing • Pulse generation • Sequential timing • Time delay generation • Pulse width modulation ORDERING INFORMATION TEMPERATURE RANGE ORDER CODE DWG # 8-Pin Plastic Small Outline (SO) Package DESCRIPTION 0 to +70°C NE555D 0174C 8-Pin Plastic Dual In-Line Package (DIP) 0 to +70°C NE555N 0404B 8-Pin Plastic Dual In-Line Package (DIP) -40°C to +85°C SA555N 0404B 8-Pin Plastic Small Outline (SO) Package -40°C to +85°C SA555D 0174C 8-Pin Hermetic Ceramic Dual In-Line Package (CERDIP) -55°C to +125°C SE555CFE 8-Pin Plastic Dual In-Line Package (DIP) -55°C to +125°C SE555CN 0404B 14-Pin Plastic Dual In-Line Package (DIP) -55°C to +125°C SE555N 0405B 8-Pin Hermetic Cerdip -55°C to +125°C SE555FE 14-Pin Ceramic Dual In-Line Package (CERDIP) 0 to +70°C NE555F 0581B 14-Pin Ceramic Dual In-Line Package (CERDIP) -55°C to +125°C SE555F 0581B 14-Pin Ceramic Dual In-Line Package (CERDIP) -55°C to +125°C SE555CF 0581B August 31, 1994 346 853-0036 13721 Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C BLOCK DIAGRAM VCC 8 R THRESHOLD 6 CONTROL VOLTAGE 5 COMPARATOR R TRIGGER 2 COMPARATOR R DISCHARGE 7 RESET FLIP FLOP 4 OUTPUT STAGE 3 1 OUTPUT GND EQUIVALENT SCHEMATIC FM CONTROL VOLTAGE VCC R1 4.7K R2 330 R3 4.7 K R 4 1 K R 7 5 K R12 6.8K Q21 Q6 Q5 Q7 Q9 Q22 Q8 Q1 THRESHOLD Q19 R1 0 82. K Q4 Q2 R13 3.9K Q3 OUTPUT Q23 C R5 10 K R8 5K Q11 Q12 Q10 CB Q18 E Q16 Q25 R9 5K R6 100K DISCHARGE Q14 R16 100 Pin numbers are for 8-Pin package August 31, 1994 R14 220 Q24 Q15 RESET NOTE: Q20 Q17 Q13 TRIGGER GND R11 4.7K B 347 R15 4.7K Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER RATING UNIT SE555 +18 V NE555, SE555C, SA555 +16 V 600 mW NE555 0 to +70 °C SA555 -40 to +85 °C SE555, SE555C -55 to +125 °C -65 to +150 °C +300 °C Supply voltage VCC PD Maximum allowable power dissipation1 TA Operating ambient temperature range TSTG Storage temperature range TSOLD Lead soldering temperature (10sec max) NOTES: 1. The junction temperature must be kept below 125°C for the D package and below 150°C for the FE, N and F packages. At ambient temperatures above 25°C, where this limit would be derated by the following factors: D package 160°C/W FE package 150°C/W N package 100°C/W F package 105°C/W August 31, 1994 348 Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C DC AND AC ELECTRICAL CHARACTERISTICS TA = 25°C, VCC = +5V to +15 unless otherwise specified. SYMBOL PARAMETER VCC Supply voltage ICC Supply current (low state)1 Timing error (monostable) tM Initial accuracy2 ∆tM/∆T Drift with temperature ∆tM/∆VS TEST CONDITIONS 4.5 V mA VCC=15V, RL=∞ 10 12 10 15 mA 0.5 2.0 1.0 3.0 % 30 100 50 150 ppm/°C 0.05 0.2 0.1 0.5 %/V 6 5 RA=2kΩ to 100kΩ C=0.1µF RA, RB=1kΩ to 100kΩ C=0.1µF 4 500 Drift with supply voltage Threshold current3 VTRIG Trigger voltage UNIT 6 VCC=15V ITH 4.5 Max 16 Drift with temperature Threshold voltage 18 Typ 3 ∆tA/∆T VTH Min 5 Initial accuracy2 Control voltage level NE555/SE555C Max 3 tA VC Typ VCC=5V, RL=∞ Drift with supply voltage Timing error (astable) ∆tA/∆VS SE555 Min 13 % 500 ppm/°C 0.15 0.6 0.3 1 %/V VCC=15V 9.6 10.0 10.4 9.0 10.0 11.0 V VCC=5V 2.9 3.33 3.8 2.6 3.33 4.0 V VCC=15V 9.4 10.0 10.6 8.8 10.0 11.2 V VCC=5V 2.7 3.33 4.0 2.4 3.33 4.2 V 0.1 0.25 0.1 0.25 µA V VCC=15V 4.8 5.0 5.2 4.5 5.0 5.6 VCC=5V 1.45 1.67 1.9 1.1 1.67 2.2 V 0.5 0.9 0.5 2.0 µA ITRIG Trigger current VTRIG=0V VRESET Reset voltage4 VCC=15V, VTH =10.5V 1.0 V IRESET Reset current VRESET=0.4V 0.1 0.4 0.1 0.4 mA Reset current VRESET=0V 0.4 1.0 0.4 1.5 mA ISINK=10mA 0.1 0.15 0.1 0.25 V ISINK=50mA 0.4 0.5 0.4 0.75 V ISINK=100mA 2.0 2.2 2.0 2.5 V ISINK=200mA 2.5 0.3 1.0 0.3 VCC=15V VOL Output voltage (low) 2.5 V VCC=5V ISINK=8mA 0.1 0.25 0.3 0.4 V ISINK=5mA 0.05 0.2 0.25 0.35 V VCC=15V ISOURCE=200mA VOH Output voltage (high) ISOURCE=100mA 12.5 13.0 13.3 3.0 3.3 12.5 V 12.75 13.3 V 2.75 3.3 VCC=5V ISOURCE=100mA V 0.5 2.0 0.5 2.0 µs Rise time of output 100 200 100 300 ns Fall time of output 100 200 100 300 ns Discharge leakage current 20 100 20 100 nA tOFF Turn-off time5 tR tF VRESET=VCC NOTES: 1. Supply current when output high typically 1mA less. 2. Tested at VCC=5V and VCC=15V. 3. This will determine the max value of RA+RB, for 15V operation, the max total R=10MΩ, and for 5V operation, the max. total R=3.4MΩ. 4. Specified with trigger input high. 5. Time measured from a positive going input pulse from 0 to 0.8×VCC into the threshold to the drop from high to low of the output. Trigger is tied to threshold. August 31, 1994 349 Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage 150 10.0 125 8.0 -55oC 100 0 oC 75 +25oC +70oC 50 25 1.015 +125oC +25oC 6.0 -55oC 4.0 2.0 +125oC 0 1.005 1.000 0.995 0.990 0.1 0.2 0.3 0.985 5.0 0.4 (XVCC) 10.0 15.0 -50 -25 SUPPLY VOLTAGE – VOLTS LOWEST VOLTAGE LEVEL OF TRIGGER PULSE Low Output Voltage vs Output Sink Current VCC = 15V -55oC +25oC 0.1 0.001 1.0 -55oC +25oC +25oC +25oC 0.1 V OUT – VOLTS V OUT – VOLTS +25oC +25oC -55oC 2.0 5.0 10 20 50 100 +25oC 0.1 +25oC 55oC 0.01 0.01 1.0 1.0 2.0 5.0 ISINK – mA 10 20 50 1.0 100 2.0 5.0 ISINK – mA High Output Voltage Drop vs Output Source Current 10 20 50 100 ISINK – mA Delay Time vs Supply Voltage 2.0 +75 +100 +125 10 VCC = 10V 1.0 -55oC +25 +50 Low Output Voltage vs Output Sink Current 10 VCC = 5V 1.0 0 TEMPERATURE – oC Low Output Voltage vs Output Sink Current 10 V OUT – VOLTS 1.010 0 0 Propagation Delay vs Voltage Level of Trigger Pulse 1.015 300 1.010 250 +25oC 1.4 1.2 +125oC 1.0 0.8 0.6 0.4 PROPAGATION DELAY – ns 1.6 NORMALIZED DELAY TIME –55oC 1.8 V CC V OUT – VOLTS Delay Time vs Temperature NORMALIZED DELAY TIME SUPPLY CURRENT – mA MINIMUM PULSE WIDTH (ns) Minimum Pulse Width Required for Triggering 1.005 1.000 0.995 0.990 -55oC 200 0 oC 150 100 +25oC +70oC 50 +25oC 5V ≤ VCC ≤ 15V 0.2 0.985 0 1.0 2.0 5.0 10 20 ISOURCE – mA August 31, 1994 50 100 0 0 5 10 15 SUPPLY VOLTAGE – V 350 20 0 0.1 0.2 0.3 LOWEST VOLTAGE LEVEL OF TRIGGER PULSE – XVCC 0.4 Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C TYPICAL APPLICATIONS VCC RA 555 OR 1/2 556 8 7 DISCHARGE R RB 5 CONTROL VOLTAGE .01µF COMP 6 THRESHOLD 3 FLIP FLOP R OUTPUT OUTPUT COMP 2 TRIGGER R f C 4 1.49 (R A 2R B)C RESET Astable Operation VCC RA 555 OR 1/2 556 8 DISCHARGE 7 CONTROL VOLTAGE 5 R .01µF | ∆t | COMP 6 THRESHOLD C FLIP FLOP R 3 OUTPUT OUTPUT COMP 2 TRIGGER 1 V 3 CC R 4 RESET Monostable Operation August 31, 1994 351 ∆T = 1.1RC Philips Semiconductors Linear Products Product specification Timer NE/SA/SE555/SE555C TYPICAL APPLICATIONS VCC VCC VCC 10k 1/3 VCC .001µF 2 555 OVOLTS 1 DURATION OF TRIGGER PULSE AS SEEN BY THE TIMER NOTE: All resistor values are in Ω SWITCH GROUNDED AT THIS POINT Figure 1. AC Coupling of the Trigger Pulse Trigger Pulse Width Requirements and Time Delays Another consideration is the “turn-off time”. This is the measurement of the amount of time required after the threshold reaches 2/3 VCC to turn the output low. To explain further, Q1 at the threshold input turns on after reaching 2/3 VCC, which then turns on Q5, which turns on Q6. Current from Q6 turns on Q16 which turns Q17 off. This allows current from Q19 to turn on Q20 and Q24 to given an output low. These steps cause the 2µs max. delay as stated in the data sheet. Due to the nature of the trigger circuitry, the timer will trigger on the negative going edge of the input pulse. For the device to time out properly, it is necessary that the trigger voltage level be returned to some voltage greater than one third of the supply before the time out period. This can be achieved by making either the trigger pulse sufficiently short or by AC coupling into the trigger. By AC coupling the trigger, see Figure 1, a short negative going pulse is achieved when the trigger signal goes to ground. AC coupling is most frequently used in conjunction with a switch or a signal that goes to ground which initiates the timing cycle. Should the trigger be held low, without AC coupling, for a longer duration than the timing cycle the output will remain in a high state for the duration of the low trigger signal, without regard to the threshold comparator state. This is due to the predominance of Q15 on the base of Q16, controlling the state of the bi-stable flip-flop. When the trigger signal then returns to a high level, the output will fall immediately. Thus, the output signal will follow the trigger signal in this case. August 31, 1994 Also, a delay comparable to the turn-off time is the trigger release time. When the trigger is low, Q10 is on and turns on Q11 which turns on Q15. Q15 turns off Q16 and allows Q17 to turn on. This turns off current to Q20 and Q24, which results in output high. When the trigger is released, Q10 and Q11 shut off, Q15 turns off, Q16 turns on and the circuit then follows the same path and time delay explained as “turn off time”. This trigger release time is very important in designing the trigger pulse width so as not to interfere with the output signal as explained previously. 352