74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 03 — 4 April 2005 Product data sheet 1. General description The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC164; 74HCT164 are 8-bit edge-triggered shift registers with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (DSA or DSB); either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH. Data shifts one place to the right on each LOW-to-HIGH transition of the clock (CP) input and enters into Q0, which is the logical AND of the two data inputs (DSA and DSB) that existed one set-up time prior to the rising clock edge. A LOW level on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs LOW. 2. Features ■ ■ ■ ■ Gated serial data inputs Asynchronous master reset Complies with JEDEC standard no. 7A ESD protection: ◆ HBM EIA/JESD22-A114-B exceeds 2000 V ◆ MM EIA/JESD22-A115-A exceeds 200 V. ■ Multiple package options ■ Specified from −40 °C to +85 °C and −40 °C to +125 °C. 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol Parameter Conditions Min Typ Max Unit CP to Qn CL = 15 pF; VCC = 5 V - 12 - ns MR to Qn CL = 15 pF; VCC = 5 V - 11 - ns Type 74HC164 tPHL, tPLH propagation delay 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 1: Quick reference data …continued GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol Parameter Conditions Min Typ Max Unit fmax maximum clock frequency CL = 15 pF; VCC = 5 V - 78 - MHz CI input capacitance CPD power dissipation capacitance per package [1] - 3.5 - pF - 40 - pF [2] Type 74HCT164 tPHL, tPLH propagation delay CP to Qn CL = 15 pF; VCC = 5 V - 14 - ns MR to Qn CL = 15 pF; VCC = 5 V - 16 - ns CL = 15 pF; VCC = 5 V - 61 - MHz - 3.5 - pF - 40 - pF fmax maximum clock frequency CI input capacitance [1] power dissipation capacitance per package CPD [3] [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz N = number of inputs switching ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in Volts [2] For HC the condition is VI = GND to VCC. [3] For HCT the condition is VI = GND to VCC − 1.5 V. 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description 74HC164N −40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 74HC164D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm SOT108-2 74HC164DB −40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74HC164PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body SOT402-1 width 4.4 mm 74HCT164N −40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 74HCT164D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm SOT108-2 9397 750 14693 Product data sheet Version © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 2 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 2: Ordering information …continued Type number Package Temperature range Name Description Version 74HCT164DB −40 °C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 74HCT164PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body SOT402-1 width 4.4 mm 74HCT164BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 5. Functional diagram SRG8 8 C1/ 9 DSA DSB 1 2 CP 8 MR 9 R 1 2 3 3 Q0 4 Q1 5 Q2 4 5 6 Q3 10 Q4 11 Q5 12 Q6 13 Q7 & 1D 6 10 11 001aac423 12 13 001aac424 Fig 1. Logic symbol Fig 2. IEC logic symbol DSA DSB CP MR 1 2 8 8-BIT SERIAL−IN/PARALLEL−OUT SHIFT REGISTER 9 3 4 5 6 10 11 12 13 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aac425 Fig 3. Logic diagram 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 3 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register DSA D DSB Q D CP FF1 RD Q D CP FF2 RD Q D CP FF3 RD Q D CP FF4 RD Q D CP FF5 RD Q D CP FF6 RD Q D CP FF7 RD Q CP FF8 RD CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aac616 Fig 4. Functional diagram 6. Pinning information 1 terminal 1 index area DSA 1 14 VCC DSB 2 13 Q7 14 VCC DSA 6.1 Pinning DSB 2 13 Q7 Q0 3 Q1 4 164 11 Q5 Q2 5 GND(1) 10 Q4 Q3 6 12 Q6 12 Q6 Q2 5 Q3 6 9 MR GND 7 8 CP 164 11 Q5 9 8 4 CP Q1 7 3 GND Q0 MR 10 Q4 001aac828 Transparent top view (1) The die substrate is attached to the exposed die pad using conductive die attach material. It can not be used as a supply pin of input. 001aac422 Fig 5. Pin configuration DIP14, SO14, SSOP14 and TSSOP14 Fig 6. Pin configuration DHVQFN14 6.2 Pin description Table 3: Pin description Symbol Pin Description DSA 1 data input DSB 2 data input Q0 3 output Q1 4 output Q2 5 output Q3 6 output 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 4 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 3: Pin description …continued Symbol Pin Description GND 7 ground (0 V) CP 8 clock input (LOW-to-HIGH, edge-triggered) MR 9 master reset input (active LOW) Q4 10 output Q5 11 output Q6 12 output Q7 13 output VCC 14 positive supply voltage 7. Functional description 7.1 Function selection Table 4: Operating modes Function table [1] Input MR Output CP DSA DSB Q0 Q1 to Q7 Reset (clear) L X X X L L to L Shift H ↑ l l L q0 to q6 H ↑ l h L q0 to q6 H ↑ h l L q0 to q6 H ↑ h h H q0 to q6 [1] H = HIGH voltage level h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition ↑ = LOW-to-HIGH clock transition 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7 V IIK input diode current VI < −0.5 V or VI > VCC + 0.5 V - ±20 mA IOK output diode current VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA IO output source or sink current VO = −0.5 V to VCC + 0.5 V - ±25 mA ICC, IGND VCC or GND current - ±50 mA Tstg storage temperature −65 +150 °C 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 5 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 5: Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Ptot total power dissipation Min Max Unit DIP14 package [1] - 750 mW SO14; [2] - 500 mW SSOP14; TSSOP14; DHVQFN14 package [1] For DIP14 packages: Ptot derates linearly with 12 mW/K above 70 °C. [2] For SO14 packages: Ptot derates linearly with 8 mW/K above 70 °C. For SSOP14 and TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 °C. 9. Recommended operating conditions Table 6: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit Type 74HC164 VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V tr, tf input rise and fall time VCC = 2.0 V - - 1000 ns VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns −40 - +125 °C Tamb ambient temperature Type 74HCT164 VCC supply voltage 4.5 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V tr, tf input rise and fall time Tamb ambient temperature VCC = 4.5 V - 6.0 500 ns −40 - +125 °C Conditions Min Typ Max Unit VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V 10. Static characteristics Table 7: Static characteristics for 74HC164 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH HIGH-level input voltage 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 6 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 7: Static characteristics for 74HC164 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VIL LOW-level input voltage VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V IO = −20 µA; VCC = 2.0 V 1.9 2.0 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - V IO = −4 mA; VCC = 4.5 V 3.98 4.32 - V IO = −5.2 mA; VCC = 6.0 V 5.48 5.81 - V VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL IO = 20 µA; VCC = 2.0 V - 0 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 V IO = 4 mA; VCC = 4.5 V - 0.15 0.26 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - ±0.1 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 µA CI input capacitance - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V Tamb = −40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4 mA; VCC = 4.5 V 3.84 - - V IO = −5.2 mA; VCC = 6.0 V 5.34 - - V IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.33 V IO = 5.2 mA; VCC = 6.0 V - - 0.33 V VI = VIH or VIL VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 µA 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 7 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 7: Static characteristics for 74HC164 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V Tamb = −40 °C to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL - IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4 mA; VCC = 4.5 V 3.7 - - V IO = −5.2 mA; VCC = 6.0 V 5.2 - - V VI = VIH or VIL - IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 µA Conditions Min Typ Max Unit Table 8: Static characteristics for 74HCT164 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = 25 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −4 mA; VCC = 4.5 V 3.98 4.32 - V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 4 mA; VCC = 4.5 V - 0.15 0.26 V VOL LOW-level output voltage VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - ±0.1 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 µA ∆ICC additional quiescent supply current per input pin VI = VCC − 2.1 V; other inputs VI = VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A - 100 360 µA CI input capacitance - 3.5 - pF 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 8 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 8: Static characteristics for 74HCT164 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −4 mA; VCC = 4.5 V 3.84 - - V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.33 V VOL LOW-level output voltage VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - ±1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 80.0 µA ∆ICC additional quiescent supply current per input pin VI = VCC − 2.1 V; other inputs VI = VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A - - 450 µA Tamb = −40 °C to +125 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −4 mA; VCC = 4.5 V 3.7 - - V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.4 V VOL LOW-level output voltage VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - ±1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 160.0 µA ∆ICC additional quiescent supply current per input pin VI = VCC − 2.1 V; other inputs VI = VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A - - 490 µA 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 9 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register 11. Dynamic characteristics Table 9: Dynamic characteristics for 74HC164 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - 41 170 ns VCC = 4.5 V - 15 34 ns VCC = 6.0 V - 12 29 ns VCC = 2.0 V - 39 140 ns VCC = 4.5 V - 14 28 ns VCC = 6.0 V - 11 24 ns VCC = 2.0 V - 19 75 ns VCC = 4.5 V - 7 15 ns VCC = 6.0 V - 6 13 ns VCC = 2.0 V 80 14 - ns VCC = 4.5 V 16 5 - ns VCC = 6.0 V 14 4 - ns master reset pulse width; see Figure 8 LOW VCC = 2.0 V 60 17 - ns VCC = 4.5 V 12 6 - ns VCC = 6.0 V 10 5 - ns VCC = 2.0 V 60 17 - ns VCC = 4.5 V 12 6 - ns VCC = 6.0 V 10 5 - ns VCC = 2.0 V 60 8 - ns VCC = 4.5 V 12 3 - ns VCC = 6.0 V 10 2 - ns VCC = 2.0 V +4 −6 - ns VCC = 4.5 V +4 −2 - ns VCC = 6.0 V +4 −2 - ns VCC = 2.0 V 6 23 - MHz VCC = 4.5 V 30 71 - MHz VCC = 6.0 V 35 85 - MHz Tamb = 25 °C tPHL, tPLH propagation delay CP to Qn tPHL propagation delay MR to Qn tTHL, tTLH output transition time tW trem tsu th fmax clock pulse width; HIGH or LOW removal time MR to CP set-up time DSA, and DSB to CP hold time DSA and DSB to CP maximum clock pulse frequency see Figure 7 see Figure 8 see Figure 7 see Figure 7 see Figure 8 see Figure 9 see Figure 9 see Figure 7 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 10 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 9: Dynamic characteristics for 74HC164 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C tPHL, tPLH propagation delay CP to Qn tPHL propagation delay MR to Qn tTHL, tTLH output transition time tW trem tsu th fmax clock pulse width; HIGH or LOW see Figure 7 VCC = 2.0 V - - 215 ns VCC = 4.5 V - - 43 ns VCC = 6.0 V - - 37 ns see Figure 8 VCC = 2.0 V - - 175 ns VCC = 4.5 V - - 35 ns VCC = 6.0 V - - 30 ns see Figure 7 VCC = 2.0 V - - 95 ns VCC = 4.5 V - - 19 ns VCC = 6.0 V - - 16 ns see Figure 7 VCC = 2.0 V 100 - - ns VCC = 4.5 V 20 - - ns VCC = 6.0 V 17 - - ns master reset pulse width; see Figure 8 LOW VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns removal time MR to CP set-up time DSA and DSB to CP hold time DSA and DSB to CP maximum clock pulse frequency see Figure 8 VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns see Figure 9 VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns see Figure 9 VCC = 2.0 V 4 - - ns VCC = 4.5 V 4 - - ns VCC = 6.0 V 4 - - ns see Figure 7 VCC = 2.0 V 5 - - MHz VCC = 4.5 V 24 - - MHz VCC = 6.0 V 28 - - MHz 9397 750 14693 Product data sheet - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 11 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 9: Dynamic characteristics for 74HC164 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay CP to Qn tPHL propagation delay MR to Qn tTHL, tTLH output transition time tW trem tsu th fmax clock pulse width; HIGH or LOW see Figure 7 VCC = 2.0 V - - 255 ns VCC = 4.5 V - - 51 ns VCC = 6.0 V - - 43 ns see Figure 7 VCC = 2.0 V - - 210 ns VCC = 4.5 V - - 42 ns VCC = 6.0 V - - 36 ns see Figure 7 VCC = 2.0 V - - 110 ns VCC = 4.5 V - - 22 ns VCC = 6.0 V - - 19 ns see Figure 7 VCC = 2.0 V 120 - - ns VCC = 4.5 V 24 - - ns VCC = 6.0 V 20 - - ns master reset pulse width; see Figure 7 LOW VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns removal time MR to CP set-up time DSA and DSB to CP hold time DSA and DSB to CP maximum clock pulse frequency see Figure 8 VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns see Figure 9 VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns see Figure 9 VCC = 2.0 V 4 - - ns VCC = 4.5 V 4 - - ns VCC = 6.0 V 4 - - ns see Figure 7 VCC = 2.0 V 4 - - MHz VCC = 4.5 V 20 - - MHz VCC = 6.0 V 24 - - MHz 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 12 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 10: Dynamic characteristics for 74HCT164 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit tPHL, tPLH propagation delay CP to Qn VCC = 4.5 V; see Figure 7 - 17 36 ns propagation delay MR to Qn VCC = 4.5 V; see Figure 8 - 19 38 ns VCC = 4.5 V; see Figure 7 - 7 15 ns VCC = 4.5 V; see Figure 7 18 7 - ns master reset pulse width; VCC = 4.5 V; see Figure 8 LOW 18 10 - ns trem removal time MR to CP VCC = 4.5 V; see Figure 8 16 7 - ns tsu set-up time DSA, and DSB to CP VCC = 4.5 V; see Figure 9 12 6 - ns th hold time DSA, and DSB VCC = 4.5 V; to CP see Figure 9 +4 −2 - ns fmax maximum clock pulse frequency VCC = 4.5 V; see Figure 7 27 55 - MHz tPHL, tPLH propagation delay CP to Qn VCC = 4.5 V; see Figure 7 - - 45 ns propagation delay MR to Qn VCC = 4.5 V; see Figure 8 - - 48 ns VCC = 4.5 V; see Figure 7 - - 19 ns VCC = 4.5 V; see Figure 7 23 - - ns master reset pulse width; VCC = 4.5 V; see Figure 8 LOW 23 - - ns trem removal time MR to CP VCC = 4.5 V; see Figure 8 20 - - ns tsu set-up time DSA, and DSB to CP VCC = 4.5 V; see Figure 9 15 - - ns th hold time DSA, and DSB VCC = 4.5 V; to CP see Figure 9 4 - - ns fmax maximum clock pulse frequency VCC = 4.5 V; see Figure 7 22 - - MHz tPHL, tPLH propagation delay CP to Qn VCC = 4.5 V; see Figure 7 - - 54 ns propagation delay MR to Qn VCC = 4.5 V; see Figure 8 - - 57 ns VCC = 4.5 V; see Figure 7 - - 22 ns Tamb = 25 °C tPHL tTHL, tTLH output transition time tW clock pulse width; HIGH or LOW Tamb = −40 °C to +85 °C tPHL tTHL, tTLH output transition time tW clock pulse width; HIGH or LOW Tamb = −40 °C to +125 °C tPHL tTHL, tTLH output transition time 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 13 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register Table 10: Dynamic characteristics for 74HCT164 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit tW clock pulse width; HIGH or LOW VCC = 4.5 V; see Figure 7 27 - - ns master reset pulse width; VCC = 4.5 V; see Figure 8 LOW 27 - - ns trem removal time MR to CP VCC = 4.5 V; see Figure 8 24 - - ns tsu set-up time DSA and DSB to CP VCC = 4.5 V; see Figure 9 18 - - ns th hold time DSA and DSB to CP VCC = 4.5 V; see Figure 9 4 - - ns fmax maximum clock pulse frequency VCC = 4.5 V; see Figure 7 18 - - MHz 1/fmax VI CP input VM GND tW t PHL t PLH VOH VM Qn output VOL 001aac426 (1) 74HC164: VM = 50 %; VI = GND to VCC. 74HCT164: VM = 1.3 V; VI = GND to 3 V. Fig 7. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 14 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register VI VM MR input GND tW t rem VI CP input VM GND t PHL VOH VM Qn output VOL 001aac427 (1) 74HC164: VM = 50 %; VI = GND to VCC. 74HCT164: VM = 1.3 V; VI = GND to 3 V. Fig 8. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (CP) removal time VI VM CP input GND t su t su th th VI VM Dn input GND VOH VM Qn output VOL 001aac428 (1) 74HC164: VM = 50 %; VI = GND to VCC. 74HCT164: VM = 1.3 V; VI = GND to 3 V. The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 9. Waveforms showing the data set-up and hold times for Dn inputs 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 15 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register VCC PULSE GENERATOR VI VO D.U.T. RT CL mna101 Definitions test circuit. RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Fig 10. Load circuitry for switching times 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 16 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register 12. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.02 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT27-1 050G04 MO-001 SC-501-14 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 11. Package outline SOT27-1 (DIP14) 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 17 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register SO14: plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm D E SOT108-2 A X c y HE v M A Z 8 14 A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp v w y Z (1) mm 1.75 0.25 0.10 1.55 1.40 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.061 inches 0.069 0.004 0.055 0.05 0.244 0.039 0.041 0.228 0.016 0.01 0.01 θ o 0.028 0.004 0.012 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 01-05-29 03-02-19 MS-012 Fig 12. Package outline SOT108-2 (SO14) 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 18 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 13. Package outline SOT337-1 (SSOP14) 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 19 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 14. Package outline SOT402-1 (TSSOP14) 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 20 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 15. Package outline SOT762-1 (DHVQFN14) 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 21 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register 13. Revision history Table 11: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74HC_HCT164_3 20050404 Product data sheet - 74HC_HCT164_ CNV_2 Modifications: 74HC_HCT164_CNV_2 • The format of this data sheet is redesigned to comply with the current presentation and information standard of Philips Semiconductors • Added SOT762-1 and Ordering information 19901201 Product specification - 9397 750 14693 Product data sheet 9397 750 14693 - - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 22 of 24 74HC164; 74HCT164 Philips Semiconductors 8-bit serial-in, parallel-out shift register 14. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 15. Definitions 16. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 17. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 14693 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 03 — 4 April 2005 23 of 24 Philips Semiconductors 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register 18. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Function selection. . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 23 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information . . . . . . . . . . . . . . . . . . . . 23 © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 4 April 2005 Document number: 9397 750 14693 Published in The Netherlands