INTEGRATED CIRCUITS DATA SHEET TDA8702 8-bit video digital-to-analog converter Product specification Supersedes data of April 1993 File under Integrated Circuits, IC02 1996 Aug 23 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 FEATURES APPLICATIONS • 8-bit resolution • High-speed digital-to-analog conversion • Conversion rate up to 30 MHz • Digital TV including: • TTL input levels – field progressive scan • Internal reference voltage generator – line progressive scan • Two complementary analog voltage outputs • Subscriber TV decoders • No deglitching circuit required • Satellite TV decoders • Internal input register • Digital VCRs. • Low power dissipation • Internal 75 Ω output load (connected to the analog supply) GENERAL DESCRIPTION The TDA8702 is an 8-bit Digital-to-Analog Converter (DAC) for video and other applications. It converts the digital input signal into an analog voltage output at a maximum conversion rate of 30 MHz. No external reference voltage is required and all digital inputs are TTL compatible. • Very few external components required. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCCA analog supply voltage VCCD digital supply voltage 4.5 5.0 5.5 V ICCA analog supply current note 1 − 26 32 mA ICCD digital supply current note 1 − 23 30 mA VOUT − VOUT full-scale analog output voltage (peak-to-peak value) note 2 ZL = 10 kΩ −1.45 −1.60 −1.75 V ZL = 75 kΩ −0.72 −0.80 −0.88 V 4.5 5.0 5.5 V ILE DC integral linearity error − − ±1/2 LSB DLE DC differential linearity error − − ±1/2 LSB fCLK maximum conversion rate − − 30 MHz B −3 dB analog bandwidth − 150 − MHz Ptot total power dissipation − 250 340 mW fCLK = 30 MHz; note 3 Note 1. D0 to D7 connected to VCCD and CLK connected to DGND. 2. The analog output voltages (VOUT and VOUT) are negative with respect to VCCA (see Table 1). The output resistance between VCCA and each of these outputs is typically 75 Ω. 3. The −3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255). 1996 Aug 23 2 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION TDA8702 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 TDA8702T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 BLOCK DIAGRAM handbook, full pagewidth 1 REF 100 nF DGND AGND 6 16 CURRENT GENERATORS 2 75 Ω 5 CLK (LSB) D0 D1 D2 D3 D4 D5 D6 (MSB) D7 CURRENT REFERENCE LOOP BAND-GAP REFERENCE 75 Ω 15 CLOCK INPUT INTERFACE CURRENT SWITCHES TDA8702/ TDA8702T REGISTERS 14 13 12 11 3 4 10 9 8 7 DATA INPUT INTERFACE MSA659 Fig.1 Block diagram. 1996 Aug 23 3 VCCA VOUT VOUT VCCD Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 PINNING SYMBOL PIN DESCRIPTION REF 1 voltage reference (decoupling) AGND 2 analog ground D2 3 data input; bit 2 D3 4 data input; bit 3 CLK 5 clock input DGND 6 D7 handbook, halfpage REF 1 16 V CCA AGND 2 15 V OUT digital ground D2 3 14 V OUT 7 data input; bit 7 D3 4 D6 8 data input; bit 6 CLK 5 TDA8702/ TDA8702T 12 D0 D5 9 data input; bit 5 DGND 6 11 D1 D4 10 data input; bit 4 D7 7 10 D4 D1 11 data input; bit 1 D0 12 data input; bit 0 D6 8 9 D5 VCCD 13 positive supply voltage for digital circuits (+5 V) VOUT 14 analog voltage output VOUT 15 complementary analog voltage output VCCA 16 positive supply voltage for analog circuits (+5 V) 1996 Aug 23 13 V CCD MSA658 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER MIN. MAX. UNIT VCCA analog supply voltage −0.3 +7.0 V VCCD digital supply voltage −0.3 +7.0 V VCCA − VCCD supply voltage differential −0.5 +0.5 V AGND − DGND ground voltage differential −0.1 +0.1 V VI input voltage (pins 3 to 5 and 7 to 12) −0.3 VCCD V IOUT/IOUT total output current (pins 14 and 15) −5 +26 mA Tstg storage temperature −55 +150 °C Tamb operating ambient temperature 0 +70 °C Tj junction temperature − +125 °C HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL RESISTANCE SYMBOL Rth j-a 1996 Aug 23 PARAMETER VALUE UNIT SOT38-1 70 K/W SOT162-1 90 K/W from junction to ambient in free air 5 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 CHARACTERISTICS VCCA = V16 − V2 = 4.5 V to 5.5 V; VCCD = V13 − V6 = 4.5 V to 5.5 V; VCCA − VCCD = −0.5 V to +0.5 V; VREF decoupled to AGND by a 100 nF capacitor; Tamb = 0 °C to +70 °C; AGND and DGND shorted together; unless otherwise specified (typical values measured at VCCA = VCCD = 5 V and Tamb = 25 °C). SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VCCA analog supply voltage 4.5 VCCD digital supply voltage 4.5 5.0 5.5 V ICCA analog supply current note 1 − 26 32 mA ICCD digital supply current note 1 − 23 30 mA −0.1 − +0.1 V AGND − DGND ground voltage differential 5.0 5.5 V Inputs DIGITAL INPUTS (D7 TO D0) AND CLOCK INPUT (CLK) VIL LOW level input voltage 0 − 0.8 V VIH HIGH level input voltage 2.0 − VCCD V IIL LOW level input current VI = 0.4 V − −0.3 −0.4 mA IIH HIGH level input current VI = 2.7 V fCLK maximum clock frequency − 0.01 20 µA − − 30 MHz Outputs (note 2; referenced to VCCA) VOUT − VOUT full-scale analog output voltages (peak-to-peak value) ZL = 10 kΩ −1.45 −1.60 −1.75 V ZL = 75 Ω −0.72 −0.80 −0.88 V VOS analog offset output voltage code = 0 − −3 −25 mV VOUT/TC full-scale analog output voltage temperature coefficient − − 200 µV/K VOS/TC analog offset output voltage temperature coefficient − − 20 µV/K B −3 dB analog bandwidth − 150 − MHz Gdiff differential gain − 0.6 − % Φdiff differential phase − 1 − deg ZO output impedance − 75 − Ω note 3; fCLK = 30 MHz Transfer function (fCLK = 30 MHz) ILE DC integral linearity error − − ±1/2 LSB DLE DC differential linearity error − − ±1/2 LSB 1996 Aug 23 6 Philips Semiconductors Product specification 8-bit video digital-to-analog converter SYMBOL TDA8702 PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Switching characteristics (fCLK = 30 MHz); notes 4 and 5; see Figs 3, 4 and 5 −0.3 tSU;DAT data set-up time tHD;DAT data hold time tPD propagation delay time tS1 settling time 10% to 90% full-scale change to ±1 LSB tS2 settling time 10% to 90% full-scale change to ±1 LSB td input to 50% output delay time − − ns 2.0 − − ns − − 1.0 ns − 1.1 1.5 ns − 6.5 8.0 ns − 3.0 5.0 ns − − 30 LSB.ns Output transients (glitches; (fCLK = 30 MHz); note 6; see Fig.6 Eg glitch energy from code transition 127 to 128 Note 1. D0 to D7 are connected to VCCD, CLK is connected to DGND. 2. The analog output voltages (VOUT and VOUT are negative with respect to VCCA (see Table 1). The output resistance between VCCA and each of these outputs is 75 Ω (typ.). 3. The −3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input code transition (code 0 to 255). 4. The worst case characteristics are obtained at the transition from input code 0 to 255 and if an external load impedance greater than 75 Ω is connected between VOUT or VOUT and VCCA. The specified values have been measured with an active probe between VOUT and AGND. No further load impedance between VOUT and AGND has been applied. All input data is latched at the rising edge of the clock. The output voltage remains stable (independent of input data variations) during the HIGH level of the clock (CLK = HIGH). During a LOW-to-HIGH transition of the clock (CLK = LOW), the DAC operates in the transparent mode (input data will be directly transferred to their corresponding analog output voltages (see Fig.5). 5. The data set-up (tSU;DAT) is the minimum period preceding the rising edge of the clock that the input data must be stable in order to be correctly registered. A negative set-up time indicates that the data may be initiated after the rising edge of the clock and still be recognized. The data hold time (tHD;DAT) is the minimum period following the rising edge of the clock that the input data must be stable in order to be correctly registered. A negative hold time indicates that the data may be released prior to the rising edge of the clock and still be recognized. 6. The definition of glitch energy and the measurement set-up are shown in Fig.6. The glitch energy is measured at the input transition between code 127 to 128 and on the falling edge of the clock. 1996 Aug 23 7 Philips Semiconductors Product specification 8-bit video digital-to-analog converter Table 1 TDA8702 Input coding and output voltages (typical values; referenced to VCCA, regardless of the offset voltage) DAC OUTPUT VOLTAGES INPUT DATA (D7 TO D0) CODE ZL = 75 Ω ZL = 10 KΩ VOUT VOUT VOUT VOUT 0 000 00 00 0 −1.6 0 −0.8 1 000 000 01 −0.006 −1.594 −0.003 −0.797 . ........ 128 100 000 00 −0.8 −0.8 −0.4 −0.4 . ........ 254 111 111 10 −1.594 −0.006 −0.797 −0.003 255 111 111 11 −1.6 0 −0.8 0 t SU; DAT handbook, full pagewidth t HD; DAT 3.0 V input data stable 1.3 V 0V 3.0 V CLK 1.3 V 0V MBC912 The shaded areas indicate when the input data may change and be correctly registered. Data input update must be completed within 0.3 ns after the first rising edge of the clock (tSU;DAT is negative; −0.3 ns). Data must be held at least 2 ns after the rising edge (tHD;DAT = +2 ns). Fig.3 Data set-up and hold times. 1996 Aug 23 8 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 handbook, full pagewidth 1.3 V CLK code 255 input data (example of a full-scale input transition) 1.3 V code 0 1 LSB VCCA (code 0) 10 % td 50 % VOUT 90 % VCCA 1.6 V (code 255) 1 LSB t S1 t PD t S2 MBC913 Fig.4 Switching characteristics. handbook, full pagewidth transparent mode CLK latched mode 1.3 V input codes V OUT analog output voltage MBC914 - 1 transparent mode latched mode (stable output) beginning of transparent mode During the transparent mode (CLK = LOW), any change of input data will be seen at the output. During the latched mode (CLK = HIGH), the analog output remains stable regardless of any change at the input. A change of input data during the latched mode will be seen on the falling edge of the clock (beginning of the transparent mode). Fig.5 Latched and transparent mode. 1996 Aug 23 9 Philips Semiconductors Product specification 8-bit video digital-to-analog converter handbook, full pagewidth HP8082A PULSE GENERATOR (SLAVE) f CLK/10 (2) D7 MSB D6 D5 HP8082A PULSE GENERATOR (SLAVE) f CLK/10 D4 (1) D3 D2 TDA8702 VOUT VOUT TDA8702/ TDA8702T TEK P6201 TEK7104 and TEK7A26 DYNAMIC PROBE OSCILLOSCOPE R = 100 kΩ C = 3 pF bandwidth = 20 MHz D1 DIVIDER ( 10) clock D0 (LSB) f CLK f CLK (3) 3 PULSE GENERATOR (MASTER) , ,, ,, ,, ,, 1 MODEL EH107 code 128 VOUT 1 LSB 2 code 127 timing diagram MSA660 time The value of the glitch energy is the sum of the shaded area measured in LSB.ns. Fig.6 Glitch energy measurement. 1996 Aug 23 10 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 INTERNAL PIN CONFIGURATIONS handbook, full pagewidth V CCA V REF output current generators regulation loop REF MBC911 - 1 AGND Fig.7 Reference voltage generator decoupling. handbook, halfpage V CCA handbook, halfpage DGND D0 to D7, CLK AGND substrate MBC908 AGND MBC910 Fig.8 AGND and DGND. 1996 Aug 23 Fig.9 D7 to D0 and CLK. 11 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 handbook, halfpage VCCA 75 Ω 75 Ω VOUT handbook, halfpage VOUT VCCD AGND DGND bit n bit n MBC907 MBC909 - 1 Fig.10 Digital supply. Fig.11 Analog outputs. handbook, halfpage VCCA AGND MBC906 Fig.12 Analog supply. 1996 Aug 23 switches and current generators 12 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 APPLICATION INFORMATION Additional application information will be supplied upon request (please quote number FTV/8901). (1) handbook, halfpage 100 nF REF VCCA VO VOUT AGND VOUT TDA8702/ TDA8702T MSA661 (1) This is a recommended value for decoupling pin 1. Fig.13 Analog output voltage without external load (VO = −VOUT; see Table 1, ZL = 10 kΩ). handbook, full pagewidth 100 nF (1) REF VCCA ZL AGND VO Z L / ( Z L 75 ) VOUT TDA8702/ TDA8702T MSA662 (1) This is a recommended value for decoupling pin 1. Fig.14 Analog output voltage with external load (external load ZL = 75 Ω to ∞). 1996 Aug 23 13 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 (1) handbook, halfpage 100 nF VCCA REF 100 µF VOUT AGND VO 2 75 Ω TDA8702/ TDA8702 AGND MSA663 (1) This is a recommended value for decoupling pin 1. Fig.15 Analog output with AGND as reference. handbook, full pagewidth 10 µH TDA8702 V OUT (pin 15) or V OUT (pin 14) 100 µF 27 pF 390 Ω 12 µH 12 pF 390 Ω 39 pF 100 pF 56 pF Vo [390/(780+75)] MSA665 Fig.16 Example of anti-aliasing filter (analog output referenced to AGND). 1996 Aug 23 14 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 MSA657 0 handbook, halfpage α (dB) 20 40 60 80 100 0 10 20 30 40 f i (MHz) Characteristics Order 5; adapted CHEBYSHEV. Ripple at ≤ 0.1 dB. f(−3 dB) = 6.7 MHz. f(NOTCH) = 9.7 MHz and 13.3 MHz. Fig.17 Frequency response for filter shown in Fig.16. handbook, full pagewidth 100 nF (1) R2 REF 100 µF AGND VOUT R1 R1 VOUT 100 µF TDA8702/ TDA8702T 2 X VO (R2/R1) R2 AGND MSA664 (1) This is a recommended value for decoupling pin 1. Fig.18 Differential mode (improved supply voltage ripple rejection). 1996 Aug 23 15 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.7 0.51 3.7 1.40 1.14 0.53 0.38 0.32 0.23 21.8 21.4 6.48 6.20 2.54 7.62 3.9 3.4 8.25 7.80 9.5 8.3 0.254 2.2 inches 0.19 0.020 0.15 0.055 0.045 0.021 0.015 0.013 0.009 0.86 0.84 0.26 0.24 0.10 0.30 0.15 0.13 0.32 0.31 0.37 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT38-1 050G09 MO-001AE 1996 Aug 23 EIAJ EUROPEAN PROJECTION ISSUE DATE 92-10-02 95-01-19 16 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 D E A X c HE y v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.41 0.40 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT162-1 075E03 MS-013AA 1996 Aug 23 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-01-24 97-05-22 17 Philips Semiconductors Product specification 8-bit video digital-to-analog converter Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C. WAVE SOLDERING This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Wave soldering techniques can be used for all SO packages if the following conditions are observed: • A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. DIP SOLDERING BY DIPPING OR BY WAVE • The longitudinal axis of the package footprint must be parallel to the solder flow. The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. • The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C. REPAIRING SOLDERED JOINTS A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. 1996 Aug 23 TDA8702 18 Philips Semiconductors Product specification 8-bit video digital-to-analog converter TDA8702 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Aug 23 19