INTEGRATED CIRCUITS PCA9556 Octal SMBus and I2C registered interface Product data Supersedes data of 2000 Nov 13 2002 Mar 28 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 The power-on reset puts the registers in their default state and initializes the SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part. The PCA9557 8-bit I2C SMBus I/O port with reset is the higher performance pin-for-pin replacement for the PCA9556. PIN CONFIGURATION SCL 1 SDA FEATURES • SMBus compliance with fixed 3.3V voltage levels • Operating power supply voltage range of 3.0 V – 5.5 V • Active high polarity inverter register • Each I/O is configurable as an input or output • Active low reset pin • Low leakage current on power-down • Noise filter on SCL/SDA inputs • No glitch on power-up • Internal power-on reset • 8 I/O pins which default to 8 inputs • High impedance open drain on I/O0 • ESD protection exceeds 2000 V HBM per JESD22-A114, 2 16 VDD 15 RESET A0 3 14 I/O7 A1 4 13 I/O6 A2 5 12 I/O5 I/O0 6 11 I/O4 I/O1 7 10 I/O3 VSS 8 9 I/O2 su01045 Figure 1. Pin configuration PIN DESCRIPTION PIN NUMBER 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA DESCRIPTION The PCA9556 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus applications. The PCA9556 consists of an 8-bit input port register, 8-bit output port register, and an SMBus interface. It has low current consumption and a high impedance open drain output pin, I/O0. SYMBOL FUNCTION 1 SCL Serial clock line 2 SDA Serial data line 3 A0 Address input 0 4 A1 Address input 1 5 A2 Address input 2 6 I/O0 I/O0 (open drain) 7 I/O1 I/O1 Supply GROUND 8 VSS 9–14 I/O2–I/O7 15 RESET 16 VDD I/O2 to I/O7 External reset (active LOW) Supply voltage The SMBus system master can reset the PCA9556 in the event of a timeout by asserting a LOW on the reset input. The SMBus system master can also invert the PCA9556 inputs by writing to the active HIGH polarity inversion bits. Finally, the system master can enable the PCA9556’s I/Os as either inputs or outputs by writing to the configuration register. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 16-Pin Plastic TSSOP –40 to +85 °C PCA9556PW SOT403-1 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent. I2C is a trademark of Philips Semiconductors Corporation. 2002 Mar 28 2 853-2138 27929 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 BLOCK DIAGRAM A0 A1 I/O0 A2 I/O1 SCL SDA I/O2 INPUT FILTER INPUT/ OUTPUT PORTS 8-BIT SMBus CONTROL I/O3 I/O4 WRITE pulse I/O5 READ pulse I/O6 I/O7 VDD VSS POWER-ON RESET RESET NOTE: ALL I/Os ARE SET TO INPUTS AT RESET SW00793 Figure 2. Block diagram SYSTEM DIAGRAM Input Port VCC= 16 GND = 8 Polarity Inversion Configuration Output Port 1.1 KΩ Q7 Q7 Q7 Q7 I/O0 Q6 Q6 Q6 Q6 I/O1 Q5 Q5 Q5 Q5 I/O2 Q4 Q4 Q4 Q4 I/O3 Q3 Q3 Q3 Q3 I/O4 Q2 Q2 Q2 Q2 I/O5 Q1 Q1 Q1 Q1 I/O6 Q0 Q0 Q0 Q0 I/O7 1.1 KΩ 15 7 RESET 1.6 KΩ 1 SCL 2 SDA 1.6 KΩ 5 A2 4 A1 3 6 A0 or or or 1.1 KΩ 1.1 KΩ 1.1 KΩ I2C/SMBus Interface logic SW00794 Figure 3. System diagram 2002 Mar 28 3 9 10 11 12 13 14 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 REGISTERS Register 2 — Polarity Inversion Register Command Byte Command Protocol Function 0 Read byte 1 Read/write byte Input port register Output port register 2 Read/write byte Polarity inversion register 3 Read/write byte Configuration register I5 I4 I3 I2 I1 N6 N5 N4 N3 N2 N1 N0 1 1 1 1 0 0 0 0 Register 3 — Configuration Register Register 0 — Input Port Register I6 N7 This register enables polarity inversion of pins defined as inputs by register 3. If a bit in this register is set (written with ‘1’), the corresponding port pin’s polarity is inverted. If a bit in this register is cleared (written with a ‘0’), the corresponding port pin’s original polarity is retained. The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read. I7 bit default bit C7 C6 C5 C4 C3 C2 C1 C0 default 1 1 1 1 1 1 1 1 I0 This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. This register is an read-only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by register 3. Writes to this register have no effect. Register 1 — Output Port Register bit O7 O6 O5 O4 O3 O2 O1 O0 default 0 0 0 0 0 0 0 0 RESET Power-on Reset When power is applied to VDD, an internal power-on reset holds the PCA9556 in a reset state until VDD has reached VPOR. At that point, the reset condition is released and the PCA9556 registers and SMBus state machine will initialize to their default states. This register reflects the outgoing logic levels of the pins defined as outputs by register 3. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection, NOT the actual pin value. External Reset A reset can be accomplished by holding the RESET pin low for a minimum of TW. The PCA9556 registers and SMBus/I2C state machine will be held in their default state until the RESET input is once again high. This input typically requires a pull-up to 3.3 V VCC. 2002 Mar 28 4 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 SIMPLIFIED SCHEMATIC OF I/O0 DATA FROM SHIFT REGISTER CONFIGURATION REGISTER DATA FROM SHIFT REGISTER Q D OUTPUT PORT REGISTER DATA FF WRITE CONFIGURATION PULSE CK Q D Q FF I/O0 WRITE PULSE CK Q ESD PROTECTION DIODE OUTPUT PORT REGISTER INPUT PORT REGISTER D Q VSS INPUT PORT REGISTER DATA FF READ PULSE CK DATA FROM SHIFT REGISTER D Q Q POLARITY REGISTER DATA FF WRITE POLARITY PULSE CK Q POLARITY INVERSION REGISTER SW00795 NOTE: On power–up or reset, all registers return to default values. Figure 4. Simplified schematic of I/O0 2002 Mar 28 5 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 SIMPLIFIED SCHEMATIC OF I/O1 TO I/O7 DATA FROM SHIFT REGISTER OUTPUT PORT REGISTER DATA CONFIGURATION REGISTER DATA FROM SHIFT REGISTER VDD Q D ESD PROTECTION DIODE FF WRITE CONFIGURATION PULSE CK Q D Q FF I/O0 TO I/O15 WRITE PULSE CK Q ESD PROTECTION DIODE OUTPUT PORT REGISTER INPUT PORT REGISTER D Q VSS INPUT PORT REGISTER DATA FF Q CK READ PULSE DATA FROM SHIFT REGISTER D Q POLARITY REGISTER DATA FF WRITE POLARITY PULSE CK Q POLARITY INVERSION REGISTER NOTE: On power–up or reset, all registers return to default values. Figure 5. Simplified schematic of I/O1 to I/O7 2002 Mar 28 6 SW00796 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 SMBus Address slave address 0 0 1 1 fixed A2 A1 A0 R/W programmable su01048 Figure 6. PCA9556 address SMBus Transactions Data is transmitted to the PCA9556 registers using Write Byte transfers (see Figures 7 and 8). Data is read from the PCA9556 registers using Read and Receive Byte transfers (see FIgures 9 and 10). 1 SCL 2 3 4 5 6 7 8 9 command byte slave address SDA S 0 0 1 1 A2 A1 A0 start condition 0 R/W A 0 0 0 0 0 data to port 0 0 1 acknowledge from slave DATA 1 A A acknowledge from slave P acknowledge from slave WRITE TO PORT DATA OUT FROM PORT DATA 1 VALID tpv SW00797 Figure 7. WRITE to output port register via Write Byte Protocol 1 SCL 2 3 4 5 6 7 8 9 command byte slave address SDA S 0 0 start condition 1 1 A2 A1 A0 0 R/W A 0 0 0 0 0 acknowledge from slave data to register 0 1 1/0 A DATA acknowledge from slave A P acknowledge from slave SW00798 Figure 8. WRITE to I/O configuration or polarity inversion registers via Write Byte Protocol 2002 Mar 28 7 Philips Semiconductors Product data Octal SMBus and I2C registered interface acknowledge from slave slave address S 0 0 1 1 A2 A1 A0 0 PCA9556 acknowledge from slave COMMAND BYTE A A S acknowledge from slave slave address 0 0 1 1 A2 A1 A0 R/W 1 acknowledge from master data from register DATA A A first byte R/W at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter data from register no acknowledge from master NA DATA P last byte su01052 Figure 9. READ from register via Read byte protocol slave address SDA S 0 0 start condition 1 1 A2 data from port A1 A0 1 R/W data from port DATA 1 A A acknowledge from slave DATA 4 acknowledge from master NA no acknowledge from master P stop condition READ FROM PORT DATA INTO PORT DATA 2 DATA 3 tph DATA 4 tps SW00799 NOTES: 1. This figure assumes the command byte has previously been programmed with 00h. 2. Transfer of data can be stopped at any moment by a stop condition. When this occurs, data present at the last acknowledge phase is valid (output mode). Input data is lost. Figure 10. READ input port register via Receive byte protocol 2002 Mar 28 8 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134). PARAMETER SYMBOL VDD CONDITIONS Supply voltage VI Input voltage II DC input current MIN MAX UNIT –0.5 +6 V VSS – 0.5 VDD + 0.5 V — ± 20 mA VI/O DC voltage on an I/O as an input other than I/O0 VSS – 0.5 VDD + 0.5 V VI/O0 DC voltage on I/O0 as an input VSS – 0.5 4.6 V — +400 II/O0 /O DC input current on I/O0 µA — –20 mA II/O DC output current on an I/O — ± 20 mA Ptot Total power dissipation — — mW PO Power dissipation per output — — mW Tstg Storage temperature range –65 +150 °C Tamb Operating ambient temperature –40 +85 °C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”. 2002 Mar 28 9 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 DC CHARACTERISTICS VDD = 3.0 to 5.5 V; VSS = 0 V; Tamb = –40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS VDD = 3.3 V VDD = 5 V UNIT MIN TYP MAX MIN TYP MAX 3.0 — 3.6 4.5 — 5.5 V Supplies VDD Supply voltage IDD Supply current Operating mode; no load; VI = VDD or VSS; fSCL = 100 kHz — 300 425 — 1100 1500 µA Istb Standby current Standby mode; no load; VI = VDD or VSS; fSCL = 0 kHz — 25 50 – 65 100 µA Power-on reset voltage VDD = 3.3 V; no load; VI = VDD or VSS; note 1 — 1.3 2.4 – 1.3 2.4 V –0.5 — 0.8 –0.5 — 0.8 V VPOR Input SCL; input/output SDA VIL LOW level input voltage VIH HIGH level input voltage 2.1 — 5.5 2.1 — 5.5 V IOL LOW level output current VOL = 0.4 V 3 — — 3 — — mA IL Leakage current VI = VDD = VSS –1 — +1 –1 — +1 µA CI Input capacitance VI = VSS — — 10 — — 10 pF I/Os VIL LOW level input voltage –0.5 — 0.8 –0.5 — 0.8 V VIH HIGH level input voltage 2.0 — VDD + 0.5 2.0 — VDD + 0.5 V IIHL(max) IOL Maximum allowed input current through protection diode (I/O1 – I/O7) VI ≥ VDD or VI ≤ VSS — — ±400 — — ±400 µA LOW level output current VOL = 0.55 V; VDD = 3.3 V; note 2 8 10 — 8 10 — mA HIGH level output current except I/O0 VOH = 2.4 V; VDD = 3.3 V; note 3 4 — — 4 — — mA VDD = 3.6 V; VOH = 4.6 V — — 1 — — 1 VDD = 0 V; VOH = 3.3 V — — 1 — — 1 VDD = 3.6 V; VI = 0 or VDD –1 — 1 –1 — 1 µA IOH HIGH level output current on I/O0 µA IL Input leakage current CI Input capacitance — — 10 — — 10 pF CO Output capacitance — — 10 — — 10 pF Select Inputs A0, A1, A2, and RESET VIL LOW level input voltage –0.5 — 0.8 –0.5 — 0.8 V VIH HIGH level input voltage 2.0 — VDD + 0.5 2.0 — VDD + 0.5 V –1 — 1 µA ILI Input leakage current –1 — 1 NOTES: 1. The power-on reset circuit resets the SMBus logic with VDD < VPOR and sets all I/Os to their default values. 2. The maximum total sink current must be limited to 54 mA at +85 °C, and 80 mA at +70 °C. 3. The maximum total source current must be limited to 54 mA at +85 °C, and 80 mA at +70 °C. 2002 Mar 28 10 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 AC SPECIFICATIONS SYMBOL LIMITS PARAMETER MIN MAX UNITS fSBM SMB operating frequency 10 100 KHz tBUF Bus free time between stop and start conditions 4.7 — µs tHO:STA Hold time after (repeated) start condition 4.0 — µs tSU:STA Repeated start condition setup time 4.7 — µs tHO:DAT Data hold time 300 — ns tSU:DAT Data setup time 250 — ns tLOW Clock LOW period 4.7 — µs tHIGH Clock HIGH period 4.0 — µs tF Clock/Data fall time — 300 ns tR Clock/Data rise time — 1000 ns tPV Output data valid — 4 µs tPS Input data setup time 0 — µs tPH Input data hold time 4 — µs Reset pulse width 2 — ns Port Timing Reset tW 2002 Mar 28 11 Philips Semiconductors Product data Octal SMBus and I2C registered interface TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 2002 Mar 28 12 PCA9556 SOT403-1 Philips Semiconductors Product data Octal SMBus and I2C registered interface PCA9556 Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Data sheet status [1] Product status [2] Definitions Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 03-02 For sales offices addresses send e-mail to: [email protected]. Document order number: 2002 Mar 28 13 9397 750 09609