PHILIPS HEF4543BT

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4543B
MSI
BCD to 7-segment
latch/decoder/driver
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
Product specification
HEF4543B
MSI
BCD to 7-segment latch/decoder/driver
The circuit provides the function of a 4-bit storage latch
and an 8-4-2-1 BCD to 7-segment decoder/driver. It can
invert the logic levels of the output combination. The phase
(PH), blanking (BI) and latch disable (LD) inputs are used
to reverse the function table phase, blank the display and
store a BCD code, respectively.
DESCRIPTION
The HEF4543B is a BCD to 7-segment
latch/decoder/driver for liquid crystal and LED displays. It
has four address inputs (DA to DD), an active HIGH latch
disable input (LD), an active HIGH blanking input (BI), an
active HIGH phase input (PH) and seven buffered
segment outputs (Oa to Og).
For liquid crystal displays a square-wave is applied to PH
and the electrical common back-plane of the display. The
outputs of the device are directly connected to the
segments of the liquid crystal.
Fig.2 Pinning diagram.
Fig.1 Functional diagram.
HEF4543BP(N):
16-lead DIL; plastic (SOT38-1)
HEF4543BD(F):
16-lead DIL; ceramic (cerdip) ( SOT74)
HEF4543BT(D):
16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
PINNING
DA to DD
address (data) inputs
PH
phase input (active HIGH)
BI
blanking input (active HIGH)
LD
latch disable input (active HIGH)
Oa to Og
segment outputs
Fig.3 Segment designation.
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
January 1995
2
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Philips Semiconductors
3
BCD to 7-segment latch/decoder/driver
January 1995
Product specification
HEF4543B
MSI
Fig.4 Logic diagram.
Philips Semiconductors
Product specification
HEF4543B
MSI
BCD to 7-segment latch/decoder/driver
FUNCTION TABLE
INPUTS
LD
BI
PH
X
H
H
L
(4)
OUTPUTS
DD
DC
DB
DA
Oa
Ob
Oc
Od
Oe
Of
Og
DISPLAY
L
X
X
X
X
L
L
L
L
L
L
L
blank
L
L
L
L
L
H
H
H
H
H
H
L
0
H
L
L
L
L
L
H
L
H
H
L
L
L
L
1
H
L
L
L
L
H
L
H
H
L
H
H
L
H
2
H
L
L
L
L
H
H
H
H
H
H
L
L
H
3
H
L
L
L
H
L
L
L
H
H
L
L
H
H
4
H
L
L
L
H
L
H
H
L
H
H
L
H
H
5
H
L
L
L
H
H
L
H
L
H
H
H
H
H
6
H
L
L
L
H
H
H
H
H
H
L
L
L
L
7
H
L
L
H
L
L
L
H
H
H
H
H
H
H
8
H
L
L
H
L
L
H
H
H
H
H
L
H
H
9
H
L
L
H
L
H
L
L
L
L
L
L
L
L
blank
H
L
L
H
L
H
H
L
L
L
L
L
L
L
blank
H
L
L
H
H
L
L
L
L
L
L
L
L
L
blank
H
L
L
H
H
L
H
L
L
L
L
L
L
L
blank
H
L
L
H
H
H
L
L
L
L
L
L
L
L
blank
H
L
L
H
H
H
H
L
L
L
L
L
L
L
blank
L
L
L
as above
H
X
X
X
X
as above
Notes
1. H = HIGH state (the more positive voltage)
2. L = LOW state (the less positive voltage)
3. X = state is immaterial
4. For liquid crystal displays, apply a square-wave to PH.
For common cathode LED displays, select PH = LOW.
For common anode LED displays, select PH = HIGH.
5. Depends upon the BCD-code previously applied when LD = HIGH.
Fig.5 Display.
January 1995
4
(5)
(5)
inverse of above
as above
Philips Semiconductors
Product specification
HEF4543B
MSI
BCD to 7-segment latch/decoder/driver
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
MIN.
TYP.
TYPICAL EXTRAPOLATION
FORMULA
MAX.
Propagation delays
Dn → On
HIGH to LOW
180
360
ns
153 ns + (0,55 ns/pF) CL
75
150
ns
64 ns + (0,23 ns/pF) CL
55
110
ns
47 ns + (0,16 ns/pF) CL
180
360
ns
153 ns + (0,55 ns/pF) CL
75
150
ns
64 ns + (0,23 ns/pF) CL
55
110
ns
47 ns + (0,16 ns/pF) CL
170
340
ns
143 ns + (0,55 ns/pF) CL
80
160
ns
69 ns + (0,23 ns/pF) CL
60
120
ns
52 ns + (0,16 ns/pF) CL
190
380
ns
163 ns + (0,55 ns/pF) CL
80
160
ns
69 ns + (0,23 ns/pF) CL
60
120
ns
52 ns + (0,16 ns/pF) CL
145
290
ns
118 ns + (0,55 ns/pF) CL
65
130
ns
54 ns + (0,23 ns/pF) CL
15
45
90
ns
37 ns + (0,16 ns/pF) CL
5
125
250
ns
98 ns + (0,55 ns/pF) CL
5
10
tPHL
15
5
LOW to HIGH
10
tPLH
15
LD → On
HIGH to LOW
5
10
tPHL
15
5
LOW to HIGH
10
tPLH
15
BI → On
HIGH to LOW
LOW to HIGH
Output transition times
HIGH to LOW
LOW to HIGH
5
10
tPHL
55
110
ns
54 ns + (0,23 ns/pF) CL
15
40
80
ns
32 ns + (0,16 ns/pF) CL
5
60
120
ns
10 ns +
10
tPLH
30
60
ns
9 ns + (0,42 ns/pF) CL
15
20
40
ns
6 ns + (0,28 ns/pF) CL
5
60
120
ns
30
60
ns
9 ns + (0,42 ns/pF) CL
20
40
ns
6 ns + (0,28 ns/pF) CL
10
10
tTHL
tTLH
15
Minimum LD
pulse width; HIGH
5
10
tWLDH
60
30
ns
30
15
ns
15
20
10
ns
Set-up time
5
40
20
ns
Dn → LD
10
Hold time
Dn → LD
20
5
ns
15
15
0
ns
5
0
−15
ns
15
0
ns
20
5
ns
10
15
January 1995
(1,0 ns/pF) CL
tsu
thold
5
10 ns +
(1,0 ns/pF) CL
Philips Semiconductors
Product specification
HEF4543B
MSI
BCD to 7-segment latch/decoder/driver
VDD
V
Dynamic power
5
TYPICAL FORMULA FOR P (µW)
2 200 fi + ∑ (foCL) × VDD2
dissipation per
10
10 400 fi + ∑ (foCL) ×
package (P)
15
33 000 fi + ∑ (foCL) ×
VDD2
VDD2
where
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
APPLICATION INFORMATION
Some examples of applications for the HEF4543B are:
• Driving LCD displays.
• Driving LED displays.
• Driving fluorescent displays.
• Driving incandescent displays.
• Driving gas discharge displays.
Fig.6 Connection to common cathode LED display readout.
January 1995
6
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
Fig.7 Connection to common anode LED display readout.
Note to Figs 6 and 7: bipolar transistors may be added for gain where VDD ≤ 10 V or Iout ≥ 10 mA.
Fig.8 Connection to liquid crystal (LCD) display readout.
January 1995
7
HEF4543B
MSI
Philips Semiconductors
Product specification
BCD to 7-segment latch/decoder/driver
Fig.9 Connection to incandescent display readout.
Fig.10 Connection to gas discharge display readout.
Fig.11 Connection to fluorescent display readout.
January 1995
8
HEF4543B
MSI
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