High Voltage, Latch-Up Proof, 4-/8-Channel Multiplexers ADG5208-EP/ADG5209-EP Enhanced Product FEATURES FUNCTIONAL BLOCK DIAGRAM S1A S1 DA S4A D S1B DB S4B S8 1-OF-4 DECODER 1-OF-8 DECODER A0 A1 A2 EN A0 A1 EN Figure 1. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked. The ADG5208-EP/ADG5209-EP do not have VL pins; instead, the logic power supply is generated internally by an on-chip voltage generator. APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems Additional application and technical information can be found in the ADG5208/ADG5209 data sheet. PRODUCT HIGHLIGHTS 1. GENERAL DESCRIPTION The ADG5208-EP/ADG5209-EP are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG5208-EP switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG5209-EP switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1. An EN input on both devices enables or disables the device. When EN is disabled, all channels switch off. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make these devices suitable for video signal switching. Rev. B ADG5209-EP ADG5208-EP 11475-001 Latch-up proof 2.9 pF off source capacitance 34 pF off drain capacitance 0.2 pC charge injection Low on resistance: 160 Ω typical ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation 48 V supply maximum ratings Fully specified at ±15 V, ±20 V, +12 V, and +36 V VSS to VDD analog signal range Human body model (HBM) ESD rating 8 kV I/O port to supplies 2 kV I/O port to I/O port 8 kV all other pins Supports defense and aerospace applications (AQEC standard) Military temperature range: –55°C to +125°C Controlled manufacturing baseline One assembly and test site One fabrication site Enhanced product change notification Qualification data available on request 2. 3. 4. 5. 6. Trench Isolation Guards Against Latch-Up. A dielectric trench separates the P and N channel transistors to prevent latch-up even under severe overvoltage conditions. 0.2 pC Charge Injection. Dual-Supply Operation. For applications where the analog signal is bipolar, the ADG5208-EP/ADG5209-EP can be operated from dual supplies of up to ±22 V. Single-Supply Operation. For applications where the analog signal is unipolar, the ADG5208-EP/ADG5209-EP can be operated from a single rail power supply of up to 40 V. 3 V Logic-Compatible Digital Inputs. VINH = 2.0 V, VINL = 0.8 V. No VL Logic Power Supply Required. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADG5208-EP/ADG5209-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 36 V Single Supply.........................................................................6 Applications ....................................................................................... 1 Continuous Current per Channel, Sx, D, or Dx ........................8 General Description ......................................................................... 1 Absolute Maximum Ratings ............................................................9 Functional Block Diagram .............................................................. 1 ESD Caution...................................................................................9 Product Highlights ........................................................................... 1 Pin Configurations and Function Descriptions ......................... 10 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 12 Specifications..................................................................................... 3 Test Circuits ..................................................................................... 16 ±15 V Dual Supply ....................................................................... 3 Outline Dimensions ....................................................................... 19 ±20 V Dual Supply ....................................................................... 4 Ordering Guide .......................................................................... 19 12 V Single Supply ........................................................................ 5 REVISION HISTORY 8/14—Rev. A to Rev. B Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Changes to Table 3 ............................................................................ 5 Changes to Table 4 ............................................................................ 6 Changes to Figure 4 to Figure 9 .................................................... 12 Changes to Figure 10 and Figure 11 ............................................. 13 Changes to Figure 16 to Figure 21 ................................................ 14 Changes to Figure 22 to Figure 24 ................................................ 15 10/13—Rev. 0 to Rev. A Change to Operating Temperature Range, Table 7 ...................... 9 Change to Ordering Guide ............................................................ 19 7/13—Revision 0: Initial Version Rev. B | Page 2 of 20 Enhanced Product ADG5208-EP/ADG5209-EP SPECIFICATIONS ±15 V DUAL SUPPLY VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) 25°C 160 200 3.5 8 40 50 ±0.005 ±0.1 ±0.005 ±0.1 ±0.01 ±0.2 −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments VDD to VSS V Ω typ Ω max Ω typ VS = ±10 V, IS = −1 mA; see Figure 26 VDD = +13.5 V, VSS = −13.5 V VS = ±10 V, IS = −1 mA 250 280 9 10 65 70 ±0.2 ±0.4 ±0.4 ±1.4 ±0.5 ±1.4 Ω max Ω typ Ω max nA typ nA max nA typ nA max nA typ nA max VS = ±10 V, IS = −1 mA VDD = +16.5 V, VSS = −16.5 V VS = ±10 V, VD = 10 V; see Figure 28 VS = ±10 V, VD = 10 V; see Figure 28 VS = VD = ±10 V; see Figure 25 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 2.0 0.8 0.002 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 3 VIN = VGND or VDD Charge Injection, QINJ 0.2 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation −86 dB typ Channel-to-Channel Crosstalk −80 dB typ −3 dB Bandwidth ADG5208-EP ADG5209-EP Insertion Loss 110 240 −6.4 MHz typ MHz typ dB typ 2.9 pF typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 30 VS = 0 V, f = 1 MHz 34 17 pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD 150 180 125 150 160 185 55 V min V max µA typ µA max pF typ 210 245 185 215 210 230 20 CS (Off ) CD (Off ) ADG5208-EP ADG5209-EP Rev. B | Page 3 of 20 RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 10 V; see Figure 32 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 34 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 RL = 50 Ω, CL = 5 pF; see Figure 30 ADG5208-EP/ADG5209-EP Parameter CD (On), CS (On) ADG5208-EP ADG5209-EP POWER REQUIREMENTS IDD ISS 25°C Enhanced Product −40°C to +85°C 37 21 45 55 0.001 80 1 ±9/±22 VDD/VSS 1 −55°C to +125°C Unit Test Conditions/Comments pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +16.5 V, VSS = −16.5 V Digital inputs = 0 V or VDD µA typ µA max µA typ µA max V min/V max Digital inputs = 0 V or VDD GND = 0 V Guaranteed by design; not subject to production test. ±20 V DUAL SUPPLY VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C 140 160 3.5 8 34 45 ±0.005 ±0.1 ±0.005 ±0.1 ±0.01 ±0.2 −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments VDD to VSS V Ω typ Ω max Ω typ VS = ±15 V, IS = −1 mA; see Figure 26 VDD = +18 V, VSS = −18 V VS = ±15 V, IS = −1 mA 200 230 9 10 55 60 ±0.2 ±0.4 ±0.4 ±1.4 ±0.5 ±1.4 2.0 0.8 0.002 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 3 nA typ nA max nA typ nA max nA typ nA max V min V max µA typ µA max pF typ Charge Injection, QINJ 0.4 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation −86 dB typ Channel-to-Channel Crosstalk −80 dB typ tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD 140 170 120 140 160 185 45 Ω max Ω typ Ω max 195 220 170 195 205 220 20 Rev. B | Page 4 of 20 VS = ±15 V, IS = −1 mA VDD = +22 V, VSS = −22 V VS = ±15 V, VD = 15 V; see Figure 28 VS = ±15 V, VD = 15 V; see Figure 28 VS = VD = ±15 V; see Figure 25 VIN = VGND or VDD RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS = 10 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 10 V; see Figure 32 VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 34 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 Enhanced Product ADG5208-EP/ADG5209-EP Parameter −3 dB Bandwidth ADG5208-EP ADG5209-EP Insertion Loss 25°C 121 225 −5.6 MHz typ MHz typ dB typ CS (Off ) CD (Off ) ADG5208-EP ADG5209-EP CD (On), CS (On) ADG5208-EP ADG5209-EP POWER REQUIREMENTS IDD 2.8 pF typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 30 VS = 0 V, f = 1 MHz 33 17 pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz 36 21 pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +22 V, VSS = −22 V Digital inputs = 0 V or VDD ISS −40°C to +85°C 50 70 0.001 Unit 1 ±9/±22 µA typ µA max µA typ µA max V min/V max −55°C to +125°C Unit 0 V to VDD V Ω typ 120 VDD/VSS 1 −55°C to +125°C Test Conditions/Comments RL = 50 Ω, CL = 5 pF; see Figure 30 Digital inputs = 0 V or VDD GND = 0 V Guaranteed by design; not subject to production test. 12 V SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON On-Resistance Flatness, RFLAT (ON) 25°C −40°C to +85°C 350 610 700 Ω max Ω typ 20 160 280 22 24 VS = 0 V to 10 V, IS = −1 mA 335 370 Ω max Ω typ Ω max nA typ VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 28 ±0.005 ±0.1 ±0.005 ±0.2 Drain Off Leakage, ID (Off ) ±0.1 ±0.01 ±0.2 ±0.4 ±1.4 ±0.5 ±1.4 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH ±0.4 2.0 0.8 0.002 ±0.1 Digital Input Capacitance, CIN VS = 0 V to 10 V, IS = −1 mA; see Figure 26 VDD = 10.8 V, VSS = 0 V VS = 0 V to 10 V, IS = −1 mA 500 5 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID (On), IS (On) Test Conditions/Comments 3 Rev. B | Page 5 of 20 nA max nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 28 nA max nA typ nA max VS = VD = 1 V/10 V; see Figure 25 V min V max µA typ µA max pF typ VIN = VGND or VDD ADG5208-EP/ADG5209-EP Parameter DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 25°C Enhanced Product −40°C to +85°C −55°C to +125°C 295 335 280 320 225 245 Test Conditions/Comments RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS = 8 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 8 V; see Figure 32 VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 34 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 RL = 50 Ω, CL = 5 pF; see Figure 30 Break-Before-Make Time Delay, tD 200 250 180 225 165 200 95 Charge Injection, QINJ 0.2 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation −86 dB typ Channel-to-Channel Crosstalk −80 dB typ −3 dB Bandwidth ADG5208-EP ADG5209-EP Insertion Loss 95 180 −8.9 MHz typ MHz typ dB typ 3.3 pF typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 30 VS = 6 V, f = 1 MHz 38 19 pF typ pF typ VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz 41 24 pF typ pF typ VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VDD = 13.2 V Digital inputs = 0 V or VDD tON (EN) tOFF (EN) 45 CS (Off ) CD (Off ) ADG5208-EP ADG5209-EP CD (On), CS (On) ADG5208-EP ADG5209-EP POWER REQUIREMENTS IDD 40 50 VDD 1 Unit 75 9/40 µA typ µA max V min/V max −55°C to +125°C Unit 0 V to VDD V Ω typ GND = 0 V, VSS = 0 V Guaranteed by design; not subject to production test. 36 V SINGLE SUPPLY VDD = 36 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 4. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) 25°C −40°C to +85°C 150 Test Conditions/Comments VS = 0 V to 30 V, IS = −1 mA; see Figure 26 VDD = 32.4 V, VSS = 0 V VS = 0 V to 30 V, IS = −1 mA 170 3.5 215 245 Ω max Ω typ 8 35 55 9 10 VS = 0 V to 30 V, IS = −1 mA 65 70 Ω max Ω typ Ω max nA typ VDD = 39.6 V, VSS = 0 V VS = 1 V/30 V, VD = 30 V/1 V; see Figure 28 ±0.005 ±0.1 ±0.2 ±0.4 Rev. B | Page 6 of 20 nA max Enhanced Product Parameter Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH ADG5208-EP/ADG5209-EP 25°C ±0.005 −40°C to +85°C −55°C to +125°C Unit nA typ ±0.1 ±0.01 ±0.2 ±0.4 ±1.4 VS = VD = 1 V/30 V; see Figure 25 ±0.5 ±1.4 nA max nA typ nA max V min V max µA typ µA max pF typ VIN = VGND or VDD 2.0 0.8 0.002 ±0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 3 Break-Before-Make Time Delay, tD 170 205 150 180 180 225 55 Charge Injection, QINJ 0.3 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation −86 dB typ Channel-to-Channel Crosstalk −80 dB typ −3 dB Bandwidth ADG5208-EP ADG5209-EP Insertion Loss 105 195 −6.2 MHz typ MHz typ dB typ 2.7 pF typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 30 VS = 18 V, f = 1 MHz 32 16 pF typ pF typ VS = 18 V, f = 1 MHz VS = 18 V, f = 1 MHz 35 20 pF typ pF typ VS = 18 V, f = 1 MHz VS = 18 V, f = 1 MHz VDD = 39.6 V Digital inputs = 0 V or VDD tON (EN) tOFF (EN) 225 235 195 215 225 230 20 CS (Off ) CD (Off ) ADG5208-EP ADG5209-EP CD (On), CS (On) ADG5208-EP ADG5209-EP POWER REQUIREMENTS IDD 80 100 VDD 1 Test Conditions/Comments VS = 1 V/30 V, VD = 30 V/1 V; see Figure 28 155 9/40 Guaranteed by design; not subject to production test. Rev. B | Page 7 of 20 µA typ µA max V min/V max RL = 300 Ω, CL = 35 pF VS = 18 V; see Figure 31 RL = 300 Ω, CL = 35 pF VS = 18 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS = 18 V; see Figure 33 RL = 300 Ω, CL = 35 pF VS1 = VS2 = 18 V; see Figure 32 VS = 18 V, RS = 0 Ω, CL = 1 nF; see Figure 34 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 29 RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 RL = 50 Ω, CL = 5 pF; see Figure 30 GND = 0 V, VSS = 0 V ADG5208-EP/ADG5209-EP Enhanced Product CONTINUOUS CURRENT PER CHANNEL, Sx, D, OR Dx Table 5. ADG5208-EP Parameter CONTINUOUS CURRENT, Sx OR D VDD = +15 V, VSS = −15 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) VDD = +20 V, VSS = −20 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) VDD = 12 V, VSS = 0 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) VDD = 36 V, VSS = 0 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) 25°C 85°C 125°C Unit 40 69 24 37 14.5 18 mA maximum mA maximum 42 75 26.5 40 14.5 18 mA maximum mA maximum 28 40 19 25 12 14.5 mA maximum mA maximum 40 72 26 39 14.5 18 mA maximum mA maximum 25°C 85°C 125°C Unit 29 51 19 30 12 16 mA maximum mA maximum 30 55 20 32 12.5 17 mA maximum mA maximum 20 29 14 20 10 12.5 mA maximum mA maximum 30 54 20 31 12.5 17 mA maximum mA maximum Table 6. ADG5209-EP Parameter CONTINUOUS CURRENT, Sx OR Dx VDD = +15 V, VSS = −15 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) VDD = +20 V, VSS = −20 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) VDD = 12 V, VSS = 0 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) VDD = 36 V, VSS = 0 V TSSOP (θJA = 112.6°C/W) LFCSP (θJA = 30.4°C/W) Rev. B | Page 8 of 20 Enhanced Product ADG5208-EP/ADG5209-EP ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 7. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs1 Digital Inputs1 Peak Current, Sx, D, or Dx Pins ADG5208-EP ADG5209-EP Continuous Current, Sx, D, or Dx Pins2 Temperature Range Operating Storage Junction Temperature Thermal Impedance, θJA 16-Lead TSSOP (4-Layer Board) 16-Lead LFCSP (4-Layer Board) Reflow Soldering Peak Temperature, Pb Free HBM ESD I/O Port to Supplies I/O Port to I/O Port All Other Pins 1 2 Rating 48 V −0.3 V to +48 V +0.3 V to −48 V VSS − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first VSS − 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 126 mA (pulsed at 1 ms, 10% duty cycle maximum) 92 mA (pulsed at 1 ms, 10% duty cycle maximum) Data + 15% Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating can be applied at any one time. ESD CAUTION −55°C to +125°C −65°C to +150°C 150°C 112.6°C/W 30.4°C/W 260(+0/−5)°C 8 kV 2 kV 8 kV Overvoltages at the Ax, EN, Sx, D, and Dx pins are clamped by internal diodes. Limit current to the maximum ratings given. See Table 5 and Table 6. Rev. B | Page 9 of 20 ADG5208-EP/ADG5209-EP Enhanced Product A0 1 16 A1 EN 2 15 A2 VSS 3 ADG5208-EP 14 GND TOP VIEW (Not to Scale) 13 VDD 12 S5 S3 6 11 S6 S4 7 10 S7 D 8 9 S8 S1 4 S2 5 11475-002 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 2. ADG5208-EP Pin Configuration (TSSOP) Table 8. ADG5208-EP Pin Function Descriptions Pin No. 1 2 Mnemonic A0 EN 3 VSS 4 5 6 7 8 9 10 11 12 13 14 15 16 S1 S2 S3 S4 D S8 S7 S6 S5 VDD GND A2 A1 Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, the Ax logic inputs determine the on switches. Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. Source Terminal 1. This pin can be an input or an output. Source Terminal 2. This pin can be an input or an output. Source Terminal 3. This pin can be an input or an output. Source Terminal 4. This pin can be an input or an output. Drain Terminal. This pin can be an input or an output. Source Terminal 8. This pin can be an input or an output. Source Terminal 7. This pin can be an input or an output. Source Terminal 6. This pin can be an input or an output. Source Terminal 5. This pin can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Logic Control Input. Table 9. ADG5208-EP Truth Table A2 X1 0 0 0 0 1 1 1 1 1 A1 X1 0 0 1 1 0 0 1 1 A0 X1 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 X is don’t care. Rev. B | Page 10 of 20 On Switch None 1 2 3 4 5 6 7 8 ADG5208-EP/ADG5209-EP A0 1 16 A1 EN 2 15 GND ADG5209-EP 14 VDD TOP VIEW (Not to Scale) 13 S1B 12 S2B VSS 3 S1A 4 S2A 5 S3A 6 11 S3B S4A 7 10 S4B DA 8 9 DB 11475-004 Enhanced Product Figure 3. ADG5209-EP Pin Configuration (TSSOP) Table 10. ADG5209-EP Pin Function Descriptions Pin No. 1 2 Mnemonic A0 EN 3 VSS 4 5 6 7 8 9 10 11 12 13 14 15 16 S1A S2A S3A S4A DA DB S4B S3B S2B S1B VDD GND A1 Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine the on switches. Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. Source Terminal 1A. This pin can be an input or an output. Source Terminal 2A. This pin can be an input or an output. Source Terminal 3A. This pin can be an input or an output. Source Terminal 4A. This pin can be an input or an output. Drain Terminal A. This pin can be an input or an output. Drain Terminal B. This pin can be an input or an output. Source Terminal 4B. This pin can be an input or an output. Source Terminal 3B. This pin can be an input or an output. Source Terminal 2B. This pin can be an input or an output. Source Terminal 1B. This pin can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Table 11. ADG5209-EP Truth Table A1 X1 0 0 1 1 1 A0 X1 0 1 0 1 EN 0 1 1 1 1 On Switch Pair None 1 2 3 4 X is don’t care. Rev. B | Page 11 of 20 ADG5208-EP/ADG5209-EP Enhanced Product TYPICAL PERFORMANCE CHARACTERISTICS 160 TA = 25°C TA = +25°C VDD = +18V VSS = –18V 140 VDD = +20V VSS = –20V 100 80 VDD = +22V VSS = –22V 60 100 80 40 20 20 –15 –10 –5 0 5 10 15 20 25 VS, VD (V) 0 11475-006 –20 0 VDD = +9V VSS = –9V 20 25 30 35 40 VDD = +15V VSS = –15V 150 100 VDD = +13.5V VSS = –13.5V VDD = +16.5V VSS = –16.5V VDD = +15V VSS = –15V TA = +125°C 150 TA = +85°C TA = +25°C 100 TA = –40°C TA = –55°C 50 50 –15 –10 –5 0 5 10 15 20 VS, VD (V) 0 –15 11475-007 0 –20 –10 –5 0 5 10 15 VS, VD (V) 11475-008 ON RESISTANCE (Ω) Figure 8. RON as a Function of VS, VD for Different Temperatures, ±15 V Dual Supply Figure 5. RON as a Function of VS, VD (±15 V Dual Supply) 200 450 TA = 25°C VDD = +20V VSS = –20V VDD = 9V VSS = 0V 400 VDD = 10.8V VSS = 0V 150 ON RESISTANCE (Ω) 350 300 250 200 VDD = 12V VSS = 0V 150 VDD = 13.2V VSS = 0V TA = +125°C TA = +85°C 100 TA = +25°C TA = –40°C TA = –55°C 50 100 0 0 2 4 6 8 10 12 VS, VD (V) 14 11475-005 50 0 –20 –15 –10 –5 0 5 10 15 20 VS, VD (V) Figure 9. RON as a Function of VS, VD for Different Temperatures, ±20 V Dual Supply Figure 6. RON as a Function of VS, VD (12 V Single Supply) Rev. B | Page 12 of 20 11475-100 ON RESISTANCE (Ω) 15 200 200 ON RESISTANCE (Ω) 10 Figure 7. RON as a Function of VS, VD (36 V Single Supply) 250 TA = 25°C 5 VS, VD (V) Figure 4. RON as a Function of VS, VD (±20 V Dual Supply) 250 VDD = 39.6V VSS = 0V VDD = 36V VSS = 0V 60 40 0 –25 VDD = 32.4V VSS = 0V 120 ON RESISTANCE (Ω) 120 ON RESISTANCE (Ω) 140 11475-009 160 Enhanced Product 100 VDD = 12V VSS = 0V 450 IS (OFF) + – 50 LEAKAGE CURRENT (pA) ON RESISTANCE (Ω) 400 TA = +125°C 350 300 TA = +85°C 250 TA = +25°C 200 TA = –40°C 150 TA = –55°C ID (OFF) – + 0 IS (OFF) – + –50 –100 ID, IS (ON) + + ID, IS (ON) – – 100 –150 VDD = +20V VSS = –20V VBIAS = +15V/–15V 50 2 4 6 8 10 12 VS, VD (V) –200 11475-010 0 0 ID (OFF) + – 0 25 50 75 100 125 TEMPERATURE (°C) 11475-015 500 ADG5208-EP/ADG5209-EP Figure 13. Leakage Currents vs. Temperature, ±20 V Dual Supply Figure 10. RON as a Function of VS, VD for Different Temperatures, 12 V Single Supply 100 200 ID (OFF) – + IS (OFF) – + 0 TA = +25°C 100 TA = –40°C TA = –55°C 50 0 5 10 15 20 25 30 35 VS, VD (V) –300 –400 –500 ID (OFF) + – VDD = 12V VSS = 0V VBIAS = 1V/10V ID, IS (ON) – – –700 0 25 50 75 100 125 TEMPERATURE (°C) Figure 11. RON as a Function of VS, VD for Different Temperatures, 36 V Single Supply Figure 14. Leakage Currents vs. Temperature, 12 V Single Supply 50 200 IS (OFF) – + IS (OFF) + – ID, IS (ON) + + 0 IS (OFF) + – ID, IS (ON) + + –50 ID (OFF) + – ID (OFF) – + –100 ID, IS (ON) – – –150 –200 –250 25 50 75 100 125 TEMPERATURE (°C) Figure 12. Leakage Currents vs. Temperature, ±15 V Dual Supply ID (OFF) – + –400 –600 ID (OFF) + – –800 VDD = +15V VSS = –15V VBIAS = +10V/–10V 0 IS (OFF) – + –200 VDD = 36V VSS = 0V VBIAS = 1V/30V ID, IS (ON) – – –1000 0 25 50 75 100 125 TEMPERATURE (°C) Figure 15. Leakage Currents vs. Temperature, 36 V Single Supply Rev. B | Page 13 of 20 11475-017 LEAKAGE CURRENT (pA) 0 11475-014 LEAKAGE CURRENT (pA) IS (OFF) + – –200 –600 VDD = 36V VSS = 0V 0 ID, IS (ON) + + –100 11475-016 TA = +85°C 11475-011 ON RESISTANCE (Ω) LEAKAGE CURRENT (pA) TA = +125°C 150 ADG5208-EP/ADG5209-EP Enhanced Product 0 0 –20 –40 –60 –80 NO DECOUPLING CAPACITORS –60 –80 –100 DECOUPLING CAPACITORS 100k 1M 10M 100M 1G FREQUENCY (Hz) –120 1k 11475-018 –140 10k 10k 10M –5 0 –6 –40 –7 ATTENUATION (dB) TA = 25°C VDD = +15V V –20 SS = –15V BETWEEN S1 AND S2 –60 –80 –100 BETWEEN S1 AND S8 TA = 25°C VDD = +15V VSS = –15V ADG5208-EP ADG5209-EP –8 –9 –10 1M 10M 100M 1G FREQUENCY (Hz) –12 100k 1M TA = 25°C MUX (SOURCE TO DRAIN) 4 CHARGE INJECTION (pC) VDD = +20V VSS = –20V 25 VDD = +15V VSS = –15V 20 VDD = +36V VSS = 0V 15 10 VDD = +12V VSS = 0V 0 –20 –10 0 10 20 VDD = +20V VSS = –20V 3 VDD = +15V VSS = –15V 2 VDD = +12V VSS = 0V 1 VDD = +36V VSS = 0V 0 –1 30 40 VS (V) 11475-020 5 1G 5 TA = 25°C DEMUX (DRAIN TO SOURCE) 30 100M Figure 20. Bandwidth Figure 17. Crosstalk vs. Frequency, ±15 V Dual Supply 35 10M FREQUENCY (Hz) –2 –20 –10 0 10 20 30 40 VS (V) Figure 21. Charge Injection vs. Source Voltage, Source to Drain Figure 18. Charge Injection vs. Source Voltage, Drain to Source Rev. B | Page 14 of 20 11475-039 100k 11475-019 –140 10k 11475-023 –11 –120 CHARGE INJECTION (pC) 1M Figure 19. ACPSRR vs. Frequency, ±15 V Dual Supply Figure 16. Off Isolation vs. Frequency, ±15 V Dual Supply 40 100k FREQUENCY (Hz) 11475-021 –100 –120 CROSSTALK (dB) TA = 25°C VDD = +15V VSS = –15V –40 ACPSRR (dB) OFF ISOLATION (dB) TA = 25°C VDD = +15V –20 VSS = –15V Enhanced Product ADG5208-EP/ADG5209-EP 300 60 VDD = +36V VSS = 0V VDD = +12V VSS = 0V 50 CAPACITANCE (pF) 250 TIME (ns) 200 150 VDD = +15V VSS = –15V 100 VDD = +20V VSS = –20V 50 TA = 25°C VDD = +15V VSS = –15V 40 SOURCE/DRAIN ON 30 DRAIN OFF 20 10 0 20 40 60 80 100 120 TEMPERATURE (°C) 11475-024 –20 0 –20 Figure 22. tTRANSITION Times vs. Temperature CAPACITANCE (pF) 30 25 SOURCE/DRAIN ON 20 DRAIN OFF 10 5 SOURCE OFF –15 –10 –5 0 VS (V) 5 10 15 20 11475-025 0 –20 –5 0 5 10 15 20 Figure 24. ADG5208-EP Capacitance vs. Source Voltage, ±15 V Dual Supply TA = 25°C VDD = +15V VSS = –15V 15 –10 VS (V) 40 35 –15 11475-040 SOURCE OFF 0 –40 Figure 23. ADG5209-EP Capacitance vs. Source Voltage, ±15 V Dual Supply Rev. B | Page 15 of 20 ADG5208-EP/ADG5209-EP Enhanced Product TEST CIRCUITS D IS (OFF) A VD NC = NO CONNECT ID (OFF) Sx A 11475-027 Sx D A VS 11475-031 ID (ON) NC VD Figure 25. On Leakage Figure 28. Off Leakage VSS VDD 0.1µF 0.1µF VDD NETWORK ANALYZER VSS 50Ω Sx IDS 50Ω VS D V1 RL 50Ω GND VS RON = V1/IDS OFF ISOLATION = 20 log Figure 26. On Resistance VDD VSS 0.1µF VDD VSS 0.1µF 0.1µF VOUT VOUT VS Figure 29. Off Isolation 0.1µF NETWORK ANALYZER 11475-030 D 11475-028 Sx VOUT VDD S1 VSS VDD RL 50Ω D S2 NETWORK ANALYZER VSS 50Ω Sx RL 50Ω VS D RL 50Ω GND CHANNEL-TO-CHANNEL CROSSTALK = 20 log VOUT VS 11475-029 GND INSERTION LOSS = 20 log Figure 27. Channel-to-Channel Crosstalk VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 30. Bandwidth Rev. B | Page 16 of 20 VOUT 11475-033 VS Enhanced Product ADG5208-EP/ADG5209-EP 3V ADDRESS DRIVE (VIN) 50% 50% tr < 20ns tf < 20ns VDD VSS VDD VSS A0 0V VIN S1 A1 50Ω A2 tTRANSITION tTRANSITION S8 90% ADG5208-EP* 2.0V OUTPUT VS1 S2 TO S7 VS8 OUTPUT D EN GND 300Ω 35pF 11475-034 90% *SIMILAR CONNECTION FOR ADG5209-EP. Figure 31. Address to Output Switching Times, tTRANSITION 3V ADDRESS DRIVE (VIN) VDD VSS VDD VSS A0 VIN 0V S1 A1 50Ω A2 VS S2 TO S7 S8 80% ADG5208-EP* 80% OUTPUT 2.0V OUTPUT D EN GND 300Ω 35pF 11475-035 tD *SIMILAR CONNECTION FOR ADG5209-EP. Figure 32. Break-Before-Make Time Delay, tD 3V 50% VSS VDD VSS A0 50% S1 A1 0V A2 tON (EN) ADG5208-EP* tOFF (EN) 0.9VOUT VIN 50Ω OUTPUT D EN OUTPUT VS S2 TO S8 GND 300Ω 35pF 0.1VOUT *SIMILAR CONNECTION FOR ADG5209-EP. Figure 33. Enable Delay, tON (EN), tOFF (EN) Rev. B | Page 17 of 20 11475-036 ENABLE DRIVE (VIN) VDD ADG5208-EP/ADG5209-EP Enhanced Product 3V VDD VSS VDD VSS A0 A1 VIN A2 ADG5208-EP* RS ΔVOUT Sx D EN QINJ = CL × ΔVOUT GND VS VOUT CL 1nF VIN *SIMILAR CONNECTION FOR ADG5209-EP. Figure 34. Charge Injection Rev. B | Page 18 of 20 11475-037 VOUT Enhanced Product ADG5208-EP/ADG5209-EP OUTLINE DIMENSIONS 5.10 5.00 4.90 16 9 4.50 4.40 4.30 6.40 BSC 1 8 PIN 1 1.20 MAX 0.15 0.05 0.20 0.09 0.30 0.19 0.65 BSC COPLANARITY 0.10 SEATING PLANE 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 35. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters ORDERING GUIDE Model ADG5208SRU-EP-RL7 ADG5209SRU-EP-RL7 Temperature Range −55°C to +125°C −55°C to +125°C Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] Rev. B | Page 19 of 20 Package Option RU-16 RU-16 ADG5208-EP/ADG5209-EP Enhanced Product NOTES ©2013–2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11475-0-8/14(B) Rev. B | Page 20 of 20