PHILIPS TDA9808T

INTEGRATED CIRCUITS
DATA SHEET
TDA9808
Single standard VIF-PLL with
QSS-IF and FM-PLL demodulator
Product specification
Supersedes data of 1999 Jan 18
File under Integrated Circuits, IC02
1999 Jun 04
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
FEATURES
GENERAL DESCRIPTION
• 5 V supply voltage (9 V supply voltage for TDA9808
(DIP20) only)
The TDA9808 is an integrated circuit for single standard
(negative modulated) vision IF signal processing and FM
demodulation, with single reference QSS-IF in TV and
VTR sets.
• Applicable for IFs (Intermediate Frequencies) of
38.9 MHz, 45.75 MHz and 58.75 MHz
• Gain controlled wide band Video IF (VIF)-amplifier
(AC-coupled)
• True synchronous demodulation with active carrier
regeneration (very linear demodulation, good
intermodulation figures, reduced harmonics, excellent
pulse response)
• Robustness for over-modulation better than 105% due
to Phase Locked Loop (PLL)-bandwidth control at
negative modulated standards
• VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector
• Tuner AGC with adjustable TakeOver Point (TOP)
• Automatic Frequency Control (AFC) detector without
extra reference circuit
• AC-coupled limiter amplifier for sound intercarrier signal
• Alignment-free FM-PLL demodulator with high linearity
• Sound IF (SIF) input for single reference Quasi Split
Sound (QSS) mode (PLL controlled); SIF AGC detector
for gain controlled SIF amplifier; single reference QSS
mixer for high performance
• Electrostatic Discharge (ESD) protection for all pins.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
TDA9808
DIP20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
TDA9808T
SO20
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1999 Jun 04
2
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VP
supply voltage
IP
supply current
Vi(VIF)(rms)
VIF input signal voltage sensitivity
(RMS value)
CONDITIONS
VP = 9 V for TDA9808 (DIP20)
only
−1 dB video at output
Vo(video)(p-p) video output signal voltage
(peak-to-peak value)
MIN.
TYP.
MAX. UNIT
4.5
5
9.9
V
71
83
95
mA
−
60
100
µV
1.2
1.35
1.5
V
7
8
−
MHz
56
60
−
dB
B−3
−3 dB video bandwidth on pin 9
S/NW(video)
weighted signal-to-noise ratio for
video
αIM(0.92)
intermodulation attenuation at ‘blue’
f = 0.92 MHz
58
64
−
dB
αIM(2.76)
intermodulation attenuation at ‘blue’
f = 2.76 MHz
58
64
−
dB
αH(sup)
suppression of harmonics in video
signal
35
40
−
dB
Vi(SIF)(rms)
sound IF input signal voltage
sensitivity (RMS value)
−3 dB at intercarrier output
−
50
100
µV
Vo(rms)
audio output signal voltage for FM
(RMS value)
M, N standard;
25 kHz modulation
0.4
0.5
0.6
V
THD
total harmonic distortion
25 kHz modulation
−
0.15
1.0
%
S/NW(audio)
weighted signal-to-noise ratio
25 kHz modulation; τ = 75 µs
55
60
−
dB
1999 Jun 04
CL < 30 pF; RL > 1.5 kΩ; AC load
3
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AFC
VP
GND
n.c.
3
17
4
14
15
8
13
AFC
DETECTOR
TAGC
12
TUNER
AGC
18
16
VOLTAGE
REFERENCE
VIF
AGC
Vo(vid)
9 1.35 V (p-p) SOUND
TRAP
1
VIF
SAW
2
VIF
AMPLIFIER
FPLL
VIDEO
DEMODULATOR
AND AMPLIFIER
VCO
TWD
NOISE
CLIPPING
6 Vo AF
4
19
20
SIF
AMPLIFIER
SINGLE
REFERENCE
QSS MIXER
TDA9808
FM-PLL
DEMODULATOR
SIF
AGC
5
10
11
Vo QSS
Vi FM
7
MHA736
4.5 MHz
CSAGC
CDEC
Product specification
Fig.1 Block diagram.
mute
switch
TDA9808
handbook, full pagewidth
SIF
SAW
Philips Semiconductors
2 x fpc
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TPLL
BLOCK DIAGRAM
1999 Jun 04
CVAGC
TADJ
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
PINNING
SYMBOL
PIN
DESCRIPTION
SYMBOL
PIN
DESCRIPTION
Vi VIF1
1
VIF differential input signal voltage 1
Vi FM
11
sound intercarrier input voltage
Vi VIF2
2
VIF differential input signal voltage 2
TAGC
12
tuner AGC output
TADJ
3
tuner AGC takeover point adjust
AFC
13
AFC output
TPLL
4
PLL loop filter
VCO1
14
VCO1 resonance circuit
CSAGC
5
SIF AGC capacitor
VCO2
15
VCO2 resonance circuit
Vo AF
6
audio output
GND
16
ground
CDEC
7
decoupling capacitor
CVAGC
17
VIF AGC capacitor
18
supply voltage
n.c.
8
not connected
VP
Vo(vid)
9
composite video output voltage
Vi SIF1
19
SIF differential input signal voltage 1
Vo QSS
10
single reference QSS output voltage
Vi SIF2
20
SIF differential input signal voltage 2
handbook, halfpage
Vi VIF1 1
20 Vi SIF2
Vi VIF2 2
19 Vi SIF1
handbook, halfpage
20 Vi SIF2
Vi VIF2 2
19 Vi SIF1
TADJ 3
18 VP
TADJ 3
18 VP
TPLL 4
17 CVAGC
TPLL 4
17 CVAGC
CSAGC 5
Vo AF 6
CSAGC 5
16 GND
TDA9808
CDEC 7
n.c. 8
15 VCO2
Vo AF 6
14 VCO1
CDEC 7
Vo QSS 10
16 GND
TDA9808T
15 VCO2
14 VCO1
n.c. 8
13 AFC
Vo(vid) 9
13 AFC
12 TAGC
Vo(vid) 9
12 TAGC
11 Vi FM
Vo QSS 10
11 Vi FM
MHA734
MHA735
Fig.2 Pin configuration DIP20.
1999 Jun 04
Vi VIF1 1
Fig.3 Pin configuration SO20.
5
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
FUNCTIONAL DESCRIPTION
VCO, Travelling Wave Divider (TWD) and AFC
The integrated circuit comprises the functional blocks as
shown in Fig.1:
The VCO operates with a resonance circuit (with L and C
in parallel) at double the Picture Carrier (PC) frequency.
The VCO is controlled by two integrated variable
capacitors. The control voltage required to tune the VCO
from its free-running frequency to double the PC frequency
is generated by the frequency-phase detector of the FPLL
and fed via the loop filter to the first variable capacitor. This
control voltage is amplified and additionally converted into
a current which represents the AFC output signal. At the
centre frequency the AFC output current is equal to zero.
1. Vision IF amplifier and VIF AGC detector
2. Tuner AGC
3. Frequency Phase Locked Loop (FPLL) detector
4. Voltage Controlled Oscillator (VCO), Travelling Wave
Divider (TWD) and AFC
5. Video demodulator and amplifier
6. SIF amplifier and SIF AGC
The oscillator signal is divided-by-two with a TWD which
generates two differential output signals with a 90 degree
phase difference independent of the frequency.
7. Single reference QSS mixer
8. FM-PLL demodulator
9. Audio Frequency (AF) signal processing
Video demodulator and amplifier
10. Internal voltage stabilizer.
The video demodulator is realized by a multiplier which is
designed for low distortion and large bandwidth. The vision
IF input signal is multiplied with the ‘in phase’ signal of the
travelling wave divider output.
Vision IF amplifier and VIF AGC detector
The vision IF amplifier consists of three AC-coupled
differential amplifier stages. Each differential stage
comprises a feedback network controlled by emitter
degeneration.
The demodulator output signal is fed to the video amplifier
via an integrated low-pass filter for attenuation of the
carrier harmonics. The video amplifier is realized by an
operational amplifier with internal feedback and high
bandwidth. A low-pass filter is integrated to achieve an
attenuation of the carrier harmonics. The video output
signal at pin Vo(vid) is 1.35 V (p-p) for nominal vision IF
modulation. Noise clipping is provided.
The AGC detector generates the required VIF gain control
voltage for constant video output by charging/discharging
the AGC capacitor. Therefore, for negative video
modulation the synchronisation level of the video signal is
detected.
Tuner AGC
SIF amplifier and SIF AGC
The AGC capacitor voltage is converted to an internal IF
control signal, and is fed to the tuner AGC to generate the
tuner AGC output current at pin TAGC (open-collector
output). The tuner AGC takeover point can be adjusted at
pin TADJ. This allows to match the tuner to the SAW filter
in order to achieve the optimum IF input level.
The sound IF amplifier consists of two AC-coupled
differential amplifier stages. Each differential stage
comprises a controlled feedback network provided by
emitter degeneration.
The SIF AGC detector is related to the SIF input signal
(average level of FM carrier) and controls the SIF amplifier
to provide a constant SIF signal to the single reference
QSS mixer.
Frequency Phase Locked Loop (FPLL) detector
The VIF-amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier.
During acquisition the frequency detector produces a DC
current proportional to the frequency difference between
the input and the VCO signal. After frequency lock-in the
phase detector produces a DC current proportional to the
phase difference between the VCO and the input signal.
The DC current of either the frequency detector or the
phase detector is converted to a DC voltage via the loop
filter, which controls the VCO frequency.
1999 Jun 04
6
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
Single reference QSS mixer
AF signal processing
The single reference QSS mixer is realized by a multiplier.
The SIF amplifier output signal is fed to the single
reference QSS mixer and converted to intercarrier
frequency by the regenerated picture carrier (VCO).
The mixer output signal is fed via a high-pass filter for
attenuation of the video signal components to the output
pin 10. With this system a high performance hi-fi stereo
sound processing can be achieved.
The AF amplifier consists of two parts:
1. The AF pre-amplifier for FM sound is an operational
amplifier with internal feedback, high gain and high
common mode rejection. The AF voltage from the
PLL demodulator, by principle a small output signal, is
amplified by approximately 33 dB. The low-pass
characteristic of the amplifier reduces the harmonics of
the intercarrier signal at the sound output terminal
pin 10. An additional DC control circuit is implemented
to keep the DC level constant, independent of process
spread.
FM-PLL demodulator
The FM-PLL demodulator consists of a limiter and an
FM-PLL. The limiter provides the amplification and
limitation of the FM sound intercarrier signal. The result is
high sensitivity and AM suppression. The amplifier
consists of 7 stages which are internally AC-coupled in
order to minimize the DC offset.
2. The AF output amplifier (10 dB) provides the required
output level by a rail-to-rail output stage. This amplifier
makes use of an input selector for switching to FM or
mute state, controlled by the mute switching voltage.
Internal voltage stabilizer
Furthermore the AF output signal can be muted by
connecting a resistor between the limiter input pin 11 and
ground.
The bandgap circuit internally generates a voltage of
approximately 1.25 V, independent of supply voltage and
temperature. A voltage regulator circuit, connected to this
voltage, produces a constant voltage of 3.6 V which is
used as an internal reference voltage.
The FM-PLL consists of an integrated relaxation oscillator,
an integrated loop filter and a phase detector.
The oscillator is locked to the FM intercarrier signal, output
from the limiter. As a result of locking, the oscillator
frequency tracks with the modulation of the input signal
and the oscillator control voltage is superimposed by the
AF voltage. The FM-PLL operates as an FM demodulator.
1999 Jun 04
TDA9808
7
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VP
PARAMETER
supply voltage
CONDITIONS
MIN.
MAX.
UNIT
note 1
Tj(max) = 125 °C;
TDA9808 (DIP20)
−
9.9
V
Tj(max) = 115 °C;
TDA9808T (SO20)
−
5.5
V
Vi
voltage at pins 1, 2, 5, 13, 17, 19 and 20
0
VP
V
ts(max)
maximum short-circuit time to ground or VP
−
10
s
V12
tuner AGC output voltage
0
13.2
V
Tstg
storage temperature
−25
+150
°C
Tamb
operating ambient temperature
−20
+70
°C
Ves
electrostatic handling voltage
−300
+300
V
note 2
Notes
1. IP = 95 mA; Tamb = 70 °C.
2. Machine model class B (L = 2.5 µH).
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
VALUE
UNIT
TDA9808 (DIP20)
62
K/W
TDA9808T (SO20)
85
K/W
thermal resistance from junction to ambient in free air
1999 Jun 04
8
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
CHARACTERISTICS (9 V SUPPLY, TDA9808; DIP20 only)
VP = 9 V; Tamb = 25 °C; see Table 1 for input frequencies and carrier ratios; input level Vi(VIF)(rms) = 10 mV
(pins 1 and 2) (sync-level); Vi(SIF)(rms) = 4.5 mV (pins 19 and 20) (sound carrier); IF input from 50 Ω via broadband
transformer 1 : 1; video modulation DSB; residual carrier: 10%; video signal in accordance with “NTC-7 Composite”;
measurements taken in Fig.13; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (pin 18)
VP
supply voltage
IP
supply current
note 1
4.5
5.0
9.9
V
72
85
98
mA
60
90
µV
True synchronous video demodulator; note 2
Vi(VIF)(rms)
VIF input signal voltage
sensitivity (RMS value)
PLL still locked;
−
maximum IF gain; note 3
Composite video amplifier (pin 9; sound carrier off)
Vo(video)(p-p)
video output signal voltage
(peak-to-peak value)
see Fig.8
1.27
1.45
1.63
V
S/NW(video)
weighted signal-to-noise ratio
see Fig.6 and note 4
56
60
−
dB
PSRR
power supply ripple rejection
at pin 9
see Fig.11
25
30
−
dB
tuner gain current from
20 to 80%
−
6
8
dB
fpc = 38.9 MHz
0.35
0.55
0.75
µA/kHz
fpc = 45.75 MHz
0.35
0.55
0.75
µA/kHz
fpc = 58.75 MHz
0.35
0.55
0.75
Tuner AGC (pin 12)
∆GIF
IF slip by automatic gain
control
AFC circuit (pin 13); see Fig.10 and note 5
S
∆fIF/∆T
control steepness ∆I13/∆f
frequency variation by
temperature
note 6
IAFC = 0; note 7
−
−
±20 ×
µA/kHz
10−6
K−1
FM-PLL sound demodulator and AF output (pin 6); note 8
Vo(AF)(6)(rms)
AF output signal voltage
(RMS value)
±25 kHz
(50% FM deviation);
see Fig.13
375
500
625
mV
S/NW(audio)
weighted signal-to-noise ratio
“CCIR 468-4”;
see Fig.13
55
60
−
dB
α6
mute attenuation
70
75
−
dB
∆V5
DC jump voltage of AF output
terminal
−
±50
±175
mV
1999 Jun 04
FM-PLL in lock mode
9
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
Notes to the characteristics
1. Values of video and sound parameters are decreased at VP = 4.5 V.
2. Loop bandwidth BL = 70 kHz (natural frequency fn = 12 kHz; damping factor d ≈ 3; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0 > 50; Cext: see Table 3; Cint ≈ 8.5 pF (loop voltage approximately
2.7 V).
3. Vi(VIF) signal for nominal video signal.
4. S/N is the ratio of black to white amplitude to the black level noise voltage (RMS value, pin 9). B = 5 MHz weighted
in accordance with “CCIR 567” at a source impedance of 50 Ω.
5. To match the AFC output signal to different tuning systems a current source output is provided (Fig.10).
6. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0 > 50; see note 2; C0 = Cint + Cext).
7. Temperature coefficient of external LC-circuit is equal to zero.
8. Input level for second IF from an external generator with 50 Ω source impedance. AC-coupled with 10 nF capacitor,
fmod = 1 kHz, 25 kHz (50% FM deviation) of audio reference. A VIF/SIF input signal is not permitted. Pin 17 has to be
connected to positive supply voltage. S/N and THD measurements are taken at 50 µs (75 µs at M standard)
de-emphasis.
1999 Jun 04
10
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
CHARACTERISTICS (5 V SUPPLY)
VP = 5 V; Tamb = 25 °C; see Table 1 for input frequencies and carrier ratios; input level Vi(VIF)(rms) = 10 mV (pins 1 and 2)
(sync-level); Vi(SIF)(rms) = 4.5 mV (pins 19 and 20) (sound carrier); IF input from 50 Ω via broadband transformer 1 : 1;
video modulation DSB; residual carrier: 10%; video signal in accordance with “NTC-7 Composite”; measurements taken
in Fig.13; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (pin 18)
VP
supply voltage
IP
supply current
note 1
4.5
5
5.5
V
71
83
95
mA
Vision IF amplifier (pins 1 and 2)
Vi(rms)
allowable overload input
voltage (RMS value)
note 2
−
−
440
mV
VI(max)(rms)
maximum input signal voltage
(RMS value)
+1 dB video at output;
see Fig.4
−
−
140
mV
Vi(VIF)(rms)
VIF input signal voltage
sensitivity (RMS value)
−1 dB video at output;
see Fig.4
−
60
100
µV
∆Vo(int)
internal IF amplitude
difference between picture
and sound carrier
within AGC range;
M standard;
∆f = 4.5 MHz
−
0.7
1
dB
GIFcr
IF gain control range
see Fig.4
65
70
−
dB
Ri(diff)
differential input resistance
note 3
1.7
2.2
2.7
kΩ
Ci(diff)
differential input capacitance
note 3
1.2
1.7
2.5
pF
VI(1,2)
DC input voltage
note 3
−
3.4
−
V
True synchronous video demodulator; note 4
fVCO(max)
maximum oscillator frequency
for carrier regeneration
f = 2fpc
125
130
−
MHz
∆fosc/∆T
oscillator drift as a function of
temperature
oscillator is
free-running; IAFC = 0;
note 5
−
−
±20 × 10−6
K−1
∆fosc/∆VP
oscillator shift as a function of
supply voltage
oscillator is
free-running; note 5
−
−
±1500 × 10−6 V−1
VVCO(rms)
oscillator voltage swing at
pins 14 and 15 (RMS value)
50
80
110
mV
fcr(pc)
picture carrier capture range
±1.4
±1.8
−
MHz
tacq
acquisition time
−
−
30
ms
Vi(IF)(rms)
IF input signal voltage
maximum IF gain;
sensitivity for PLL to be locked note 7
(RMS value; pins 1 and 2)
−
60
90
µV
1999 Jun 04
BL = 70 kHz; note 6
11
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SYMBOL
PARAMETER
TDA9808
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Composite video amplifier (pin 9; sound carrier off)
Vo(video)(p-p)
output signal voltage
(peak-to-peak value)
V/S
see Fig.8
1.2
1.35
1.5
ratio between video
(black-to-white) and sync level
2.0
2.5
3.0
Vsync(9)
sync voltage level
1.4
1.5
1.6
V
Vclu(9)
upper video clipping voltage
level
3.3
3.45
−
V
Vcll(9)
lower video clipping voltage
level
−
1.1
1.25
V
Ro(9)
output resistance
−
−
10
Ω
Iint(9)
internal DC bias current for
emitter-follower
1.6
2.0
−
mA
Io(sink)(9)(max)
maximum AC and DC output
sink current
1.0
−
−
mA
Io(source)(9)(max) maximum AC and DC output
source current
2.0
−
−
mA
note 3
V
deviation of CVBS output
signal voltage
50 dB gain control
−
−
0.5
dB
30 dB gain control
−
−
0.1
dB
∆Vo(bl)
black level tilt
gain variation; note 8
−
−
1
%
Gdiff
differential gain
“NTC-7 Composite”
−
2
5
%
ϕdiff
differential phase
“NTC-7 Composite”
−
2
4
deg
B−1
−1 dB video bandwidth
CL < 30 pF;
RL > 1.5 kΩ; AC load
5
6
−
MHz
B−3
−3 dB video bandwidth
CL < 30 pF;
RL > 1.5 kΩ; AC load
7
8
−
MHz
S/NW(video)
weighted signal-to-noise ratio
for video
see Fig.6 and note 9
56
60
−
dB
S/N(video)
unweighted signal-to-noise
ratio for video
see Fig.6 and note 9
49
53
−
dB
αIM(0.92)
intermodulation attenuation at
f = 0.92 MHz; see Fig.7
and note 10
58
64
−
dB
60
66
−
dB
58
64
−
dB
59
65
−
dB
∆Vo
‘blue’
‘yellow’
αIM(2.76)
intermodulation attenuation at
‘blue’
f = 2.76 MHz; see Fig.7
and note 10
‘yellow’
VVC(rms)
residual vision carrier
(RMS value)
fundamental wave and
harmonics
−
2
10
mV
αH(sup)
suppression of video signal
harmonics
note 11a
35
40
−
dB
αH(spur)
spurious elements
note 11b
40
−
−
dB
PSRR
power supply ripple rejection
at pin 9
video signal; grey level;
see Fig.11
25
30
−
dB
1999 Jun 04
12
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SYMBOL
PARAMETER
TDA9808
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VIF-AGC detector (pin 17)
I17
tresp
55
75
95
µA
discharging current
note 8
1.0
1.4
1.8
µA
AGC response to an
increasing VIF step
note 12
−
0.05
0.1
ms/dB
−
2.2
3.5
ms/dB
charging current
AGC response to a
decreasing VIF step
Tuner AGC (pin 12)
IF input signal voltage for
minimum starting point of
tuner takeover (RMS value)
input at pins 1 and 2;
RTOP = 22 kΩ;
I12 = 0.4 mA
−
2
5
mV
IF input signal voltage for
maximum starting point of
tuner takeover (RMS value)
input at pins 1 and 2;
RTOP = 0 Ω;
I12 = 0.4 mA
50
100
−
mV
tuner takeover point accuracy
RTOP = 13 kΩ;
I12 = 0.4 mA
6
−
14
mV
Vo(12)
permissible output voltage
from external source;
note 3
−
−
13.2
V
Vsat(12)
saturation voltage
I12 = 1.6 mA
−
−
0.2
V
∆VTOP(12)/∆T
variation of takeover point by
temperature
I12 = 0.4 mA
−
0.03
0.07
dB/K
I12(sink)
sink current
see Fig.4
no tuner gain
reduction;
V12 = 13.2 V
−
−
5
µA
maximum tuner gain
reduction
1.5
2
2.6
mA
−
6
8
dB
Vi(rms)
∆GIF
IF slip by automatic gain
control
tuner gain current from
20 to 80%
AFC circuit (pin 13); see Fig.10 and note 13
S
control steepness ∆I13/∆f
note 14
fpc = 38.9 MHz
0.35
0.55
0.75
µA/kHz
fpc = 45.75 MHz
0.35
0.55
0.75
µA/kHz
fpc = 58.75 MHz
0.35
0.55
0.75
µA/kHz
10−6
K−1
∆fIF/∆T
frequency variation by
temperature
IAFC = 0; note 5
−
Vo(13)
output voltage upper limit
see Fig.10
VP − 0.7 VP − 0.3 −
V
output voltage lower limit
see Fig.10
−
0.3
0.7
V
−
±20 ×
Io(source)(13)
output source current
150
200
250
µA
Io(sink)(13)
output sink current
150
200
250
µA
∆I13(p-p)
residual video modulation
current (peak-to-peak value)
−
20
30
µA
1999 Jun 04
13
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SYMBOL
PARAMETER
TDA9808
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Sound IF amplifier (pins 19 and 20)
Vi(SIF)(rms)
input signal voltage sensitivity
(RMS value)
−1 dB at intercarrier
output pin 10
−
50
100
µV
Vi(max)(rms)
maximum input signal voltage
(RMS value)
+1 dB at intercarrier
output pin 10
40
110
−
mV
Gcr(SIF)
SIF gain control range
see Fig.5
60
66
−
dB
Ri(diff)
differential input resistance
note 3
1.7
2.2
2.7
kΩ
Ci(diff)
differential input capacitance
note 3
1.2
1.7
2.5
pF
VI(19,20)
DC input voltage
−
3.4
−
V
αSIF,VIF
crosstalk attenuation between
SIF and VIF input
50
−
−
dB
between pins 1 and 2
and pins 19 and 20;
note 15
SIF AGC detector (pin 5)
Ich(5)
charging current
3.5
5
6.5
µA
Idch(5)
discharging current
4.5
6
7.5
µA
100
125
mV
141
198
225
mV
Single reference QSS intercarrier mixer (pin 10)
Vo(rms)
IF intercarrier output level
(RMS value)
Vo(peak)
IF intercarrier output level
(peak value)
B−3
−3 dB intercarrier bandwidth
upper limit
7.5
9
−
MHz
VSC(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
−
2
5
mV
VVC(rms)
residual vision carrier
(RMS value)
fundamental wave and
harmonics
−
2
5
mV
Ro(10)
output resistance
note 3
−
−
25
Ω
VO(10)
DC output voltage
−
2.0
−
V
Iint(10)
DC internal bias current for
emitter-follower
1.5
1.9
−
mA
Isink(max)(10)
maximum AC and DC output
sink current
1.2
1.6
−
mA
Isource(max)(10)
maximum AC and DC output
source current
2.0
2.5
−
mA
1999 Jun 04
SC1; sound carrier 2 off 75
14
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SYMBOL
PARAMETER
TDA9808
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Limiter amplifier (pin 11); note 16
Vi(FM)(rms)
input signal voltage for lock-in
(RMS value)
Vi(FM)(rms)
input signal voltage
(RMS value)
+ N
S
- weighted =
 ------------N 
−
−
100
µV
−
300
400
µV
200
−
−
mV
40 dB
allowed input signal voltage
(RMS value)
αAM
AM suppression
50 µs de-emphasis;
AM: f = 1 kHz; m = 0.3
refer to 25 kHz
(50% FM deviation)
46
50
−
dB
Ri(11)
input resistance
note 3
480
600
720
Ω
VI(11)
DC input voltage
−
2.8
−
V
upper limit
7.0
−
−
MHz
lower limit
−
−
4.0
MHz
upper limit
9.0
−
−
MHz
lower limit
−
−
3.5
MHz
−
−
4
µs
FM-PLL demodulator
fcr
catching range of PLL
fhr
holding range of PLL
tacq
acquisition time
FM operation (M, N standard; pin 6); notes 16 and 16a
Vo(AF)(6)(rms)
AF output signal voltage
(RMS value)
25 kHz
(50% FM deviation);
Rx = 0 Ω; see Fig.13
and note 17
400
500
600
mV
Vo(AF)(6)(cl)
AF output clipping signal
voltage level
THD < 1.5%
1.0
−
1.2
V
∆fAF
frequency deviation
THD < 1.5%; Rx = 0 Ω;
note 17
−
−
±53
kHz
∆Vo/∆T
temperature drift of AF output
signal voltage
−
3 × 10−3 7 × 10−3
dB/K
V7
DC voltage at decoupling
capacitor
voltage dependent on
VCO frequency;
note 18
1.2
−
3.0
V
Ro(6)
output resistance
note 3
−
−
100
Ω
VO(6)
DC output voltage
−
2.3
−
V
Isink(max)(6)
maximum AC and DC output
sink current
−
−
1.1
mA
Isource(max)(6)
maximum AC and DC output
source current
−
−
1.1
mA
B−3
−3 dB audio frequency
bandwidth
100
125
−
kHz
1999 Jun 04
without de-emphasis
capacitor
15
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
SYMBOL
PARAMETER
TDA9808
CONDITIONS
MIN.
TYP.
MAX.
UNIT
THD
total harmonic distortion
25 kHz
(50% FM deviation)
−
0.15
0.5
%
S/NW(audio)
weighted signal-to-noise ratio
for audio
FM-PLL only; with
75 µs de-emphasis;
25 kHz
(50% FM deviation);
“CCIR 468-4”
55
60
−
dB
VSC(rms)
residual sound carrier
(RMS value)
fundamental wave and
harmonics
−
−
75
mV
α6
mute attenuation of AF signal
70
75
−
dB
∆V6
DC jump voltage of AF output
terminal for switching AF
output to mute state and vice
versa
FM-PLL in lock mode
−
±50
±150
mV
PSRR
power supply ripple rejection
at pin 6
Rx = 0 Ω; f = 70 Hz;
see Figs 11 and 13
20
26
−
dB
Single reference QSS AF performance for FM operation (M standard); notes 19, 20 and 21; see Table 1
S/NW(audio)
weighted signal-to-noise ratio
for audio
black picture
50
56
−
dB
white picture
47
53
−
dB
colour bar
45
51
−
dB
Notes to the characteristics
1. Values of video and sound parameters are decreased at VP = 4.5 V.
2. Level headroom for input level jumps during gain control setting.
3. This parameter is not tested during production and is only given as an application information for designing the
television receiver.
4. Loop bandwidth BL = 70 kHz (natural frequency fn = 12 kHz; damping factor d ≈ 3; calculated with sync level within
gain control range). Resonance circuit of VCO: Q0 > 50; Cext see Table 3; Cint ≈ 8.5 pF (loop voltage approximately
2.7 V).
5. Temperature coefficient of external LC-circuit is equal to zero.
6. Vi(IF)(rms) = 10 mV; ∆f = 1 MHz (VCO frequency offset related to picture carrier frequency); white picture
video modulation.
7. Vi(VIF) signal for nominal video signal.
8. The leakage current of the AGC capacitor should not exceed 100 nA at M, N standard. Larger currents will increase
the tilt.
9. S/N is the ratio of black-to-white amplitude to the black level noise voltage (RMS value, pin 9). B = 5 MHz weighted
in accordance with “CCIR 567”.
10. The intermodulation figures are defined:
 V o at 3.58 MHz 
α 0.92 = 20 log  -----------------------------------------  + 3.6 dB ; α0.92 value at 0.92 MHz referenced to black/white signal;
 V o at 0.92 MHz 
 V o at 3.58 MHz 
α 2.76 = 20 log  -----------------------------------------  ; α2.76 value at 2.76 MHz referenced to colour carrier.
 V o at 2.76 MHz 
1999 Jun 04
16
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
11. Measurements taken with SAW filter M3951 (sound carrier suppression: 32 dB); loop bandwidth BL = 70 kHz:
a) Modulation VSB; sound carrier off; fvideo > 0.5 MHz.
b) Sound carrier on; SIF SAW filter M9352; fvideo = 10 kHz to 10 MHz.
12. Response speed valid for a VIF input level range of 200 µV up to 70 mV.
13. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.10. The AFC-steepness can be changed by the resistors at pin 13.
14. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0 > 50; see note 4; C0 = Cint + Cext).
15. Source impedance: 2.3 kΩ in parallel to 12 pF (SAW filter); fIF = 38.9 MHz.
16. Input level for second IF from an external generator with 50 Ω source impedance, AC-coupled with 10 nF capacitor,
fmod = 400 Hz, 25 kHz (50% FM deviation) of audio reference. A VIF/SIF input signal is not permitted. Pins 5 and 17
have to be connected to positive supply voltage for minimum IF gain. S/N and THD measurements are taken at
75 µs de-emphasis (modulator pre-emphasis has to be activated). The FM demodulator steepness ∆Vo(AF)/∆fAF is
positive.
a) Second IF input level 10 mV RMS.
17. Measured at de-emphasis circuitry with an FM deviation of 25 kHz (fmod = 400 Hz) the typical AF output signal is
500 mV RMS (Rx = 0 Ω). By using Rx = 470 Ω the AF output signal is attenuated by 6 dB (250 mV RMS).
For handling a frequency deviation of more than 53 kHz the AF output signal has to be reduced by using Rx in order
to avoid clipping (THD < 1.5%). For an FM deviation up to 100 kHz an attenuation of 6 dB is recommended with
Rx = 470 Ω.
18. The leakage current of the decoupling capacitor (22 µF) should not exceed 1 µA.
19. For all S/N measurements the used vision IF modulator has to meet the following specifications:
a) Incidental phase modulation for black-to-white jump less than 0.5 degrees.
b) QSS AF performance, measured with the television demodulator AMF2 (audio output, weighted S/N ratio) better
than 60 dB (deviation 25 kHz) for 6 kHz sine wave black-to-white video modulation.
c) Picture-to-sound carrier ratio; PC/SC1 = 7 dB (transmitter).
20. The PC/SC1 ratio is calculated as the addition to TV transmitter PC/SC1 ratio and SAW filter PC/SC1 ratio.
This PC/SC1 ratio is necessary to achieve the S/NW(audio) values as noted. A different PC/SC1 ratio will change these
values.
21. Measurements taken with SAW filter M3951 for vision IF (suppressed sound carrier, minimum 25 dB) and M9352 for
sound IF (suppressed picture carrier). Input level Vi(SIF)(rms) = 10 mV, 25 kHz (50% FM deviation). Measurements in
accordance with “CCIR 468-4”.
Table 1
Input frequencies and carrier ratios
SYMBOL
DESCRIPTION
fpc or fIF
picture/IF carrier
fSC1
sound carrier
B/G STANDARD
M, N STANDARD
38.9
45.75/58.75
fSC2
SC1
picture-to-sound carrier
SC2
1999 Jun 04
17
UNIT
MHz
33.4
41.25/54.25
MHz
33.158
−
MHz
13
7
dB
20
−
dB
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
MHA737
70
handbook, full pagewidth
gain
0.06
(dB)
60
Vi(VIF)(rms)
(mV)
50
0.6
40
Ituner
(mA)
0
30
(1)
6
(2)
(3)
(4)
20
1
10
60
0
2
−10
1
(1) Ituner; RTOP = 22 kΩ.
(2) Gain.
1.5
2
2.5
3
3.5
4
V17 (V)
4.5
(3) Ituner; RTOP = 11 kΩ.
(4) Ituner; RTOP = 0 Ω.
Fig.4 Typical VIF (pins 1 and 2) and tuner AGC characteristic.
MHA738
110
handbook, full pagewidth
100
100
Vi(SIF)(rms)
90
(mV) (dBµV)
10
80
70
1
60
50
0.1
40
30
0.01
20
1
1.5
2
2.5
3
3.5
Fig.5 Typical SIF (pins 19 and 20) AGC characteristic.
1999 Jun 04
18
4
V5 (V)
4.5
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
MED684
75
handbook, halfpage
S/N
(dB)
3.2 dB
handbook, halfpage
10 dB
13.2 dB
50
13.2 dB
21 dB
21 dB
25
SC CC
PC
SC CC
BLUE
PC
YELLOW
MHA739
0
−60
−40
−20
0
20
Vi (VIF)(rms)(dB)
0.06
Fig.6
0.6
6 10
60
600
Vi (VIF)(rms)(mV)
SC = sound carrier, with respect to sync level.
CC = chrominance carrier, with respect to sync level.
PC = picture carrier, with respect to sync level.
Typical signal-to-noise ratio as a function of
IF input voltage.
Fig.7 Input signal conditions.
MHA741
10
handbook, halfpage
(1)
(dB)
−10
(2)
zero carrier level
white level
3.0 V halfpage
handbook,
2.85 V
−30
1.85 V
black level
1.5 V
sync level
−50
−70
M, N standard
(3)
MHA740
30
50
70
90
110
input voltage (dBµV)
(1) Signal.
(2) AM rejection.
(3) Noise.
Fig.8
Typical video signal levels on output pin 9
(sound carrier off).
1999 Jun 04
Fig.9
19
Typical audio level, noise and AM rejection
(50% FM deviation).
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
5
VAFC
handbook, full pagewidth
225
I13
(µA)
150
(V)
VP = 5 V
(source current)
3.75
VP = 5 V
75
22 kΩ
TDA9808
13
I13
VAFC
2.5
0
22 kΩ
−75
(sink current)
1.25
−150
MHA742
0
45.35
45.75
46.15
f (MHz)
−225
a. VP = 5 V.
9
VAFC
handbook, full pagewidth
150
I13
(µA)
100
(V)
7.5
VP = 9 V
(source current)
VP = 9 V
6
50
62 kΩ
TDA9808
13
I13
VAFC
4.5
0
62 kΩ
−50
3
(sink current)
−100
1.5
MHA743
−150
0
45.35
45.75
46.15
f (MHz)
b. VP = 9 V.
Fig.10 Measurement conditions and typical AFC characteristic.
1999 Jun 04
20
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
handbook, full pagewidth
VP = 5 V
100 mV
(f ripple = 70 Hz)
VP = 5 V
TDA9808
MHA744
t
Fig.11 Ripple rejection condition.
1999 Jun 04
21
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
handbook, full pagewidth
TDA9808
140
10
120
video 1.35 V (p-p)
1
(1)
100
10−1
SAW insertion
loss 14 dB
antenna input
(dBµV)
IF signals
RMS value
(V)
IF slip
6 dB
80
10−2 (TOP)
tuning gain
control range
70 dB
VIF AGC
10−3
0.66 × 10−3
60
SAW insertion
loss 14 dB
10−4
40
40 dB
RF gain
10−5
0.66 × 10−5
20
10
VHF/UHF tuner
VIF
VIF amplifier, demodulator
and video
tuner
SAW filter
TDA9808
MHA745
(1) Depends on TOP.
Fig.12 Front end level diagram.
1999 Jun 04
22
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
INTERNAL CIRCUITRY
Table 2
Equivalent pin circuits and pin voltages
PIN
NO.
PIN
SYMBOL
DC VOLTAGE
(V)
1
Vi VIF1
3.4
2
Vi VIF2
3.4
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
+
1
1.1 kΩ
400 µA
1.1 kΩ
+
2
800 Ω
400 µA
3.4 V
MHA752
3
TADJ (TOP)
0 to 1.9
30 kΩ
3.6 V
20 kΩ
9 kΩ
3
1.9 V
MHA753
4
TPLL
1.5 to 4.0
+
+
+
+
Ib
+
4
VCO
200 µA
MHA754
1999 Jun 04
23
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
PIN
NO.
5
PIN
SYMBOL
CSAGC
DC VOLTAGE
(V)
TDA9808
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
1.5 to 4.0
+
15 µA
5
Ib
+
+
5 µA
MHA755
6
Vo AF
2.3
+
+
27.3 kΩ
6
25 pF
27.7 kΩ
120 Ω
MHA756
7
CDEC
1.2 to 3.0
+
+
+
90 µA
7
1 kΩ
MHA757
8
n.c.
1999 Jun 04
24
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
PIN
NO.
9
PIN
SYMBOL
Vo(vid)
DC VOLTAGE
(V)
TDA9808
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
sync level: 1.5
+
100 Ω
9
2.1 pF
2.0 mA
MHA758
10
Vo QSS
2.0
+
150 Ω
1.9 mA
10
14.7 kΩ
MHA759
11
Vi FM
2.65
400 Ω
11
640 Ω
40 kΩ
35 µA
2.65 V
600 µA
MHA760
12
TAGC
0 to 13.2
12
MHA761
13
AFC
0.3 to VP − 0.3
+
13
+
IAFC
±200 µA
MHA762
1999 Jun 04
25
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
PIN
NO.
PIN
SYMBOL
DC VOLTAGE
(V)
14
VCO1
2.7
15
VCO2
2.7
TDA9808
EQUIVALENT CIRCUIT (WITHOUT ESD PROTECTION CIRCUIT)
420 Ω
420 Ω
50 Ω
14
2.8 V
15
500 µA
MHA763
16
GND
0
17
CVAGC
1.5 to 4.0
40 µA
17
Ib
75 µA
1.4 µA
MHA764
18
VP
VP
19
Vi SIF1
3.4
20
Vi SIF2
3.4
+
19
+
100 µA
1.1
kΩ
250 µA
5 kΩ
10 kΩ
1.8 V
1.1
kΩ
+
20
800 Ω
250 µA
3.4 V
MHA765
1999 Jun 04
26
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22 kΩ
100 nF
10 nF
1:1
1
SIF
input
CVAGC
5
22 kΩ
tuner
AGC-output
GND
(1)
50
Ω
2
4
5.6 kΩ
220
nF
Vi FM
3
20
19
18
17
16
15
14
13
12
11
27
mute
switch
TDA9808
1
2
3
4
5
6
7
8
9
1:1
1
VIF
input
50
Ω
5
2
330
Ω
4
3
100
nF
22
kΩ
220
nF
15
nF
10 nF
4.7
kΩ
(2)
22
µF
10
Vo QSS
n.c.
Rx(3)
Philips Semiconductors
AFC
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TEST AND APPLICATION INFORMATION
1999 Jun 04
VP
Vo(vid)
1.35 V (p-p)
560 Ω
4.5 MHz(4)
MHA746
Fig.13 Test circuit.
CDEC
Product specification
See Table 3.
De-emphasis circuitry for 75 µs.
See note 17 of Chapter “Characteristics (5 V supply)”.
Depends on TV standard.
CSAGC Vo AF
TDA9808
(1)
(2)
(3)
(4)
TPLL
handbook, full pagewidth
TADJ
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22 kΩ
100 nF
10 nF
IF
input
CVAGC
SAW
FILTER
M9352
22 kΩ
tuner
AGC-output
GND
(2)
5.6 kΩ
220
nF
Vi FM
SIF
(1)
19
20
18
17
16
14
15
13
12
11
28
mute
switch
TDA9808
2
1
3
4
5
6
7
8
9
VIF
50
Ω
SAW
FILTER
M3951
(1)
100
nF
330
Ω
22
kΩ
220
nF
15
nF
10 nF
4.7
kΩ
(3)
22
µF
10
Vo QSS
n.c.
Rx(4)
Philips Semiconductors
AFC
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
1999 Jun 04
VP
Vo(vid)
1.35 V (p-p)
560 Ω
4.5 MHz(1)
MHA747
Fig.14 Application circuit.
CDEC
Product specification
Depends on TV standard.
See Table 3.
De-emphasis circuitry for 75 µs.
See note 17 of Chapter “Characteristics (5 V supply)”.
CSAGC Vo AF
TDA9808
(1)
(2)
(3)
(4)
TPLL
handbook, full pagewidth
TADJ
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
Table 3
TDA9808
Oscillator circuit for the different TV standards
PARAMETER
EUROPE
USA
JAPAN
IF frequency
38.9 MHz
45.75 MHz
58.75 MHz
VCO frequency
77.8 MHz
91.5 MHz
117.5 MHz
14
14
Oscillator circuit
(1)
(2)
15
(1)
(3)
14
(2)
15
MHA766
(1) CVCO = 8.5 pF.
(2) C = 8.2 ±0.25 pF.
(3) L = 251 nH.
(3)
MHA766
(1) CVCO = 8.5 pF.
(2) C = 10 ±0.25 pF.
(3) L = 163 nH.
(1)
(2)
15
(3)
MHA766
(1) CVCO = 8.5 pF.
(2) C = 15 ±0.25 pF.
(3) L = 78 nH.
e.g. Toko coil
5KM 369SNS-2010Z
5KMC V369SCS-2370Z
MC139 NE545SNAS100108
Philips ceramic capacitor
2222 632 51828
inside of coil
15 pF SMD; size = 0805
1999 Jun 04
29
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
PACKAGE OUTLINES
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
w M
(e 1)
b
MH
11
20
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
inches
0.17
0.020
0.13
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
D
e
e1
L
ME
MH
w
Z (1)
max.
6.40
6.22
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.0
0.25
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.078
(1)
E
(1)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT146-1
1999 Jun 04
REFERENCES
IEC
JEDEC
EIAJ
SC603
30
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-05-24
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
HE
y
v M A
Z
11
20
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
10
e
bp
detail X
w M
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.30
0.10
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.9
0.4
inches
0.10
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.050
0.419
0.043
0.055
0.394
0.016
0.043
0.039
0.01
0.01
0.004
0.035
0.016
Z
(1)
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013AC
1999 Jun 04
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-01-24
97-05-22
31
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
SOLDERING
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
• For packages with leads on two sides and a pitch (e):
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Surface mount packages
REFLOW SOLDERING
MANUAL SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
1999 Jun 04
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
32
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
TDA9808
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
MOUNTING
PACKAGE
WAVE
REFLOW(1)
DIPPING
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
suitable(2)
−
suitable
Surface mount
not suitable
suitable
−
suitable
−
suitable
−
not
recommended(4)(5)
suitable
−
not
recommended(6)
suitable
−
BGA, SQFP
suitable(3)
HLQFP, HSQFP, HSOP, HTSSOP, SMS
not
PLCC(4), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jun 04
33
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
NOTES
1999 Jun 04
34
TDA9808
Philips Semiconductors
Product specification
Single standard VIF-PLL with QSS-IF and
FM-PLL demodulator
NOTES
1999 Jun 04
35
TDA9808
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Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1999
SCA 65
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/06/pp36
Date of release: 1999 Jun 04
Document order number:
9397 750 05973