AN-1252: How to Configure the AD5933/AD5934 (Rev. 0) PDF

AN-1252
APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
How to Configure the AD5933/AD5934
by Miguel Usach
INTRODUCTION
The AD5933 and AD5934 are high precision impedance
converter system solutions. The main difference between
these two solutions is the maximum measurable frequency.
This application note applies to both parts. The main blocks
of the AD5933 and AD5934 are shown in Figure 1.
The output programmable gain amplifier (PGA) is used for
conditioning the output signal. It can be configured in four user
selectable excitation voltages.
Receive Stage
The receive stage consists of
The impedance converter is a finite system and has some
limitations. This application note only aims to explain the
optimum setup for measurements.
•
•
•
IMPEDANCE MEASUREMENT BLOCKS
Impedance converters can be divided into three different
blocks: a transmit stage, a receive stage, and a discrete Fourier
transform (DFT) engine.
The transimpedance amplifier (TIA) that converts the
current that crosses the impedance into voltage
The input PGA that amplifies the TIA signal ×1 or ×5
The ADC that samples the signal and fills the internal
buffer (1024 points)
DFT Engine
The DFT engine processes the data and generates real (R) and
imaginary (I) number components.
Transmit Stage
The DDS core and the high speed DAC generate a sine wave
signal used to excite the impedance.
MCLK
DDS + DAC
OSCILLATOR
OUTPUT
PGA
VOUT
Z(ω)
AD5933/AD5934
RFB
3pF
VIN
ADC
(12 BITS)
LPF
INPUT
PGA
TIA
VDD/2
Figure 1. AD5933/AD5934 Block Diagram
Rev. 0 | Page 1 of 12
11834-001
1024-POINT
DFT ENGINE
AN-1252
Application Note
TABLE OF CONTENTS
Introduction ...................................................................................... 1
Choosing an Appropriate Settling Time ....................................5
Impedance Measurement Blocks .................................................... 1
Calculating the Gain Factor .........................................................5
Revision History ............................................................................... 2
Getting Started .................................................................................. 3
When the Impedance is Outside the Maximum AD5933/
AD5934 Measurable Range..........................................................7
Benefits of Adding an External AFE .......................................... 3
Example ..........................................................................................7
Rebiasing the DC Level................................................................ 3
Measuring a Complex Impedance ..............................................8
Reducing the Output Impedance ............................................... 3
Measuring Liquid ..........................................................................8
Configuring the Part ........................................................................ 5
Setting Up and Programming ..........................................................9
Selecting the Excitation Voltage ................................................. 5
Setting Up the Part ........................................................................9
Identifying the Impedance Range .............................................. 5
Programming the Part ..................................................................9
Choosing an Appropriate Value for RFB..................................... 5
REVISION HISTORY
11/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
Application Note
AN-1252
GETTING STARTED
BENEFITS OF ADDING AN EXTERNAL AFE
CN-217 describes an external analog front end (AFE) designed
to improve measurements.
An example of the different dc bias voltages is shown Figure 3
for Range 1 where VDD = 5 V.
5.00V
This AFE has two main benefits: to reduce the output
impedance of the signal source and to rebias the excitation
voltage signal.
3.74V
1.24V
2.50V
REBIASING THE DC LEVEL
3V p-p
2.24V
When connecting the impedance between VIN and VOUT, as
shown in Figure 2, notice that the dc bias voltage is slightly
different in the transmit stage and receive stage.
11834-003
1.76V
0.74V
Figure 3. Excitation Output Voltage Without AFE
ROUT
Due to this mismatch, the dc level difference is amplified by the
RFB, or, in other words, the ADC dynamic range is reduced.
VOUT
Additionally, a dc voltage across a sensor can polarize it and/or
degrade it over the sensor lifetime.
Z(ω)
REDUCING THE OUTPUT IMPEDANCE
RFB
The internal output impedance depends on the amplitude
voltage range selected and this may be as high as 2.4 kΩ.
Therefore, since impedance cannot be considered negligible, it
needs to be added into the equation. Typical values are shown
in Table 2.
VDD2
11834-002
VIN
Figure 2. AD5933 Without External AFE
The receiver dc offset is set to the ADC midscale, noninverting
pin of the TIA, VDD/2, while the dc offset in the transmitter
depends on the selected output voltage shown in Table 1.
Table 1. DC Offset Voltage vs. Output Range for 3.3 V
Range No.
1
2
3
4
DC Offset Voltage
1.48
0.76
0.31
0.173
V p-p
1.98
0.97
0.383
0.173
Table 2. System Output Impedance
Range No.
1 to 4
(Adding external op amp)
1
2
3
4
Rev. 0 | Page 3 of 12
Typical Output Impedance, ZOUT
>100 Ω
200 Ω
2.4 kΩ
1 kΩ
600 Ω
AN-1252
Application Note
Implementing these suggestions is relatively easy. Rebiasing the
dc level is straightforward; just add a high-pass filter. If you
are planning to design the high-pass filter, refer to AN-581
Application Note, Biasing and Decoupling Op Amps in Single
Supply Applications.
To reduce the output impedance and have the ability to measure
low impedances, the recommended op amp of choice is the
AD8606 (ZOUT = 1 Ω). You may consider the AD8602 as a lower
cost alternative. Figure 4 shows the AFE implementation in the
EVAL-AD5933EBZ, Rev. C1.
The second AD8606 is used as a TIA due to the lower leakage
and noise; the internal receive stage TIA is operating as a
voltage follower.
Rev. 0 | Page 4 of 12
VDD/2
1.48V
VDD
VDD
50kΩ
VOUT
ROUT
47nF
A1
50kΩ
A1, A2 ARE
½ AD8606
ZUNKNOWN
RFB
RFB
20kΩ
VIN
20kΩ
A2
VDD
20kΩ
20kΩ
Figure 4. AD5933 with AFE
11834-004
The total measurable impedance is the unknown impedance
and the system output impedance. To measure small
impedances, adding the system output impedance may
dramatically increase the range thus increasing the total
measurable impedance. Consequently, this reduces the output
current. To compensate, the value of RFB needs to increase. In
other words, a high RFB value means worse SNR and lower
sensitivity in your system.
Application Note
AN-1252
CONFIGURING THE PART
Note that if you are rebiasing, the signal VDCOFFSET is VDD/2.
Correctly configuring the AD5933/AD5934 is key to getting
the most accurate measurement from the part.
At this point, it is important to clarify that the equations are
based on a headroom of 200 mV below VDD.
SELECTING THE EXCITATION VOLTAGE
CHOOSING AN APPROPRIATE SETTLING TIME
The recommendation is to use the maximum output voltage
because the SNR is degraded with lower amplitudes.
IDENTIFYING THE IMPEDANCE RANGE
The ratio between the maximum and minimum impedance
is limited by the ADC resolution, supply, and dc offset for the
selected range. The maximum ratio, ZMAX/ZMIN, is shown in
Table 3.
Table 3. Maximum Ratio Allowable
Range No.
1 to 4
1
2
3
4
CALCULATING THE GAIN FACTOR
To calculate the gain factor, it is always recommended to use a
discrete resistor rather than a complex impedance.
Ratio
×45
×40
×15
×5
×2
Remember to add the system output impedance into the
impedance range. This depends on the selected range as shown
in Table 2.
If the unknown impedance range does not fit within the maximum range, split your impedance range into subgroups. If this
is the case, your system should be capable of changing the TIA
gain. This can be done by adding an external mux or switch
(that is, ADG1419) with different RFB values as shown in
Figure 5.
VOUT
The reason for calibrating the system with a discrete resistor is
simple. The algorithm to calculate the phase is relative, in other
words, the unknown impedance phase is the difference between
the calibrated phase minus the unknown measured phase.
Therefore, to avoid confusion, it is necessary to calibrate the
part using a zero phase delay impedance. The recommended
impedance value for calibration is
 = ( +  ) ×
Recommendation
Regardless of how one wants to calculate the gain factor, it is
always recommended to measure the system phase for each
frequency because a typical op amp phase is not constant for
some frequencies as shown in the example in Figure 6.
0
RFB
VS = ±2.5V
Z(ω)
VIN
–45
PHASE (Degrees)
MUX
3:1
11834-005
AD5933
Figure 5. Variable TIA Gain
CHOOSING AN APPROPRIATE VALUE FOR RFB
The internal ADC reference is VDD. It is important to guarantee
that, in the worst case, the voltage generated by the TIA does
not saturate the converter. The RFB value is defined as

1
3

− 0.2� × 
1
2
=
×


� + 2 −  �
–90
–135
�
–180
10
where:
VPK is the peak voltage of the selected output range.
ZMIN is the minimum impedance.
GAIN is the selected PGA gain, ×1 or ×5.
VDD is the supply.
VDCOFFSET is the dc offset voltage for the selected range shown in
Table 1.
100
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
11834-006
DC Level
Rebiasing
No Rebiasing
The part allows preexcitation of the impedance before beginning measurements. This is recommended if the imaginary part
of the load is bigger than the real part or if the distance sensor
load is high. The settling time is referred to as the actual output
frequency. Therefore, if you are generating a frequency sweep,
the delay is different for each excitation frequency.
Figure 6. Phase Linearity Example
There are different ways to calculate the gain factor depending
on the frequency range and memory space constrains.
Rev. 0 | Page 5 of 12
AN-1252
Application Note
Calculating the Gain Factor Using Single Impedance and
Single Frequency
The impedance is excited with a single frequency. Typically,
this is a frequency in the middle of your frequency sweep.
Improvements: Best Fit Equation
This is a method to correct offset and gain errors in the system,
in other words, to linearize the system within a range.
First, the gain factor is calculated using one of the methods
described in this application note.
This type of calibration is fast and requires minimum space
in memory, but offers less precision than other methods.
Once the gain factor is calculated, measure the impedance in
the extremes of the range as shown in Table 7.
Specifically, the AD5933 DFT engine uses a method called
single point DFT. Rather than analyze the entire spectrum
and calculate the energy for a given frequency, the algorithm
returns a single bin that contains multiple frequencies, at
approximately 976.56 Hz at 1MSPS.
The equations to correct the measured value are
 =×+
( −  )
=
( −  )
For example, when configuring a measurement for a 1 kHz
excitation signal, the bin will contain the energy stored from
976 Hz to 1952 Hz.
 =  − ( ×  )
On the board, there are many devices generating noise at
different frequencies, such as an SMPS regulator; this could add
more energy to the bin that the energy measured only in the
impedance.
where:
ZMAX is the real maximum impedance.
ZMIN is the real minimum impedance.
XMAX is the maximum measured impedance.
XMIN is the minimum measured impedance.
Calculating the Gain Factor Using Multipoint
Frequencies, Single Impedance
The best fit equation for each frequency can be calculated, but
this increases memory requirements.
This method is preferred if your frequency span is wide because
it helps to reduce errors related to the op amp bandwidth as well
as reducing bin errors.
There are two different ways to implement this method. The
first way is to generate a look-up table in your controller for the
gain factor. The second way is to calculate the gain factor onthe-fly by adding an external mux/switch as shown in Figure 7.
MEASURED IMPEDANCE
In this case, calculate the gain factor for each frequency.
Y = Mx + C
ZMIN
ZMAX
REAL IMPEDANCE
Figure 8. AD5933 with AFE
VOUT
D
ADG849
S1
RCAL
S2
Z(ω)
RFB
11834-007
VIN
Figure 7. AD5933 for On-the-Fly Calibration
Rev. 0 | Page 6 of 12
11834-008
It is necessary to generate a sweep and repeat the measurement
twice, once with RCAL and a second time with the impedance
(Z(ω)).
Application Note
AN-1252
WHEN THE IMPEDANCE IS OUTSIDE THE
MAXIMUM AD5933/AD5934 MEASURABLE
RANGE
In this case, the error is due to an assumption; the output
impedance is 2.4. Figure 10 shows the error assuming that the
output impedance is 2.4 ± 5%. To be considered negligible, the
error added by the output impedance tolerance, ZMIN, should be
at least 10 times larger than the amplifier output impedance.
There are some limitations in terms of maximum and
minimum measurable impedance. In this case, the easy way
to overcome the limitation is by adding a series or parallel
resistance to decrease or increase the impedance as needed.
This method decreases the accuracy because the unknown
impedance is measured artificially in a different range.
1.4
1.2
1.0
ERROR (%)
EXAMPLE
Consider a simple example that works for several scenarios,
where VDD = 3.3 V.
In this case condition, the unknown impedance range is from
4.7 kΩ to 47 kΩ. Because the AD5933 measures impedance, not
capacitance or inductance, calculate the equivalent impedance
for your maximum and minimum excitation frequency (see
Table 7).
1950
3900
5850
7800
9750
11700
FREQUENCY (Hz)
11834-009
0
Figure 9. Experimental Results Error
1.8
1.6
1.4
Within Ratio
Yes
Yes
Yes
No
No
1.2
ERROR (%)
0.8
0.4
0
31
32
33
34
35
36
37
38
39
40
41
FREQUENCY (kHz)
Without AFE
Range 2
ZMIN, 7.1 kΩ
ZMAX, 49.4 kΩ
11834-010
0.2
Figure 10. Error with Output Impedance Tolerance
If the system adds an external buffer, there are not big
differences using gain ×1 or ×5 as shown in Figure 11.
0.25
Calculate RFB according to Table 6.
Table 6. RFB Values for Different PGA Configurations
4.7kΩ AFE 1V p-p
4.7kΩ AFE 2V p-p
4.7kΩ AFE 2V p-p ×5
4.7kΩ AFE 1V p-p ×5
0.20
Without AFE
Range 2
×1, 7.4 kΩ
×5, 1.5 kΩ
ERROR (%)
Range 1
×1, 6.1 kΩ
×5, 1.2 kΩ
47kΩ, NO AFE 1V p-p
47kΩ, 2.4kΩ –5%
47kΩ, 2.4kΩ +5%
0.6
Table 5. Maximum and Minimum Impedance to Measure
Range 1
ZMIN, 4.9 kΩ
ZMAX, 47.2 kΩ
4.7kΩ, NO AFE 1V p-p
4.7kΩ, 2.4kΩ –5%
4.7kΩ, 2.4kΩ +5%
1.0
Calibrate the system, using
1
 = ( +  ) × = 17 kΩ
47kΩ AFE 1V p-p
47kΩ AFE 2V p-p
47kΩ AFE 2V p-p ×5
47kΩ AFE 1V p-p ×5
0.15
0.10
0.05
3
To analyze the results, note the performance results using
multipoint calibration.
0
As shown in Figure 9 through Figure 12, the results without the
AFE are slightly worse than those with an AFE. In all cases, the
results are below the 1% except for Range 2 at low impedance.
Rev. 0 | Page 7 of 12
31
32
33
34
35
36
37
38
39
40
41
FREQUENCY (kHz)
Figure 11. Error With and Without PGA Stage Enabled for System
with External AFE
11834-011
Range No.
1 to 4
1
2
3
4
Calculate ZMIN and ZMAX according to Table 5.
With AFE
Range 1
×1, 6.8 kΩ
×5, 1.4 kΩ
0.6
0.2
Table 4. Selecting Ranges
With AFE
AD8606
ZMIN, 4.7 kΩ
ZMAX, 47 kΩ
47kΩ NO AFE 1V p-p
47kΩ NO AFE 2V p-p
47kΩ AFE 1V p-p
47kΩ AFE 2V p-p
0.4
As shown in Table 4, only Range 1 and Range 2 can be used for
the measurements; all four ranges can be used if an external
buffer is added. For this example, the selected op amp is the
AD8606 as shown in CN-217.
AFE
Using AD8606
Without AFE
4.7kΩ NO AFE 1V p-p
4.7kΩ NO AFE 2V p-p
4.7kΩ AFE 1V p-p
4.7kΩ AFE 2V p-p
0.8
AN-1252
Application Note
If the system does not add an external buffer, there is a slight
improvement using ×5 gain as shown in Figure 12.
maximum data rate, the internal 1024-point buffer cannot store
a full period; this adds a considerable error to the final result.
If you need to measure below 1 kHz, the recommendation is
to reduce the MCLK frequency. This increases the calculation
time; the DFT engine clock is MCLK and requires an external
filter to attenuate harmonics. Keep the Nyquist theorem in
mind since the internal filters are optimized for the maximum
sample rate of 1 MSPS. For example, to measure the impedance
at 10 Hz, MCLK ≈16 MHz/100 ≈160 kHz
1.4
1.2
4.7kΩ NO AFE 2V p-p ×5
4.7kΩ NO AFE 2V p-p
4.7kΩ NO AFE 1V p-p
4.7kΩ NO AFE 1V p-p ×5
47kΩ NO AFE 2V p-p ×5
47kΩ NO AFE 2V p-p
47kΩ NO AFE 1V p-p
47kΩ NO AFE 1V p-p ×5
0.8
0.6
Inductance Can Be Measured
0.4
The examples found in the data sheet are based on capacitors,
but there are no restrictions or reasons why you cannot measure
an inductor.
0.2
31
32
33
34
35
36
37
38
39
40
41
FREQUENCY (kHz)
MEASURING LIQUID
11834-012
0
Figure 12. Error With and Without Gain Stage Enabled
The difference is appreciable using Range 2 for 4.7 kΩ. The
reason behind this surprising result is the noise. The amplifier
noise is roughly estimated as
  =   + 
  = �( ×
To measure liquid, buy a commercial sensor or design your
own. A sensor for this purpose typically has one or more
parallel plates, rings, or nets as shown in Figure 13.
RING
PCB
LIQUID
)2
+ 
2
CONNECTORS
11834-013
ERROR (%)
1.0
The equations intentionally omit the bandwidth contribution
and other noise sources added by the op amp itself.
The PGA stage noise is constant while the TIA noise depends
directly on the TIA gain. The worst case scenario is at
maximum gain, ZLOAD = ZMIN.
MEASURING A COMPLEX IMPEDANCE
Figure 13. Example of Sensor to Measure Liquids
The measured impedance is defined by
=



where:
l is the distance between plates (or traces).
A is the area of the plates.
ρ is the electric resistivity.
To measure complex impedance, refer to the conversion
table (see Table 7) to calculate the maximum and minimum
impedance based on the excitation frequency. This section
describes three points to keep in mind.
Do Not Calibrate the System with a Complex Impedance
The conductivity of a liquid is defined as
=
Otherwise, phase results will be not as expected. This is
explained in the Calculating the Gain Factor section.
1

The parameters of the sensor are constant, thus the impedance
changes are driven by the electric conductivity.
There is a Minimum Excitation Frequency
The ADC samples at MCLK/16 with a 1 MSPS maximum data
rate. For an excitation frequency below 1 kHz sampling at the
Rev. 0 | Page 8 of 12
Application Note
AN-1252
SETTING UP AND PROGRAMMING
3.
SETTING UP THE PART
Programming the part is a multistep process. Begin by setting
up the part as follows:
•
Internal oscillator: MCLK = 16.776 MHz
•
fSTART = 1950 Hz
•
∆f = 975 Hz
•
Increments = 10
•
PGA gain = ×1
•
Output range = 2 V p-p
•
Settling time = 1 ms worst case
•
•
•
4.
5.
2.
Program the start frequency.
1.950 kHz
� × 227 = 0x00F3C5
16.776 MHz ÷ 4
Write 0x00 to Register Address 0x82
=�
•
•
•
Write 0xE2 to Register Address 0x87
Program the number of increments.
•
Write 0x00 to Register Address 0x88
•
Write 0x0A to Register Address 0x89
Program the delay in the measurements. The worst case is
at maximum frequency,
D = 1 ms × 11700 = 12
Reset the part.
Write 0x10 to Register Address 0x81
Write 0x79 to Register Address 0x86
fMAX = 1950 + (975 × 10) = 11700 Hz
Once the part is set up, follow Step 1 through Step 7 to program
the part.
•
975 Hz
� × 227 = 0x0079E2
16.776 MHz ÷ 4
Write 0x00 to Register Address 0x85
=�
PROGRAMMING THE PART
1.
Program ∆f.
6.
7.
•
Write 0x00 to Register Address 0x8A
•
Write 0x0C to Register Address 0x8B
Initialize the system.
•
Write 0x11 to Register Address: 0x80
•
Wait several milliseconds.
Follow the flowchart in Figure 14 to sweep the frequency.
If you need a new sweep, it is not necessary to reset the
part again. Simply place the part in standby mode and
program the registers again.
Write 0xF3 to Register Address 0x83
Write 0xC5 to Register Address 0x84
•
Rev. 0 | Page 9 of 12
Write 0x30 to Register Address: 0x80
Application Note
AN-1252
START
FREQUENCY
SWEEP
REGISTER
ADDRESS: 0x80
DATA: 0x21
READ STATUS
REGISTER
REGISTER
ADDRESS: 0x8F
STATUS REGISTER
NO
[DATA AND 0x02] > 0
YES
READ RESULT
REGISTER
ADDRESSES,
0x94
0x95
0x96
0x97
DO YOU WANT TO
AVERAGE THE
MEASUREMENTS?
--AVERAGE;
AVERAGE== 0
NO
REPEAT
THE
MEASUREMENT
REGISTER
ADDRESS: 0x80
DATA: 0x41
YES
READ STATUS
REGISTER
ADDRESS: 0x8F
STATUS REGISTER
[DATA AND 0x02] > 0
NO
GENERATE
NEXT
FREQUENCY
REGISTER
ADDRESS: 0x80
DATA: 0x31
YES
DONE
POWER DOWN
THE PART
11834-014
REGISTER
ADDRESS: 0x80
DATA: 0xA0
Figure 14. Flowchart
Rev. 0 | Page 10 of 12
Application Note
AN-1252
Table 7. Example of Impedance Conversion
Schematic
Impedance
Phase
 = 
R
1

| | =
 = 
tan−1 () =
1
2 
1
| | =
2 
L
| | = 2 
| | = 2 
R
C
1
1
1
=
+
= 
  
1
1 + 
 = +  =



 =
1 + 

| | =
2
�1 + (2 ) 2
| | =
�12
C
| | =
| | =
+ (2 ) 2
�12 + (2 ) 2
2
�12 + (2 ) 2
2
 =  + 
R
 =  + 
| | = � 2 + (2 )2
L
| | = � 2 + (2 )2
R
C
L
 = (||) + 

 =
+ 
1 + 
 =

2
 180
×
= 90°
2

Use higher capacitance to calculate the
lowest impedance and minimum
capacitance value to calculate highest
impedance
Use lower inductor to calculate the
lowest impedance and maximum
inductor value to calculate highest
impedance
0

− tan−1

1
= − tan−1 
tan−1

 =  + 
1
1 + 
 =  +
=


R
Constant impedance


− tan−1 � � = −
0
2
 180
= −90°
− ×

2
 =
C
Notes
0
tan−1 = 0

− 2 +  + 
1 + 


− tan−1
1
0

= − tan−1  −
2
tan−1
tan−1


tan−1


− tan−1
2
 − 
1
Rev. 0 | Page 11 of 12
 = √−1
 2 = −1
AN-1252
Application Note
NOTES
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
AN11834-0-11/13(0)
Rev. 0 | Page 12 of 12
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