LT1189 - Low Power Video Difference Amplifier

LT1189
Low Power
Video Difference Amplifier
U
DESCRIPTIO
FEATURES
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Differential or Single-Ended Gain Block (Adjustable)
–3dB Bandwidth, AV = ±10
35MHz
Slew Rate
220V/µs
Low Supply Current
13mA
Output Current
± 20mA
CMRR at 10MHz
48dB
LT1193 Pin Out
Low Cost
Single 5V Operation
Drives Cables Directly
Output Shutdown
UO
APPLICATI
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The LT1189’s high slew rate, 220V/µs, wide bandwidth,
35MHz, and ±20mA output current require only 13mA of
supply current. The shutdown feature reduces the power
dissipation to a mere 15mW, and allows multiple amplifiers to drive the same cable.
The LT1189 is a low power, gain of 10 stable version of the
popular LT1193, and is available in 8-pin miniDIPs and SO
packages. For lower gain applications see the LT1187
data sheet.
Line Receivers
Video Signal Processing
Cable Drivers
Tape and Disc Drive Systems
UO
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S
The LT1189 is a difference amplifier optimized for operation on ±5V, or a single 5V supply, and gain ≥ 10. This
versatile amplifier features uncommitted high input impedance (+) and (–) inputs, and can be used in differential
or single-ended configurations. Additionally, a second set
of inputs give gain adjustment and DC control to the
difference amplifier.
TYPICAL APPLICATI
Cable Sense Amplifier for Loop Through Connections
with DC Adjust
Closed-Loop Gain vs Frequency
50
VIN
5V
CABLE
2
VDC
1
8
+
40
7
–
LT1189
+
–
6
VOUT
4
–5V
909Ω
VOLTAGE GAIN (dB)
3
VS = ±5V
RL = 1k
30
20
10
100Ω
0
0.1
LT1189 • TA01
1
10
FREQUENCY (MHz)
100
LT1189 • TA02
1
LT1189
U
U
RATI GS
W
W W
W
AXI U
U
ABSOLUTE
PACKAGE/ORDER I FOR ATIO
Total Supply Voltage (V + to V –) ............................. 18V
Differential Input Voltage ........................................ ±6V
Input Voltage .......................................................... ±VS
Output Short Circuit Duration (Note 1) ........ Continuous
Operating Temperature Range
LT1189M ..................................... – 55°C to 150°C
LT1189C............................................. 0°C to 70°C
Junction Temperature (Note 2)
Plastic Package (CN8,CS8) ......................... 150°C
Ceramic Package (CJ8,MJ8) ....................... 175°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................ 300°C
ORDER PART
NUMBER
TOP VIEW
+/REF
1
8
–/FB
–IN
2
7
V+
+IN
3
6
OUT
V–
4
5
S/D
LT1189MJ8
LT1189CJ8
LT1189CN8
LT1189CS8
J8 PACKAGE
N8 PACKAGE
8-LEAD HERMETIC DIP 8-LEAD PLASTIC DIP
S8 PACKAGE
8-LEAD PLASTIC SOIC
LT1189 • POI01
S8 PART MARKING
TJMAX = 175°C, θJA = 100°C/W (J8)
TJMAX = 150°C, θJA = 100°C/W (N8)
TJMAX = 150°C, θJA = 150°C/W (S8)
1189
+
–5V ELECTRICAL CHARACTERISTICS
TA = 25°C, (Note 3)
VS = ±5V, VREF = 0V, RFB1 = 900Ω from pins 6 to 8, RFB2 = 100Ω from pin 8 to ground, RL = RFB1 + RFB2 = 1k, CL ≤ 10pF, pin 5 open.
PARAMETER
Input Offset Voltage
CONDITIONS
Either Input, (Note 4)
SOIC Package
IOS
Input Offset Current
Either Input
0.2
1.0
IB
Input Bias Current
Either Input
±0.5
±2.0
en
Input Noise Voltage
fO = 10kHz
30
nV/√Hz
in
Input Noise Current
fO = 10kHz
1.25
pA/√Hz
RIN
Input Resistance
Differential
30
kΩ
CIN
VIN LIM
Input Capacitance
Input Voltage Limit
Either Input
(Note 5)
2.0
±170
pF
mV
Input Voltage Range
MIN
LT1189M/C
TYP
MAX
1.0
3.0
1.0
4.0
SYMBOL
VOS
–2.5
3.5
UNITS
mV
mV
µA
µA
V
CMRR
Common-Mode Rejection Ratio
VCM = –2.5V to 3.5V
80
105
dB
PSRR
Power Supply Rejection Ratio
VS = ± 2.375V to ±8V
75
90
dB
VOUT
Output Voltage Swing
VS = ± 5V, RL = 1k, AV = 50
±3.8
±4.0
V
VS = ± 8V, RL = 1k, AV = 50
±6.7
±7.0
VS = ±8V, RL = 300Ω, AV = 50, (Note 3)
±6.4
± 6.8
VO = ±1.0V, AV = 10
(Note 6, 10)
150
1.0
220
GE
SR
Gain Error
Slew Rate
FPBW
Full Power Bandwidth
VO = 2VP-P, (Note 7)
35
MHz
BW
Small Signal Bandwidth
AV = 10
35
MHz
tr, tf
Rise Time, Fall Time
tPD
Propagation Delay
AV = 50, VO = ±1.5V, 20% to 80% (Note 10)
RL= 1k, VO = ±125mV, 50% to 50%
Overshoot
VO = ± 50mV
ts
Settling Time
3V Step, 0.1%, (Note 8)
Diff AV
Diff Ph
Differential Gain
Differential Phase
RL = 1k, AV = 10, (Note 9)
RL = 1k, AV = 10, (Note 9)
IS
Supply Current
Shutdown Supply Current
2
Pin 5 at V –
35
50
3.5
75
%
V/µs
ns
12
ns
10
%
1
µs
0.6
0.75
%
DEGP-P
13
16
mA
0.8
1.5
mA
LT1189
+
–5V ELECTRICAL CHARACTERISTICS
TA = 25°C, (Note 3)
VS = ±5V, VREF = 0V, RFB1 = 900Ω from pins 6 to 8, RFB2 = 100Ω from pin 8 to ground, RL = RFB1 + RFB2 = 1k, CL ≤ 10pF, pin 5 open.
SYMBOL
PARAMETER
CONDITIONS
Shutdown Pin Current
Pin 5 at V –
ton
Turn On Time
toff
Turn Off Time
Pin 5 from V – to Ground, RL = 1k
Pin 5 from Ground to V –, RL = 1k
IS/D
MIN
LT1189M/C
TYP
MAX
5
UNITS
µA
25
500
ns
600
ns
5V
CHARACTERISTICS
ELECTRICAL
+
–
TA = 25°C, (Note 3)
VS = 5V, VS = 0V, VREF = 2.5V, RFB1 = 900Ω from pins 6 to 8, RFB2 = 100Ω from pin 8 to VREF, RL = RFB1 + RFB2 = 1k, CL ≤ 10pF, pin 5
open.
MIN
LT1189M/C
TYP
MAX
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
Either Input, (Note 4)
SOIC Package
1.0
1.0
3.0
5.0
mV
mV
IOS
Input Offset Current
Either Input
0.2
1.0
µA
IB
Input Bias Current
Either Input
± 0.5
± 2.0
µA
3.5
V
Input Voltage Range
2.0
CMRR
Common-Mode Rejection Ratio
VCM = 2.0V to 3.5V
VOUT
Output Voltage Swing
RL = 300Ω to Ground
(Note 3)
SR
Slew Rate
VO = 1.5V to 3.5V
BW
Small-Signal Bandwidth
AV = 10
IS
Supply Current
IS/D
80
VOUT High
3.6
VOUT Low
dB
4.0
0.15
V
0.4
175
V/µs
30
MHz
12
15
mA
Shutdown Supply Current
Pin 5 at V –
0.8
1.5
mA
Shutdown Pin Current
Pin 5 at V –
5
25
µA
+
– 5V ELECTRICAL CHARACTERISTICS –55°C ≤ TA ≤ 125°C, (Note 3)
V = ±5V, V = 0V, R = 900Ω from pins 6 to 8, R = 100Ω from pin 8 to ground, R = R + R
S
100
UNITS
REF
FB1
FB2
L
FB1
FB2 =
MIN
1k, CL ≤ 10pF, pin 5 open.
LT1189M
TYP
MAX
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
Either Input, (Note 4)
1.0
7.5
UNITS
mV
∆VOS /∆T
Input VOS Drift
IOS
Input Offset Current
Either Input
0.2
1.5
µV/°C
µA
IB
Input Bias Current
Either Input
± 0.5
±3.5
µA
10
Input Voltage Range
–2.5
3.5
V
CMRR
Common-Mode Rejection Ratio
VCM = –2.5V to 3.5V
80
105
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.375V to ±8V
65
90
dB
VOUT
Output Voltage Swing
VS = ±5V, RL = 1k, AV = 50
±3.7
± 4.0
V
VS = ±8V, RL = 1k, AV = 50
±6.6
±7.0
VS = ±8V, RL = 300Ω, AV = 50, (Note 3)
±6.4
± 6.6
GE
Gain Error
IS
Supply Current
IS/D
VO = ±1V, AV = 10, RL = 1k
Shutdown Supply Current
Pin 5 at V –, (Note 11)
Shutdown Pin Current
Pin 5 at V –
1.0
6.0
%
13
17
mA
0.8
1.5
mA
5
25
µA
3
LT1189
+
– 5V ELECTRICAL CHARACTERISTICS 0°C ≤ TA ≤ 70°C, (Note 3)
V = ±5V, V = 0V, R = 900Ω from pins 6 to 8, R = 100Ω from pin 8 to ground, R = R
S
REF
FB1
FB2
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 4)
Either Input
SOIC Package
∆VOS /∆T
Input VOS Drift
IOS
Input Offset Current
Either Input
IB
Input Bias Current
Either Input
L
Common-Mode Rejection Ratio
+ RFB2 = 1k, CL ≤ 10pF, pin 5 open.
MIN
LT1189C
TYP
MAX
1.0
1.0
3.0
6.0
80
mV
mV
0.2
1.5
µA
± 0.5
±3.5
µA
3.5
V
–2.5
VCM = – 2.5V to 3.5V
UNITS
µV/°C
5.0
Input Voltage Range
CMRR
FB1
105
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.375V to ±8V
70
90
dB
VOUT
Output Voltage Swing
VS = ±5V, RL = 1k, AV = 50
±3.7
±4.0
V
VS = ±8V, RL = 1k, AV = 50
±6.6
±7.0
VS = ±8V, RL = 300Ω, AV = 50, (Note 3)
±6.4
± 6.6
VO = ±1V, AV = 10, RL = 1k
1.0
13
17
mA
Shutdown Supply Current
Pin 5 at V –, (Note 11)
0.8
1.5
mA
Shutdown Pin Current
Pin 5 at V –
5
25
µA
GE
Gain Error
IS
Supply Current
IS/D
3.5
%
CHARACTERISTICS
5V
ELECTRICAL
+
–
0°C ≤ TA ≤ 70°C, (Note 3)
VS = +5V, VS = 0V, VREF = 2.5V, RFB1 = 900Ω from pins 6 to 8, RFB2 = 100Ω from pin 8 to VREF, RL = RFB1 + RFB2 = 1k, CL ≤ 10pF, pin 5
open.
MIN
LT1189C
TYP
MAX
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage, (Note 4)
Either Input
∆VOS /∆T
Input VOS Drift
IOS
Input Offset Current
Either Input
0.2
1.5
µA
IB
Input Bias Current
Either Input
± 0.5
± 3.5
µA
3.5
V
1.0
2.0
CMRR
Common-Mode Rejection Ratio
VCM = 2.0V to 3.5V
VOUT
Output Voltage Swing
RL = 300Ω to Ground
VOUT High
(Note 3)
VOUT Low
IS/D
Supply Current
Shutdown Supply Current
Pin 5 at V, (Note 11)
Shutdown Pin Current
Pin 5 at V –
Note 1: A heat sink may be required to keep the junction temperature below
absolute maximum when the output is shorted continuously.
Note 2: TJ is calculated from the ambient temperature T A and power dissipation
PD according to the following formulas:
LT1189MJ8, LT1189CJ8: TJ = TA + (PD × 100°C/W)
LT1189CN8:
TJ = TA + (PD × 100°C/W)
LT1189CS8:
TJ = TA + (PD × 150°C/W)
Note 3: When RL = 1k is specified, the load resistor is RFB1 + RFB2, but when
RL = 300Ω is specified, then an additional 430Ω is added to the output such
that (RFB1 + RFB2) in parallel with 430Ω is RL = 300Ω.
Note 4: VOS measured at the output (pin 6) is the contribution from both input
pair, and is input referred.
Note 5: VIN LIM is the maximum voltage between –V IN and +VIN (pin 2 and
pin 3) for which the output can respond.
4
UNITS
mV
µV/°C
5.0
Input Voltage Range
IS
3.0
80
100
dB
3.5
4.0
V
0.15
0.4
12
16
mA
0.8
1.5
mA
5
25
µA
Note 6: Slew rate is measured between ±1V on the output, with a VIN step of
±0.5V, AV = 10 and RL = 1k.
Note 7: Full power bandwidth is calculated from the slew rate measurement:
FPBW = SR/2πVp.
Note 8: Settling time measurement techniques are shown in “Take the
Guesswork Out of Settling Time Measurements,” EDN, September 19, 1985.
Note 9: NTSC (3.58MHz).
Note 10: AC parameters are 100% tested on the ceramic and plastic DIP
packaged parts (J8 and N8 suffix) and are sample tested on every lot of the SO
packaged parts (S8 suffix).
Note 11: See Application section for shutdown at elevated temperatures. Do
not operate shutdown above T J > 125°C.
LT1189
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Bias Current vs
Common-Mode Voltage
V+
100
3.0
VS = ±5V
VS = ±5V
2.0
1.5
–55°C
1.0
25°C
0.5
0
+IB
0
–100
–IB
IOS
–200
–300
125°C
– 5 – 4 –3 –2 –1 0 1 2 3
COMMON-MODE VOLTAGE (V)
4
–400
–50
5
–25
0
25
75
50
TEMPERATURE (°C)
V S = ±5V
T A = 25°C
RS = 0Ω
140
120
100
80
60
40
20
0
1k
10k
FREQUENCY (Hz)
100
8
6
4
0
125°C
10
1k
10k
FREQUENCY (Hz)
GAIN ERROR (%)
1.0
4
6
8
±SUPPLY VOLTAGE (V)
10
LT1189 • TPC06
Open-Loop Gain vs Temperature
16
VS = ±5V
VOUT = ±1V
AV = 10
RL = 1k
14
OPEN-LOOP GAIN (kV/V)
–1.4
VS/D = –VEE + 0.2V
2
0
100k
Gain Error vs Temperature
VS = ±5V
2.0
12
8
100
–1.2
3.0
25°C
2
Shutdown Supply Current vs
Temperature
VS/D = –VEE + 0.4V
–55°C
14
LT1189 • TPC05
5.0
125
Supply Current vs Supply Voltage
VS = ±5V
TA = 25°C
RS = 100k
10
6.0
100
16
10
100k
VS/D = –VEE + 0.6V
0
25
50
75
TEMPERATURE (°C)
LT1189 • TPC03
12
LT1189 • TPC04
4.0
V + = –1.8V TO –9V
1.0
V–
– 50 –25
125
SUPPLY CURRENT (mA)
200
100
2.0
1.5
Equivalent Input Noise Current vs
Frequency
EQUIVALENT INPUT NOISE CURRENT (pA/√Hz)
EQUIVALENT INPUT NOISE VOLTAGE (nV/√Hz)
Equivalent Input Noise Voltage vs
Frequency
10
–2.0
LT1189 • TPC02
LT1189 • TPC01
160
–1.0
–1.5
0.5
– 0.5
180
V + = 1.8V TO 9V
–0.5
COMMON-MODE RANGE (V)
INPUT BIAS CURRENT (nA)
INPUT BIAS CURRENT (µA)
2.5
SHUTDOWN SUPPLY CURRENT (mA)
Common-Mode Voltage vs
Temperature
Input Bias Current vs Temperature
–1.6
–1.8
–2.0
–2.2
VS = ±5V
VO = ±3V
RL = 1k
12
10
RL = 500Ω
8
6
4
2
VS/D = –VEE
0
–50
–25
0
25
75
50
TEMPERATURE (°C)
100
125
LT1189 • TPC07
–2.4
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
LT1189 • TPC08
0
–50 –25
25
75
0
50
TEMPERATURE (°C)
100
125
LT1189 • TPC09
5
LT1189
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Open-Loop Voltage Gain vs
Load Resistance
Gain, Phase vs Frequency
100
80
GAIN
40
40
20
20
0
0
PHASE MARGIN (DEG)
60
60
–20
–20
100k
1M
10M
FREQUENCY (Hz)
250
30
20
10
1k
LOAD RESISTANCE (Ω)
LT1189 • TPC11
85
25
75
0
50
TEMPERATURE (°C)
10
1
0.1
55
125
100
1k
10k
100k
1M
FREQUENCY (Hz)
+PSRR
–PSRR
20
0
–20
1k
10k
1M
100k
FREQUENCY (Hz)
10M
100M
LT1189 • TPC16
50
40
V+
– 0.7
VS = ±5V
OUTPUT SATURATION VOLTAGE (V)
40
OUTPUT SHORT CIRCUIT CURRENT (mA)
POWER SUPPLY REJECTION RATIO (dB)
60
60
1M
10M
FREQUENCY (Hz)
35
34
33
32
31
30
–50
–25
50
0
25
75
TEMPERATURE (°C)
100
125
LT1189 • TPC17
100M
LT1189 • TPC15
36
VS = ±5V
TA = 25°C
VRIPPLE = ±300mV
70
30
100k
100M
Output Short Circuit Current vs
Temperature
80
6
10M
VS = ±5V
TA = 25°C
RL = 1k
80
LT1189 • TPC14
LT1189 • TPC13
Power Supply Rejection Ratio vs
Frequency
10
90
COMMON-MODE REJECTION RATIO (dB)
OUTPUT IMPEDANCE (Ω )
GAIN BANDWIDTH PRODUCT (MHz)
65
PHASE MARGIN
–25
4
8
6
±SUPPLY VOLTAGE (V)
LT1189 • TPC12
100
PHASE MARGIN (DEG)
75
150
2
Common-Mode Rejection Ratio
vs Frequency
VS = ±5V
TA = 25°C
AV = 10
GAIN BANDWIDTH
PRODUCT
100
–50
0
10k
Output Impedance vs Frequency
VS = ±5V
R L = 1k
AV = 20dB
200
TA = 125°C
150
LT1189• TPC10
Gain Bandwidth Product and
Phase Margin vs Temperature
250
TA = 25°C
200
100
0
100
100M
TA = –55°C
AV = 20dB
VS = ±5V
VO = ±3V
TA = 25°C
GAIN BANDWIDTH PRODUCT (MHz)
PHASE
80
VOLTAGE GAIN (dB)
VS = ±5V
TA = 25°C
RL = 1k
OPEN-LOOP VOLTAGE GAIN (kV/V)
100
Gain Bandwidth Product vs
Supply Voltage
± Output Swing vs Supply Voltage
–0.8
125°C
–0.9
25°C
–1.0
–55°C
–1.1
0.5
RL = 1k
±1.8V ≤ VS ≤ ±9V
0.4
125°C
25°C
0.3
–55°C
0.2
0.1
V– 0
2
4
6
8
±SUPPLY VOLTAGE (V)
10
LT1189 • TPC18
LT1189
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Voltage Swing vs
Load Resistance
Slew Rate vs Temperature
5
300
VS = ±5V
TA = –55°C
TA = 25°C
SLEW RATE (V/µs)
OUTPUT VOLTAGE SWING (V)
–SLEW RATE
3
TA = 25°C
1
TA = –55°C
–1
TA = 25°C
–3
TA = 25°C
VS = ±5V
RL = 1k
VO = ±2V
AV = 10
–5
10
100
LOAD RESISTANCE (Ω)
+SLEW RATE
250
200
–50 –25
1000
0
25
50
75
TEMPERATURE (°C)
100
LT1189 • TPC19
LT1189 • TPC20
Harmonic Distortion vs
Output Level
Output Voltage Step vs
Settling Time, AV = 10
0
VS = ±5V
TA = 25°C
RL = 1k
10mV
0
10mV
–2
VS = ±5V
TA = 25°C
RL = 1k
f = 10MHz
AV = 10
–10
DISTORTION (dBc)
OUTPUT VOLTAGE STEP (V)
4
2
125
–20
HD3
–30
HD2
–40
–50
–4
100
–60
140
180
220
260
SETTLING TIME (ns)
300
340
0
3
1
2
OUTPUT VOLTAGE (VP-P)
LT1189 • TPC22
LT1189 • TPC21
Large-Signal Transient Reponse
4
Small-Signal Transient Reponse
AV = 10, RL = 1k, +SR = 223V/µs, –SR = 232V/µs
AV = 10, RL = 1k, tr = 9.40ns
LT1189 • TPC23
LT1189 • TPC24
7
LT1189
W
U
U
UO
APPLICATI
S I FOR ATIO
The primary use of the LT1189 is in converting high speed
differential signals to a single-ended output. The LT1189
video difference amplifier has two uncommitted high input
impedance (+) and (–) inputs. The amplifier has another
set of inputs which can be used for reference and feedback. Additionally, this set of inputs give gain adjust, and
DC control to the differential amplifier. The voltage gain of
the LT1189 is set like a conventional operational amplifier.
Feedback is applied to pin 8, and it is optimized for gains
of 10 or greater. The amplifier can be operated singleended by connecting either the (+) or (–) inputs to the
+/REF (pin 1). The voltage gain is set by the resistors:
(RFB + RG)/RG.
Like the single-ended case, the differential voltage gain is
set by the external resistors: (RFB + RG)/RG. The maximum
input differential signal for which the output will respond
is approximately ±170mV.
S/D
5
VIN
S/D
V+
3
7
+
2
– LT1189
1
+/REF
8
–/FB 4
6
V+
5
3
7
+
2
– LT1189
1
+/REF
8
–/FB 4
V IN
VOUT
V–
RFB
RG
AV = +
6
VOUT
RG
RG
AV = –
The LT1189 is quite tolerant of power supply bypassing.
In some applications a 0.1µF ceramic disc capacitor
placed 1/2 inch from the amplifier is all that is required. In
applications requiring good settling time, it is important to
use multiple bypass capacitors. A 0.1µF ceramic disc in
parallel with a 4.7µF tantalum is recommended.
Calculating the Output Offset Voltage
Both input stages contribute to the output offset voltage at
pin 6. The feedback correction forces balance in the input
stages by introducing an Input VOS at pin 8. The complete
expression for the output offset voltage is:
VOUT = (VOS + IOS(RS) + IB(RREF)) × (RFB + RG)/RG + IB(RFB)
RS represents the input source resistance, typically 75Ω,
and RREF represents finite source impedance from the
DC reference voltage, for VREF grounded, RREF = 0Ω the
IOS is normally a small contributor and the expression
simplifies to:
VOUT = VOS(RFB + RG)/RG + IB(RFB)
If RFB is limited to 1k, the last term of the equation
contributes only 2mV since IB is less than 2µA.
V–
RFB
RFB + RG
Power Supply Bypassing
RFB + RG
7 V+
RG
6
S/D
VIN DIFF
VIN
S/D
V+
5
3
7
+
2
– LT1189
1
+/REF
8
–/FB 4
6
V+
5
3
7
+
2
– LT1189
1
+/REF
8
–/FB 4
VIN DIFF
VOUT
V IN
RG
V–
RFB
RFB
6
Q1
VOUT
3
V–
RFB
+
RS
2
–
RS
Q2
RE
300
345µA
RG
VO = (VIN DIFF + VIN)
RFB + RG
RG
VO =
(
RFB + RG
RG
(V
IN DIFF –
RFB
( R (V
G
IN
Q3
+
1 REF
RREF
Q4
8
RG
RE
300
350µA
4 V–
LT1189 • AI01
Figure 1. Simplified Input Stage Schematic
8
LT1189 • AI02
LT1189
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APPLICATI
S I FOR ATIO
High Voltage Instrumentation Amplifier Response
Instrumentation Amplifier Rejects High Voltage
20
Instrumentation amplifiers are often used to process
slowly varying outputs from transducers. With the LT1189
it is easy to make an instrumentation amplifier that can
respond to rapidly varying signals. Attenuation resistors
in front of the LT1189 allow very large common-mode
signals to be rejected while maintaining good frequency
response. The input common-mode and differential-mode
signals are reduced by 100:1, while the closed-loop gain
is set to be 100, thereby maintaining unity-gain input to
output. The unique topology allows for frequency response boost by adding 150pF to pin 8 as shown.
VOLTAGE GAIN (dB)
0
DIFFERENTIAL-MODE RESPONSE
–20
–40
– 60
100k
COMMON-MODE RESPONSE
1M
10M
FREQUENCY (Hz)
100M
LT1189 • AI05
3.5MHz Instrumentation Amplifier Rejects 120VP-P
10k*
VIN
5V
100*
2
1
10k*
VCM
120VP-P
3
8
100*
7
–
FB
LT1189
6
4
–5V
10k
150pF
* 0.1% RESISTORS
WORST CASE CMRR = 48dB
+
REF
100Ω
Operating with Low Closed-Loop Gain
The LT1189 has been optimized for closed-loop gains of
10 or greater. The amplifier can be operated at much lower
closed-loop gains with the aid of a capacitor CFB across
the feedback resistor, (feedback zero). This capacitor
lowers the closed-loop 3dB bandwidth. The bandwidth
cannot be made arbitrarily low because CFB is a short at
high frequency and the amplifier will appear configured
unity-gain. As an approximate guideline, make BW × AVCL
= 200MHz. This expression expands to:
LT1189 • AI03
Output of Instrumentation Amplifier with 1MHz Square Wave
Riding on 120VP-P at the Input
A VCL
= 200MHz
2π(RFB )(C FB )
or:
C FB =
A VCL
(200MHz)(2π)(RFB )
The effect of the feedback zero on the transient and
frequency response is shown for AV = 4.
LT1189 • AI04
9
LT1189
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APPLICATI
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Closed-Loop Voltage Gain vs Frequency
CLOSED-LOOP VOLTAGE GAIN (dB)
30
Although it is possible to reduce the closed-loop bandwidth by using a feedback zero, instability can occur if the
bandwidth is made too low. An alternate technique is to do
differential filtering at the input of the amplifier. This
technique filters the differential input signal, and the
differential noise, but does not filter common-mode noise.
Common-mode noise is rejected by the LT1189’s CMRR.
CFB = 0pF
20
10
CFB = 5pF
0
–10
–20
100k
VS = ±5V
TA = 25°C
AV = 4
RFB = 900Ω
RG = 300Ω
1M
10M
FREQUENCY (Hz)
Reducing the Closed-Loop Bandwidth
10MHz Bandwidth Limited Amplifier
100M
R1
110Ω
LT1189 • AI06
SIG
Small-Signal Transient Response
eND
eNCM
5V
3
2
C1
68pF
1
8
+
7
–
LT1189
6
REF
4
FB
–5V
R2
110Ω
VOUT
909Ω
AV = 10
100Ω
f –3dB =
1
2π(R1 + R2)C1
VOUT =
SIG + eND eNCM
+
CMR
FILTER
LT1189 • AI09
Using the Shutdown Feature
AV = 4, RFB = 910Ω, RG = 300Ω
LT1189 • AI07
Small-Signal Transient Response
AV = 4, RFB = 910Ω, RG = 300Ω, CFB = 5pF
LT1189 • AI08
10
The LT1189 has a unique feature that allows the amplifier
to be shutdown for conserving power, or for multiplexing
several amplifiers onto a common cable. The amplifier will
shutdown by taking pin 5 to V –. In shutdown, the amplifier
dissipates 15mW while maintaining a true high impedance
output state of about 20kΩ in parallel with the feedback
resistors. For MUX applications, the amplifiers may be
configured inverting, non-inverting, or differential. When
the output is loaded with as little as 1kΩ from the amplifier’s
feedback resistors, the amplifier shuts off in 600ns. This
shutoff can be under the control of HC CMOS operating
between 0V and – 5V.
LT1189
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APPLICATI
S I FOR ATIO
1MHz Sine Wave Gated Off with Shutdown Pin
The ability to maintain shutoff is shown on the curve Shut
down Supply Current vs Temperature in the Typical Performance Characteristics section. At very high elevated
temperature it is important to hold the shutdown pin close
to the negative supply to keep the supply current from
increasing.
SHUTDOWN
VOUT
AV = 10, RFB = 900Ω, RG = 100Ω
LT1189 • AI10
UO
TYPICAL APPLICATI
Differential Receiver MUX for Power Down Applications
15k
1.5k
CABLE 1
3
2
15k
VDC 1 REF
8
FB
1.5k
CMOS IN
CHANNEL SELECT
5V
+
–
7
LT1189
6
4
5
1k
–5V
100Ω
1k
74HC04
74HC04
VOUT
1k
–5V
15k
CABLE 2
1.5k
15k
1.5k
3
+
2
–
VDC 1 REF
8
FB
5V
5
7
LT1189
4
–5V
1k
100Ω
6
1% RESISTORS WORST CASE CMRR = 28dB
TYPICALLY 35dB
LT1189 • TA03
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT1189
W
W
SI PLIFIED SCHE ATIC
7 V+
VBIAS
VBIAS
CM
+ 3
C FF
– 2
+V
6 VOUT
+V
*
4 V–
5
S/D
1 +/REF
8 –/FB
* SUBSTRATE DIODE, DO NOT FORWARD BIAS
LT1189 • SS
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
0.290 – 0.320
(7.366 – 8.128)
J8 Package
8-Lead Hermetic DIP
0.200
(5.080)
MAX
CORNER LEADS OPTION
(4 PLCS)
0.015 – 0.060
(0.381 – 1.524)
0.023 – 0.045
(0.58 – 1.14)
HALF LEAD
OPTION
0.008 – 0.018
(0.203 – 0.460)
0° – 15°
0.385 ± 0.025
(9.779 ± 0.635)
0.045 – 0.065
(1.14 – 1.65)
FULL LEAD
OPTION
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
8
6
7
5
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
2
3
4
0.125
3.175
0.100 ± 0.010 MIN
(2.540 ± 0.254)
0.400
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
8
7
6
5
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
0.405
(10.287)
MAX
1
0.045 – 0.065
(1.14 – 1.65)
0.014 – 0.026
(0.360 – 0.660)
N8 Package
8-Lead Plastic DIP
0.005
(0.127)
MIN
+0.025
0.325 –0.015
+0.635
8.255
–0.381
0.250 ± 0.010
(6.350 ± 0.254)
0.125
(3.175)
MIN
0.045 ± 0.015
(1.143 ± 0.381)
)
0.100 ± 0.010
(2.540 ± 0.254)
0.020
(0.508)
MIN
1
2
4
3
0.018 ± 0.003
(0.457 ± 0.076)
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
BSC
12
6
5
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157
(3.810 – 3.988)
1
Linear Technology Corporation
7
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
S8 Package
8-Lead Plastic SOIC
8
0.053 – 0.069
(1.346 – 1.752)
2
3
4
BA/LT/GP 0293 10K REV 0
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1993