### Chapter VII: Matching In-Amps Circuits to Modern ADCs

```Chapter VII
MATCHING IN-AMP CIRCUITS TO MODERN ADCs
The resolution of commercial ADCs is specified in bits.
In an ADC, the available resolution equals (2n) – 1, where
n is the number of bits. For example, an 8-bit converter
provides a resolution of (28) – 1, which equals 255. In this
case, the full-scale input range of the converter divided
by 255 will equal the smallest signal it can resolve. For
example, an 8-bit ADC with a 5 V full-scale input range
will have a limiting resolution of 19.6 mV.
In selecting an appropriate ADC to use, we need to find
a device that has a resolution better than the measurement resolution but, for economy’s sake, not a great
deal better.
Table 7-1 provides input resolution and full-scale input
range using an ADC with or without an in-amp preamplifier. Note that the system resolution specified in the figure
refers to that provided by the converter together with the
in-amp preamp (if used). Also, note that for any low level
measurement, not only are low noise semiconductor devices
needed, but also careful attention to component layout,
grounding, power supply bypassing, and often, the use of
balanced, shielded inputs.
For many applications, an 8-bit or 10-bit converter
is appropriate. The decision to use a high resolution
converter alone, or to use a gain stage ahead of a
lower resolution converter, depends on which is more
important: component cost, or parts count and ease
of assembly.
One very effective way to raise system resolution is to
amplify the signal first, to allow full use of the dynamic
converter will also increase noise. Therefore, it is often
useful to add low-pass filtering between the output of an
in-amp (or other gain stage) and the input of the converter.
Also, in most cases, the system bandwidth should not be
set higher than that required to accurately measure the
signal of interest. A good rule of thumb is to set the –3 dB
corner frequency of the low-pass filter at 10 to 20 times
the highest frequency that will be measured.
the circuit’s full-scale input range, but it will lower the
resolution requirements (and, therefore, the cost) of
For example, using an in-amp with a gain of 10 ahead of
an 8-bit, 5 V ADC will increase circuit resolution from
19.5 mV (5 V/256) to 1.95 mV. At the same time, the
full-scale input range of the circuit will be reduced to
500 mV (5 V/10).
Table 7-1. Typical System Resolutions vs. Converter Resolution and Preamp (IA) Gain
Converter Type
(2n) – 1
Converter Resolution
System
mV/Bit
In-Amp
FS Range Resolution
(5 V/((2n) – 1)) Gain
(V p-p)
(mV p-p)
10-Bit
10-Bit
10-Bit
10-Bit
12-Bit
12-Bit
12-Bit
12-Bit
14-Bit
14-Bit
14-Bit
14-Bit
16-Bit
16-Bit
16-Bit
16-Bit
4.9 mV
4.9 mV
4.9 mV
4.9 mV
1.2 mV
1.2 mV
1.2 mV
1.2 mV
0.305 mV
0.305 mV
0.305 mV
0.305 mV
0.076 mV
0.076 mV
0.076 mV
0.076 mV
1023
1023
1023
1023
4095
4095
4095
4095
16,383
16,383
16,383
16,383
65,535
65,535
65,535
65,535
1
2
5
10
1
2
5
10
1
2
5
10
1
2
5
10
7-1
5
2.5
1
0.5
5
2.5
1
0.5
5
2.5
1
0.5
5
2.5
1
0.5
4.9
2.45
0.98
0.49
1.2
0.6
0.24
0.12
0.305
0.153
0.061
0.031
0.076
0.038
0.015
0.008
Table 7-2 shows recommended ADCs for use with the latest generation of ADI in-amps.
Small Signal BW:
Noise (eNI):
VOS:
In-Amp Gain:
Maximum Output
Voltage Swing:
CMR:
Nonlinearity:
Supply Voltage:
Supply Current:
0.01% Settling Time
for 5 V Step:
0.001% Settling Time
for 5 V Step:
562 kHz
8 nV/√Hz
60 V max
10
Small Signal BW:
Noise (eNI): VOS:
In-Amp Gain: Maximum Output
Voltage Swing: CMR: Nonlinearity: Supply Voltage:
Supply Current: 0.01% Settling Time
for 5 V Step: 800 kHz
9 nV/√Hz
125 V max
10
3.9 V
90 dB (dc to 60 Hz)
10 ppm max
5 V
1 mA max
5 s
6 s
Resolution:
16 bits
Input Range:
0 V to 5 V
Sampling Rate:
Up to 250 kSPS
S/D Supply:
3 V or 5 V
Power:
1.7 mW @ 2.5 V and
6 mW typ @ 5 V
Same package, the AD7685 can be driven through a simple RC from the AD8221 directly. The REF pin can be driven to fit the ADC range.
Resolution:
12 bits
Input Range:
0 V to VDD
Sampling Rate:
555 kSPS/100 kSPS
S/D Supply:
3 V or 5 V
Power:
0.3 mA @ 100 kSPS
Single channel, pseudo
differential inputs in a
SOT-23 package
7-2
3.9 V
73 dB (dc to 60 Hz)
40 ppm max
5 V
1.3 mA max
7 s
Resolution:
16 bits
Input Range:
Multiple, such as 10 V,
5 V, ...
Sampling Rate:
Up to 250 kSPS
S/D Supply:
5V
Power:
2.7 mA @ 100 kSPS
Allow more and larger
input ranges
Resolution:
12 bits
Input Range:
Multiple, such as 10 V, 2.5 V, 0 V to 2.5 V
Sampling Rate:
200 kSPS
S/D Supply:
5V
Power:
2.2 mA @ 100 kSPS
Allows a bipolar or unipolar input with a single supply
In-Amps (continued)
Small Signal BW:
Noise (eNI):
VOS:
In-Amp Gain:
Maximum Output
Voltage Swing: CMR: Nonlinearity: Supply Voltage: Supply Current:
0.01% Settling Time
for 5 V Step:
0.001% Settling Time
for 5 V Step:
900 kHz
8 nV/√Hz
125 V max
5
Resolution:
12 bits
Input Range:
0 V to VREF V or 0 V to
2  VREF V
Sampling Rate:
S/D Supply:
Single, 2.7 V to 5.25 V
Power:
24 mW max at 1 MSPS with 5 V supply 11.4 mW max at
1 MSPS with 3 V supply
Dual, 2-channel, simultaneous sampling ADC with a serial interface
4 V
90 dB (dc to 60 Hz)
10 ppm max
5 V
1.2 mA max
3.2 s
Resolution:
12 bits
Input Range:
0 V to +2.5 V, 0 V to +5 V,
2.5 V, 5 V, 10 V
Sampling Rate:
600 kSPS for one channel
S/D Supply:
Single, 5 V
Power:
90 mW typ
4-channel, simultaneous sampling ADC with a
parallel interface
4 s
Resolution:
16 bits
Input Range:
0 V to 2.5 V
Sampling Rate:
Up to 100 kSPS
S/D Supply:
5V
Power:
8 mA @ 100 kSPS with
reference
Provide a reference voltage
Resolution:
14 bits
Input Range:
0 V to +2.5 V, 0 V to +5 V,
2.5 V, 5 V, 10 V
Sampling Rate:
175 kSPS for both channels/
360 kSPS for one channel, respectively
S/D Supply:
Single, 5 V
Power:
70 mW typ/115 mV typ,
respectively
2-/4-channel, respectively, simultaneous sampling ADC with a parallel interface
Resolution:
14 bits
Input Range:
0 V to VDD
Sampling Rate:
100 kSPS
S/D Supply:
3 V or 5 V
Power:
0.83 mA @ 100 kSPS
Single channel in an SOT-23
Small Signal BW:
Noise (eNI):
VOS:
In-Amp Gain: Maximum Output
Voltage Swing:
CMR:
Nonlinearity:
Supply Voltage: Supply Current:
0.01% Settling Time
for 5 V Step:
100 kHz
35 nV/√Hz
200 V max
10
Resolution:
12 bits
Input Range:
0 V to +2.5 V, 0 V to
+4.096 V, 0 V to +5 V,
2.5 V, 5 V10 V
Sampling Rate:
117/500/600 kSPS, respectively
S/D Supply:
Single, 5 V
Power:
30/85/60 mW typ, respectively
8-/8-/1-channel, respectively
4.5 V
90 dB (dc to 60 Hz)
50 ppm typ
5 V
0.55 mA max
20 s
7-3
In-Amps (continued)
Small Signal BW:
Noise (eNI):
VOS:
In-Amp Gain: Maximum Output
Voltage Swing: CMR: Nonlinearity: Supply Voltage: Supply Current: 0.01% Settling Time
for 5 V Step: 30 kHz
38 nV/√Hz
200 V max
10
4.9 V
77 dB (dc to 60 Hz)
100 ppm max
5 V
85 A max
135 s
Resolution:
12 bits
Input Range:
0 V to VREF or 0 V to
2  VREF
Sampling Rate:
200 kSPS
S/D Supply:
Single, 2.7 V to 5.25 V
Power:
3.6 mW max @ 200 kSPS with a 3 V supply
respectively, with a serial interface and channel
sequencer
Small Signal BW: Noise (eNI): VOS: In-Amp Gain: Maximum Output
Voltage Swing: CMRR: Nonlinearity: Supply Voltage: Supply Current: 0.01% Settling Time
for 5 V step: 1000 kHz
15 nV/√Hz
1 mV max
10
64.8 V
110 dB (dc to 60 Hz)
10 ppm max
Dual, 65 V
1 mA max
5 ms
Resolution: 16 bits
62.5 V, 65 V, 610 V
Input Range: Sampling Rate:
65 V to 615 V and 5 V
Resolution:
12 bits
Input Range:
0 to VDD
Sampling Rate:
250 kSPS
S/D Supply:
2.35 V or 5.25 V
Power:
3 mW typ @ 250 kSPS with 3 V supply
7-4
Resolution:
13 bits
62.5 V, 65 V, 610 V
Input Range:
Sampling Rate:
500 kSPS
65 V to 615 V and +5 V
S/D Supply:
Power:
17 mW max at 0.5 MSPS with 615 V, and 5 V supply
Resolution:
12 bits
62.5 V
Input Range:
Sampling Rate:
220 kSPS
S/D Supply:
5V
Power:
22.5 mW max at 220 kSPS with 5 V supply
In-Amps (continued)
Zero Drift In-Amp
High Speed Programmable Gain In-Amp
Small Signal BW: Noise (eNI): VOS: In-Amp Gain: Maximum Output
Voltage Swing: CMRR: Nonlinearity: Supply Voltage: Supply Current: 2 kHz
240 nV/√Hz
10 mV max
10
Small Signal BW: Noise (eNI): VOS: In-Amp Gain: Maximum Output
Voltage Swing: CMRR: Nonlinearity: Supply Voltage: Supply Current: 0.01% Settling Time
for 5 V step: 64.7 V
120 dB (dc to 60 Hz)
20 ppm max
65 V
3.5 mA max
Resolution: 14 bits
Input Range: 5V
Sampling Rate: 250 kSPS
S/D Supply: 2.7 V to 5.25 V
Power: 1.25 mW, 2.5 V supply
10 MHz
13 nV/√Hz
100 mV
10
VCC – 1.2 V, VCC + 1.2 V
100 dB (dc to 60 Hz)
40 ppm max
Dual, 65 V to 612 V
3 mA typ
0.5 ms
Resolution: 16 bits
Input Range: 5V
Sampling Rate: 250 kSPS
S/D Supply: Single, 2.5 V to 5 V
Power: 4 mW at 0.1 kSPS, 5 V supply
Resolution: 13 bits
62.5 V
Input Range: Sampling Rate: 500 kSPS
65 V to 615 V,
S/D Supply: 2.7 V to 5.25 V
Power: 17 mW max at 500 kSPS with 615 V, 5 V supply
Resolution: 13 bits/12 bits
62.5 V
Input Range: Sampling Rate: 0.5 MSPS
65 V to 615 V, single, 5 V
S/D Supply: Power: 17 mW max at 500 kSPS with 615 V, 5 V supply
NOTE: Specifications are preliminary. Refer to www.analog.com.
7-5
In-Amps (continued)
Small Signal BW: Noise (eNI): VOS: In-Amp Gain: Maximum Output
Voltage Swing: CMRR: Nonlinearity: Supply Voltage: Supply Current: 1 kHz
150 nV/√Hz
50 mV max
10
Small Signal BW: Noise (eNI): VOS: In-Amp Gain: Maximum Output
Voltage Swing: CMRR: Nonlinearity: Supply Voltage: Supply Current: 0.1% Settling Time
for 4 V step: 150 kHz
32 nV√Hz
10 mV max
10
0.075 V to 4.925 V
120 dB (dc to 60 Hz)
600 ppm max
Single, 5 V
1.3 mA max
Resolution:
12 bits
Input Range: 0 to VDD
Sampling Rate: 1 MSPS
S/D Supply: 2.35 V to 5.25 V
Power: 3.6 mW max at 1 MSPS with 3 V supply
15 mW max at 1 MSPS
with 5 V supply
30 mV to 4.94 V
100 dB (G = 70, dc
to 200 Hz)
1000 ppm typ
Single, 5 V
2.5 mA max
8 ms
Resolution: 16 bits
Input Range: 5V
Sampling Rate: 250 kSPS
S/D Supply: Single, 2.5 V to 5 V
Power: 4 mW at 0.1 SPS with
5 V supply
Resolution: 12 bits
Input Range: 0 to VDD
Sampling Rate:
100 kSPS
S/D Supply: 1.6 V to 3.6 V
Power: 0.62 mW max at 100 kSPS with 3 V supply
0.12 mW max at 100 kSPS with 1.6 V supply
Resolution: 12 bits
Input Range: 0 to VDD
Sampling Rate: 1 MSPS
S/D Supply: 2.35 V to 5.25 V
Power: 3.6 mW max at 1 MSPS with 3 V supply
15 mW max at 1 MSPS
with 5 V supply
Resolution: 12 bits
Input Range: 0 to VDD
Sampling Rate: 1 MSPS
S/D Supply: 2.7 V to 5.25 V
Power: 3.6 mW max at 1 MSPS with 3 V supply
12.5 mW max at 1 MSPS with 5 V supply
7-6
PIXEL
#2
PIXEL
#1
PIXEL LEVEL
REFERENCE
LEVEL
INSTRUMENTATION
AMPLIFIER
PIXEL LEVEL
INPUT
NEED 12-BIT
SAMPLEAND-HOLD ACCURACY
@1MHz
REFERENCE
LEVEL INPUT
2MHz
500ns
DC
CORRECTED
OUTPUT
ETC.
TOTAL SETTLING TIME FOR SAMPLE-AND-HOLD
AND IN-AMP MUST BE LESS THAN 500ns
Figure 7-1. In-amp buffers ADC and provides dc correction.
High Speed Data Acquisition
As the speed and accuracy of modern data acquisition systems have increased, a growing need for high
bandwidth instrumentation amplifiers has developed—
particularly in the field of CCD imaging equipment
where offset correction and input buffering are required.
Here, double-correlated sampling techniques are often
used for offset correction of the CCD imager. As shown
in Figure 7-1, two sample-and-hold amplifiers monitor the pixel and reference levels, and a dc-corrected
output is provided by feeding their signals into an
instrumentation amplifier.
Figure 7-2 shows how a single multiplexed high
bandwidth in-amp can replace several slow speed
nonmultiplexed buffers. The system benefits from
the common-mode noise reduction and subsequent
increase in dynamic range provided by the in-amp.
HIGH SPEED IA
SIGNAL
INPUTS
MUX
SIGNAL
INPUTS
MUX
ETC.
Figure 7-2. Single high speed in-amp and
mux replace several slow speed buffers.
Previously, the low bandwidths of commonly available
instrumentation amplifiers, plus their inability to
drive 50  loads, restricted their use to low frequency
applications—generally below 1 MHz. Some higher
bandwidth amplifiers have been available, but these
have been fixed-gain types with internal resistors. With
noninverting terminals of the amplifier. Using modern
op amps and employing the complementary bipolar
(CB) process, video bandwidth instrumentation amplifiers that offer both high bandwidths and impressive dc
specifications may now be constructed. Common-mode
rejection may be optimized by trimming or by using
low cost resistor arrays.
7-7
The bandwidth and settling time requirements demanded of an in-amp buffering an ADC, and for the
sample-and-hold function preceding it, can be quite
severe. The input buffer must pass the signal along
fast enough so that the signal is fully settled before
the ADC takes its next sample. At least two samples
per cycle are required for an ADC to unambiguously
process an input signal (FS/2)—this is referred to as
the Nyquist criteria. Therefore, a 2 MHz ADC, such as
the AD7266 or AD7322, requires that the input buffer/sample-and-hold sections preceding it provide
12-bit accuracy at a 1 MHz bandwidth. Settling time
is equally important: the sampling rate of an ADC is
the inverse of its sampling frequency—for the 2 MHz
ADC, the sampling rate is 500 ns. This means that
for a total throughput rate of less than 1 s, these
same input buffer/sample-and-hold sections must
have a total settling time of less than 500 ns.
and high speed at moderate gains. Circuit gain is set by
resistor RG where gain = 1 + 2 R F /RG. The R F resistors
should be kept at around 1 k to ensure maximum
bandwidth. Operating at a gain of 10 (using a 222 
resistor for RG ) the –3 dB bandwidth of this circuit
is approximately 3.4 MHz. The ac common-mode
rejection ratio (gain of 10, 1 V p-p common-mode
signal applied to the inputs) is 60 dB from 1 Hz
to 200 kHz and 43 dB at 2 MHz. And it provides
better than 46 dB CMRR from 4 MHz to 7 MHz.
The RFI rejection characteristics of this amplifier are
also excellent—the change in dc offset voltage vs.
common-mode frequency is better than 80 dB from
1 Hz up to 15 MHz. Quiescent supply current for this
circuit is 15 mA.
A High Speed In-Amp Circuit for Data Acquisition
This circuit can be used to drive a modern, high speed
very high speed data acquisition. The AD830 can also
be used for many high speed applications.
Figure 7-3 shows a discrete in-amp circuit using two
AD825 op amps and an AMP03 differential (subtractor)
amplifier. This design provides both high performance
For lower speed applications requiring a low input
current device, the AD823 FET input op amp can be
+VS 0.01MF
–VIN
VOUT
0.01MF
–IN
RF
25k6
2
25k6
7
+VIN
RG
222k6
RF
1k6
AMP03
6
0.01MF
SENSE
1k6
–VS
+VS
5
4
+IN
3
25k6
25k6
1
+VS
OUTPUT
–VS
REF
0.01MF
–VS
* REFER TO ANALOG DEVICES WEBSITE AT WWW.ANALOG.COM FOR THE LATEST OP AMP
PRODUCTS AND SPECIFICATIONS.
Figure 7-3. A High performance, high speed in-amp circuit.
7-8