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INCH-POUND
MIL-M-38510/125B
11 August 2005
SUPERSEDING
MIL-M-38510/125A
15 October 2003
MILITARY SPECIFICATION
MICROCIRCUITS, LINEAR, SAMPLE AND HOLD CIRCUITS, MONOLITHIC SILICON
Reactivated for new design as of 15 October 2003. May be used for either new or existing design acquisition.
This specification is approved for use by all Departments and Agencies of the Department of Defense.
The requirements for acquiring the product herein shall consist of this specification sheet and MIL-PRF-38535.
1. SCOPE
1.1 Scope. This specification covers the detail requirements for monolithic silicon, sample and hold circuits. Two
product assurance classes and a choice of case outlines and lead finishes are provided and are reflected in the
complete part number. For this product, the requirements of MIL-M-38510 have been superseded by MIL-PRF38535, (see 6.4)
1.2 Part or identifying Number (PIN). The PIN is in accordance with MIL-PRF-38535, and as specified herein.
1.2.1 Device types. The device types are as follows:
Device type
01
02
Circuit
Sample and hold circuits, 10 kΩ load
Sample and hold circuits, 2 kΩ load
1.2.2 Device class. The device class is the product assurance level as defined in MIL-PRF-38535.
1.2.3 Case outline. The case outline is as designated in MIL-STD-1835 and as follows:
Outline letter
G
P
Descriptive designator
MACY1-X8
GDIP1-T8 or CDIP2-T8
Terminals
8
8
Package style
Can
Dual-in-line
Comments, suggestions, or questions on this document should be addressed to: Commander, Defense
Supply Center Columbus, ATTN: DSCC-VAS, 3990 East Broad St., Columbus, OH 43218-3990, or emailed
to [email protected] Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at http://assist.daps.dla.mil.
AMSC N/A
FSC 5962
MIL-M-38510/125B
1.3 Absolute maximum ratings.
Supply voltage range .......................................................................
Input voltage range ..........................................................................
Logic to logic reference differential voltage ......................................
Storage temperature range ..............................................................
Output short-circuit duration .............................................................
Lead temperature (soldering, 60 seconds) ......................................
Junction temperature (TJ) ................................................................
Hold capacitor short circuit duration .................................................
±18 V
±18 V 1/
+7 V, -30 V
-65°C to +150°C
Unlimited 2/
+300°C
+175°C 3/
10 seconds
1.4 Recommended operating conditions.
Supply voltage range ....................................................................... ±5 V to ±15 V
Ambient operating temperature range (TA) ...................................... -55°C to +125°C
Hold capacitor type .......................................................................... Teflon 4/
1.5
Power and thermal characteristics.
Case outlines
Maximum allowable power
dissipation
Maximum
Maximum
θJC
θJA
G
330 mW at TA = +125°C
40°C/W
150°C/W
P
400 mW at TA = +125°C
35°C/W
120°C/W
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications and standards form a part of this
specification to the extent specified herein. Unless otherwise specified, the issues of these documents are those
cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-38535
- Integrated Circuits (Microcircuits) Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883
MIL-STD-1835
- Test Method Standard for Microelectronics.
- Interface Standard Electronic Component Case Outlines.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or
http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,
Philadelphia, PA 19111-5094.)
______
1/ The absolute maximum input voltage shall not exceed the power supply voltages.
2/ Short circuit may be to ground or either supply. Rating applies to +125°C case temperature or +75°C
ambient temperature.
3/ For short term test (in the specific burn-in and life test configuration when required and up to 168 hours
maximum), TJ = 275°C.
4/ Sample and hold performance is highly dependent on having a quality “hold” capacitor with low dielectric
absorption over –55°C ≤ TA ≤ 125°C.
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MIL-M-38510/125B
2.3 Order of precedence. In the event of a conflict between the text of this specification and the references cited
herein the text of this document shall take precedence. Nothing in this document, however, supersedes applicable
laws and regulations unless a specific exemption has been obtained.
3. REQUIREMENTS
3.1 Qualification. Microcircuits furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list before
contract award (see 4.3 and 6.3).
3.2 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535 and as
specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the
QM plan shall not affect the form, fit, or function as described herein.
3.3 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535 and herein.
3.3.1 Terminal connections and logic diagram. The terminal connections and logic diagram shall be as specified
on figure 1.
3.3.2 Schematic circuits. The schematic circuits shall be maintained by the manufacturer and made available to
the qualifying activity and the preparing activity upon request.
3.3.3 Case outlines. The case outlines shall be as specified in 1.2.3.
3.4 Lead material and finish. The lead material and finish shall be in accordance with MIL-PRF-38535 (see 6.6).
3.5 Electrical performance characteristics. The electrical performance characteristics are as specified in table I,
and unless otherwise specified, apply over the full recommended ambient operating temperature range for supply
voltages from ±5 V to ±18 V. Unless otherwise specified, the device is in the “sample” mode with CH = 0.01 µF.
With ±15 V supplies, the input voltage range is from –11.5 V to +11.5 V. The logic reference voltage is 0 V and the
logic voltage for “sample” mode is 2.5 V. Specific test conditions and limits are shown in table III.
3.5.1 Offset null circuits. The nulling inputs shall be capable of being nulled 1 mV beyond the specified offset
voltage limits for –55°C ≤ TA ≤ 125°C using the circuit of figure 2.
3.5.2 Instability oscillations. The devices shall be free of oscillations when operated in the test circuits
of this specification.
3.6 Electrical test requirements. Electrical test requirements for each device class shall be the subgroups
specified in table II. The electrical tests for each subgroup are described in table III.
3.7 Marking. Marking shall be in accordance with MIL-PRF-38535.
3.8 Microcircuit group assignment. The devices covered by this specification shall be in microcircuit group
number 60 (see MIL-PRF-38535, appendix A).
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MIL-M-38510/125B
TABLE I. Electrical performance characteristics.
Conditions
Test
Symbol
-55°C ≤ TA ≤ +125°C
±VCC = ±15 V,
Device
type
see figure 3 and 3.5
unless otherwise specified
Input offset voltage 1/
VIO
±VCC = ±5 V to ±15 V, TA = +25°C
01,02
±VCC = ±5 V to ±15 V,
Limits
Unit
Min
Max
-3
3
-5
5
-20
20
-20
20
-1
25
-25
75
mV
-55°C ≤ TA ≤ +125°C
Input offset voltage
temperature sensitivity
Input bias current
1/
∆VIO /
TA = -55°C to +25°C
∆T
TA = +25°C to +125°C
IIB
±VCC = ±5 V to ±15 V, TA = +25°C
01,02
01,02
±VCC = ±5 V to ±15 V,
µV/°C
nA
-55°C ≤ TA ≤ +125°C
Input impedance 2/
ZI
01,02
TA = +25°C
AE
VIN = -11.5 V to +11.5 V, RL = 10 kΩ,
GΩ
1
-55°C ≤ TA ≤ +125°C
Gain error
2
01,02
-.005
+.005
-0.02
+0.02
-.005
+.005
-0.02
+0.02
-0.02
+0.02
-0.04
+0.04
%
TA = +25°C
VIN = -11.5 V to +11.5 V, RL = 10 kΩ,
-55°C ≤ TA ≤ +125°C
VIN = -10 V to +10 V, RL = 2 kΩ,
02
TA = +25°C
VIN = -10 V to +10 V, RL = 2 kΩ,
-55°C ≤ TA ≤ +125°C
VCC = ±5 V, RL = 10 kΩ,
01,02
VIN = -2 V to +2 V, TA = +25°C
VCC = ±5 V, VIN = -2 V to +2 V,
RL = 10 kΩ, -55°C ≤ TA ≤ +125°C
Input offset voltage
adjustment
VIO
VIN = 0 V, VOFFSET ADJ at +VCC
01,02
+6
mV
(ADJ+)
-6
VIO
VIN = 0 V,
(ADJ-)
VOFFSET ADJ at 1 kΩ from +VCC,
20 kΩ from 0 V
See footnotes at end of table.
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MIL-M-38510/125B
TABLE I. Electrical performance characteristics – Continued.
Conditions
Test
Symbol
Power supply rejection
ratio
+PSRR
-55°C ≤ TA ≤ +125°C
±VCC = ±15 V,
see figure 3 and 3.5
unless otherwise specified
+VCC = +12 V to +18 V,
Device
type
Limits
Min
01,02
Unit
Max
80
dB
-VCC = -18 V, VIN = 0 V
-PSRR
80
+VCC = +18 V, VIN = 0 V
-VCC = -12 V to -18 V
Feedthrough rejection 3/
ratio
FRR
VIN = ±11.5 V, hold mode, see figure 4,
01,02
86
dB
TA = +25°C
80
VIN = ±11.5 V, hold mode, see figure 4,
-55°C ≤ TA ≤ +125°C
FRRac
86
VIN = 20 VPP at 1 kHz, TA = +25°C
hold mode, see figure 5
Series charge
resistance
4/
RSC
VIN = 0 V to 0.4 V;
400
Ω
2
Ω
-2
2
mV
-5
5
01
1
6.5
02
1
7.0
01
1
5.5
02
1
6.0
01,02
0
10
µA
01,02
-1
1
µA
01,02
75
measure current change to ground at
HOLD CAPACITOR terminal pin
Output impedance
ZO
VHOLD CAP. = VHC = 0 V,
01,02
hold mode, see figure 6,
IO = ±1 mA
“Hold” step voltage
5/
VHS
VLOGIC = 4 V, tr ≤ 50 ns, see figure 7,
01,02
VOUT = ±11.5 V, TA = +25°C
VLOGIC = 4 V, tr ≤ 50 ns, see figure 7,
VOUT = ±11.5 V, -55°C ≤ TA ≤ +125°C
Supply current
ICC
TA = -55°C
+25°C ≤ TA ≤ +125°C
Logic input current (high)
IIH
VLOGIC = 5.5 V, +VCC = 8.5 V,
mA
-VCC = -21.5 V
Logic input current (low)
IIL
VLOGIC = 0 V, +VCC = 21.5 V,
-VCC = -8.5 V
See footnotes at end of table.
5
MIL-M-38510/125B
TABLE I. Electrical performance characteristics – Continued.
Conditions
Test
Output short circuit current
(positive output)
Output short circuit current
(negative output)
Hold mode leakage current
(positive output)
Symbol
IOS(+)
IOS(-)
IHL(+) 6/
-55°C ≤ TA ≤ +125°C
±VCC = ±15 V,
Device
type
Limits
see figure 3 and 3.5
unless otherwise specified
VIN = 10 V, t ≤ 25 ms,
01
-25
short circuit to 0 V
02
-30
VIN = -10 V, t ≤ 25 ms,
01
25
short circuit to 0 V
02
30
VIN = 0 V, +VCC = 3.5 V, TA = +25°C,
Min
Unit
01,02
Max
mA
mA
-100
100
pA
-50
50
nA
-100
100
pA
-50
50
nA
-3
mA
-VCC = -26.5 V, see figure 8
VIN = 0 V, +VCC = 3.5 V, TA = +125°C,
-VCC = -26.5 V, see figure 8
Hold mode leakage current
(negative output)
IHL(-)
6/
VIN = 0 V, +VCC = 26.5 V, TA = +25°C,
01,02
-VCC = -3.5 V, see figure 8
VIN = 0 V, +VCC = 26.5 V, TA = +125°C,
-VCC = -3.5 V, see figure 8
Hold capacitor charge
current (positive output)
ICH(+)
VIN = 11.5 V, VHC = 9.5 V, TA = +25°C
01,02
-2
VIN = 11.5 V, VHC = 9.5 V,
-55°C ≤ TA ≤ +125°C
Hold capacitor charge
current (negative output)
ICH(-)
VIN = -11.5 V, VHC = -9.5 V, TA = +25°C
01,02
3
mA
2
VIN = 11.5 V, VHC = 9.5 V,
-55°C ≤ TA ≤ +125°C
Differential logic threshold
VTH(H)
VIN = -2 V, VLOGIC = 2 V
01,02
2
V
01,02
25
µs
01,02
300
ns
(check for IHOLD CAP ≥ 1 mA)
VTH(L)
0.8
VIN = -2 V, VLOGIC = 0.8 V
(check for IHOLD CAP ≤ 10 µA)
Acquisition time
(0.1 % error)
taq 7/
VIN = 0 V to 10 V,
10 V to 0 V, 0 V to –10 V,
-10 V to 0 V, CL = 100 pF,
TA = +25°C, see figures 9 to 11
Aperture time
tap 8/
VIN = 0 V to +10 V,
10 V to 0 V, 0 V to –10 V,
-10 V to 0 V, VO ≤ 1 mV,
TA = +25°C, see figures 12 to 15
See footnotes at end of table.
6
MIL-M-38510/125B
TABLE I. Electrical performance characteristics – Continued.
Conditions
Test
Transient response 9/
(settling time)
Symbol
TR(ts)
-55°C ≤ TA ≤ +125°C
±VCC = ±15 V,
see figure 7 and 3.5
unless otherwise specified
VIN = 100 mV step, TA = +25°C,
Device
type
Limits
Min
Unit
Max
01,02
2.5
µs
01,02
40
%
01,02
10
µVrms
01,02
1.5
µs
CH = 1000 pF, RL = 10 kΩ,
CL = 100 pF, see figure 16,
to 10% of final value,
Transient response 9/
(overshoot)
TR(os)
VIN = 100 mV step, TA = +25°C,
CH = 1000 pF, RL = 10 kΩ,
CL = 100 pF, see figure 16
Noise
en(H)
en(S)
Hold mode, sample mode
10 Hz to 10 kHz,
see figure 17, TA = +25°C
Settling time
tS
VIN = 0 V, VO ≤ 1 mV,
hold mode, see figure 18, TA = +25°C
1/
This parameter is specified at VCM = 0 V, -11.5 V, and +11.5 V with ±VCC = ±15 V, and at VCM = -2 V and +2 V with
±VCC = ±5 V.
2/
Input impedance is calculated from the VIO and IIB common mode voltage end-point range data.
3/
Feedthrough rejection ratio is very sensitive to stray capacitance between the signal INPUT (pin 3 ) and HOLD
CAPACITOR (pin 6). For instance 0.5 pF of external coupling with a .01 µF hold capacitor would equal the
specification limit of the device.
4
(For example: FRR = 20 log ((0.01 µF) / 0.5 pF) = 20 log (2 x 10 ) = 86 dB).
4/
Series charge resistance along with input signal slew rate and an external hold capacitor determine the
dynamic sampling error of the device in its application (for example; DSE = K x RSC x SR where K is a
proportionality constant).
5/
The external hold capacitor should be either Teflon or polystyrene so that dielectric absorption is minimized.
This will insure that excessive “sag back” after capacitor “sample” mode charging does not occur. “Hold” step
is sensitive to stray capacitance coupling between input logic signals and the “hold” capacitor.
6/
Hold mode leakage current is actually JFET junction leakage current which doubles (approximately) for each
10°C increase in junction temperature. Measurement at –55°C is not necessary since expected values are too
small for typical test systems.
7/
Acquisition time at 125°C typically increases from 20 % to 100 % above the 25°C value.
8/
Aperture time at 125°C typically increases 110 % above the 25°C value.
9/
Transient response shall be measured at the common mode voltage limits (for example, VCM = -11.5 V and
+11.5 V). Any high frequency ringing shall be over within 1 microsecond. After its peak the major loop
response shall be without further oscillations.
7
MIL-M-38510/125B
TABLE II. Electrical test requirements.
Subgroups (see table III)
Class S
Class B
devices
devices
MIL-PRF-38535
test requirements
Interim electrical parameters
1
1
Final electrical test parameters
1*, 2, 3
1*, 2, 3
Group A test requirements
1, 2, 3, 7, 8
1, 2, 3, 7, 8
Group B electrical test parameters when
using the method 5005 QCI option
Group C end-point electrical
parameters
Group D end-point electrical
parameters
1, 2, 3 and
table IV delta
limits
1, 2, 3 and
table IV delta
limits
1, 2, 3
N/A
1 and table IV
delta limits
1
*PDA applies to subgroup 1.
4. VERIFICATION.
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or
as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not
affect the form, fit, or function as described herein.
4.2 Screening. Screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior
to qualification and quality conformance inspection. The following additional criteria shall apply:
a.
The burn-in test duration, test condition, and test temperature, or approved alternatives shall be as specified
in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be
maintained under document control by the device manufacturer's Technology Review Board (TRB) in
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon
request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in
accordance with the intent specified in test method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table II, except interim electrical
parameters test prior to burn-in is optional at the discretion of the manufacturer.
c.
Additional screening for space level product shall be as specified in MIL-PRF-38535. Reverse bias
burn-in shall apply to class S devices only.
NOTE: If accelerated high-temperature test conditions are used (condition F), the device manufacturer shall
ensure that at least 85 percent of the applied voltage is dropped across the device at temperature.
The device is not considered functional under accelerated test conditions.
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MIL-M-38510/125B
4.3 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-38535.
4.4 Technology Conformance inspection (TCI). Technology conformance inspection shall be in accordance with
MIL-PRF-38535 and herein for groups A, B, C, and D inspections (see 4.4.1 through 4.4.4).
4.4.1 Group A inspection. Group A inspection shall be in accordance with table III of MIL-PRF-38535 and as
follows:
a.
Tests shall be as specified in table II herein.
b.
Subgroups 4, 5, 6, 9, 10, and 11 shall be omitted.
4.4.2 Group B inspection. Group B inspection shall be in accordance with table II of MIL-PRF-38535.
4.4.3 Group C inspection. Group C inspection shall be in accordance with table IV of MIL-PRF-38535 and as
follows:
a.
End point electrical parameters shall be as specified in table II herein.
b.
The steady-state life test duration, test condition, and test temperature, or approved alternatives shall be as
specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit
shall be maintained under document control by the device manufacturer's Technology Review Board (TRB)
in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon
request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in
accordance with the intent specified in test method 1005 of MIL-STD-883.
4.4.4 Group D inspection. Group D inspection shall be in accordance with table V of MIL-PRF-38535. End point
electrical parameters shall be as specified in table II herein.
4.5 Methods of inspection. Methods of inspection shall be specified and as follows.
4.5.1 Voltage and current. All voltage values given, except the input offset voltage (or differential voltage) are
referenced to the external zero reference level of the supply voltage. Currents given are conventional and positive
when flowing into the referenced terminal.
9
MIL-M-38510/125B
Figure 1. Terminal connections and logic diagram.
10
MIL-M-38510/125B
Figure 1. Terminal connections and logic diagram – Continued.
11
MIL-M-38510/125B
FIGURE 2. Offset null circuit.
12
MIL-M-38510/125B
NOTES:
1.
2.
3.
4.
5.
6.
Last component designations are R13, C9, U2, D4, and K8
All resistors are ±1 % film unless otherwise stated.
U1 offset error shall be measured with pin 9 grounded and the device under test (D.U.T.) removed.
This error shall be removed in the software calculations.
Relay control inputs are not shown.
A speed-up circuit is required in series with the logic input for rise times greater than 0.5 µs.
The adapter S/H U2 is required for TA = 125°C testing of some parameters.
FIGURE 3. Test circuit for static and dynamic tests.
13
MIL-M-38510/125B
FRR = 20 log 1150/E24 – E23
FRR = 20 log 1150/E25 – E24
FRR = 20 log 1150/E26 – E25
FRR = 20 log 1150/E27 – E26
FIGURE 4. Feedthrough rejection test timing waveforms.
14
MIL-M-38510/125B
FIGURE 5. Test circuit for ac feedthrough rejection.
15
MIL-M-38510/125B
FIGURE 6. Output Impedance test timing.
16
MIL-M-38510/125B
FIGURE 7. Hold step timing waveforms.
17
MIL-M-38510/125B
IHL (+) = K (EA – EB)
IHL(-) = K (EC – ED)
IHL(+) = C∆V / ∆t = (C / ∆t) (∆VO / 100) = K∆VO where C = 0.01 µF
∆VO = (EA – EB) or (EC – ED)
Temperature
25°C
125°C
∆t
100 ms
10 ms
K
1
0.1
∆VO Units
mV
mV
FIGURE 8. Hold leakage current timing waveforms.
18
IL Units
pA
nA
MIL-M-38510/125B
NOTES:
1. Acquisition time is equal to the logic sample pulse width which yields an output error from steady state
of 10 mV at the device under test (D.U.T.) output or 1 V at the differential amp output (for example;
pulse width t = taq when E1 – E2 = 0.1 V).
2. Only the 0 V to +10 V step is shown. The other transitions as per figure 10 shall also be tested.
FIGURE 9. Acquisition time test circuit and wavforms.
19
MIL-M-38510/125B
Notes:
1. Repeat above procedure for three other cases as follows: -10 V step from 0, -10 V step from +10 V and
+10 V step from –10 V.
FIGURE 10. Acquisition time flow chart.
20
MIL-M-38510/125B
FIGURE 11. Alternate acquisition time test circuit.
21
MIL-M-38510/125B
NOTES:
1. Aperture time is equal to the time delay from the VLOGIC 1 device under test (D.U.T.) ‘hold’ command
step to the 10 V input transition which yields a 0.1 volt output error from its 2 µs delayed value E0(1).
2. A flow chart for the automatic determination of aperture time is shown in figure 13. All four combinations
of 10 V input and 5 V logic signals shall be checked.
3. The adapter S/H U2 holds the ‘data’ voltage for the measurement system.
FIGURE 12. Aperture time test circuit.
22
MIL-M-38510/125B
NOTE:
1. Repeat above procedure for three other cases as follows:
a) Start at 0 V and apply a –10 V pulse.
b) Start at 10 V and apply a –10 V pulse.
c) Start at –10 V and apply a +10 V pulse.
FIGURE 13. Aperture time flow chart.
23
MIL-M-38510/125B
FIGURE 14. Alternate aperture time test circuit.
24
MIL-M-38510/125B
NOTE:
1. The clock frequency and logic pulse width are adjusted so that there is a 300 nanosecond delay from
the logic hold transition to a ±10 V input transition. For these conditions the effect on the output shall
be less than 1 mV. Laboratory instruments may be used to apply similar input conditions.
FIGURE 15. Alternate aperture time test waveforms.
25
MIL-M-38510/125B
Parameter
symbol
Input pulse
signal at
tr ≤ 50 ns
TR(ts)
100 mV
TR(os)
100 mV
Output pulse
signal
(see notes)
Above
waveform
Above
waveform
Equation
TR(ts) = ∆t
TR(os) = ∆VO / VO
NOTES:
1. +VCC and –VCC shall be at the common mode limits.
(For example: first +3.5 V, -26.5 V and then +26.5 V, -3.5 V.)
2. Any high frequency ringing shall be over within 2 µs.
3. After its peak the major loop response shall be without further oscillations.
FIGURE 16. Transient response test circuit and waveform.
26
MIL-M-38510/125B
Symbol
S1
Measure
en(S)
1
Value
Eo
en(H)
2
E0
Units
mVrms
Input Noise
Equation
en(S) = 0.1 Eo
Units
µVrms
mVrms
en(H) = 0.1 E0
µVrms
NOTES:
1. The circuit components are designed to provide an effective “brickwall” bandwidth from 10 Hz to 10 kHz.
2. Measurement should be made with a true rms voltmeter with at least 20 kHz bandwidth.
3. The filter pole frequencies are related to the effective noise pass band frequencies as follows:
fLE = 2/π x fLP; fHE = π/2 x fHP.
FIGURE 17. Noise test circuit.
27
MIL-M-38510/125B
FIGURE 18. Hold mode settling time test circuit.
28
MIL-M-38510/125B
NOTES:
1. At 125°C hold mode leakage current causes excessive droop rate of the hold capacitor voltage.
(For example: maximum droop rate = ∆V / ∆t = I / C = 100 nA / 0.01 µF = 10 mV / ms)
2. In order to minimize the droop error, the test fixture S/H at 25°C is used to acquire and hold the
voltage until the measurement system can do its function.
3. See figure 3 test circuit.
FIGURE 19. 125°C D.U.T. hold mode measurements.
29
TABLE III. Group A inspection for all device types.
Subgroup
Symbol
Calibration
1
VIO
TA =
+25°C
IIB
MILSTD883
method
Test
no.
Adapter pin numbers
Limits
4001
“
“
“
1
2
3
4
5
6
2/
3/
“
“
“
“
Apply 0 V to pin 9 with D.U.T removed.
3.5 V -26.5 V Open -9 V -11.5 V Open
26.5 V -3.5 V
“
14 V 11.5 V
“
15 V
-15 V
“
2.5 V
0V
“
7V
-3 V
“
4.5 V
2V
“
3V
-7 V
“
0.5 V
-2 V
“
4001
“
“
“
“
7
8
9
10
11
“
“
“
“
“
3.5 V -26.5 V
26.5 V -3.5 V
15 V
-15 V
7V
-3 V
3V
-7 V
Notes
Energized
relays
1
2
3
“
“
“
“
“
4
5
-9 V -11.5 V
14 V 11.5 V
2.5 V
0V
4.5 V
2V
0.5 V
-2 V
6
“
“
“
“
“
7
-2
-3
“
“
“
“
2
3
“
“
“
“
mV
mV
“
“
“
“
“
“
“
“
“
K1
“
“
“
“
“
“
“
“
“
E7
E8
E9
E10
E11
“
“
“
“
“
IIB = 100 (E2 – E7)
IIB = 100 (E3 – E8)
IIB = 100 (E4 – E9)
IIB = 100 (E5 – E10)
IIB = 100 (E6 – E11)
-1
“
“
“
“
25
“
“
“
“
nA
“
“
“
“
ZI = 0.23 / |E2 +E8 –E3 –E7|
2
Open
“
“
“
K4
K4
K7
K7
8
“
“
“
E12
E13
E14
E15
V
“
“
“
AE = (E12 – E13) / 23
-.005
“
-.005
“
.005
“
.005
“
GΩ
%
“
“
“
AE = (E16 – E17) / 4
-.02
“
6
.02
“
“
“
mV
-6
mV
16
3V
7V
15 V
-7 V
-3 V
-15 V
“
“
“
0.5 V
4.5 V
2.5 V
-2 V
2V
0V
“
“
“
“
“
“
K4
K4
K5
“
“
“
E16
E17
E18
“
“
“
VIO ADJ(+) = 10 (E4 – E18)
17
15 V
-15 V
“
2.5 V
0V
“
“
K8
“
E19
“
VIO ADJ(-) = 10 (E4 – E19)
18
18 V
12 V
18 V
-18 V
-18 V
-12 V
“
“
“
2.5 V
-0.5 V
5.5 V
0V
-3 V
3V
“
“
“
“
“
“
None
None
None
“
“
“
E20
E21
E22
“
“
“
+PSRR = 20 log |600/(E20 – E21)|
80
-PSRR = 20 log |600/(E20 – E22)|
80
dB
“
dB
K1, K2
“
“
“
“
K3
“
“
“
“
“
“
“
E23
E24
E25
E26
E27
E28
E29
“
“
“
“
“
“
“
FRR = 20 log |1150/(E24 – E23)|
FRR = 20 log |1150/(E25 – E24)|
FRR = 20 log |1150/(E26 – E25)|
FRR = 20 log |1150/(E27 – E26)|
86
“
“
“
“
dB
“
“
“
“
Open
“
“
“
K6
“
“
“
“
“
“
“
E30
E31
E32
E33
“
“
“
“
VHS = 10 (E31 – E30)
“
None
2
I1
mA
30
4003
19
FRR
20
21
22
23
4/ 5/
“
“
“
15 V
“
“
“
-15 V
“
“
“
See fig. 4
timing
0V
“
“
“
“
“
“
“
“
“
“
“
ZO
24
6/
15 V
-15 V
See fig. 6
timing
0V
-10 V
10 V
0V
0V
VHS
25
5/ 7/
“
“
“
3.5 V
3.5 V
26.5 V
26.5 V
-26.5 V
-26.5 V
-3.5 V
-3.5 V
See fig. 7
timing
15 V
-15 V
Open 2.5 V
26
ICC
RSC
See footnotes at end of table.
AE = (E14 – E15) / 20
27
28
15 V
15 V
-15 V
-15 V
0 V 2.5 V
0.4 V 2.5 V
-11.5 V Open
-11.5 V
“
11.5 V
“
11.5 V
“
0V
0V
0V
“
“
“
0V
0V
K1,K2,K3
K1,K2,K3
7
7
I2
I3
mA
mA
ZO = 5 (E29 – E28)
VHS = 10 (E33 – E32)
ICC = I1
Type 01
Type 02
RSC = 400 / (I3 – I2)
-2
“
“
“
2
“
Ω
“
“
“
“
mV
“
“
“
1
5.5
mA
1
75
6.0
400
mA
Ω
MIL-M-38510/125B
VCAL = 10 E1
VIO = 10 (E2 – E1)
VIO = 10 (E3 – E1)
VIO = 10 (E4 – E1)
VIO = 10 (E5 – E1)
VIO = 10 (E6 – E1)
3.5 V -26.5 V Open -9 V -11.5 V Open
26.5 V -3.5 V
“
14 V 11.5 V
“
5V
-25 V
“
-7.5 V -10 V
“
25 V
-5 V
“
12.5 V 10 V
“
-PSRR
Max
V
V
“
“
“
“
Calculate value using data from tests 2, 3, 7, and 8
4003
Min
E1
E2
E3
E4
E5
E6
12
VIO
ADJ(+)
VIO
ADJ(-)
+PSRR
1/
8
“
“
“
“
“
13
15
Value Units
None
“
“
“
“
“
ZI
-02
only
No.
Unit
Equation
Open
“
“
“
“
AE
14
Measured pin
TABLE III. Group A inspection for all device types – Continued.
Subgroup
1
TA =
+25°C
Symbol
MILSTD883
method
IIH
IIL
Adapter pin numbers
Test
no.
Limits
Notes
Energize
d relays
1
2
3
4
5
6
7
No.
Value Units
8.5 V -21.5 V
Open
5.5 V
0V
None
4
I4
0
10
“
0V
5.5 V
“
“
“
5
I5
µA
“
IIH = I4
8.5 V -21.5 V
IIH = I5
0
10
µA
“
31
“
21.5 V -8.5 V
“
0V
5.5 V
“
“
“
4
I6
“
IIL = I6
-1.0
1.0
“
32
“
21.5 V -8.5 V
“
5.5 V
0V
“
“
“
5
I7
“
IIL = I7
-1.0
1.0
Open Open
15 V
-15 V
10 V
2.5 V
0V
“
“
K1,K2
9
I8
mA
IOS(-)
3011
34
9/
15 V
-15 V
-10 V
2.5 V
0V
“
“
K1,K2
9
I9
“
IHL(+)
35
10/
3.5 V -26.5 V
See fig. 8
-11. 5 V
“
“
None
8
E34
mV
“
E35
mV
IHL(-)
36
10/
26.5 V -3.5 V
∆t = 100 ms
11.5 V
“
“
“
“
E36
mV
ICH(+)
ICH(-)
37
38
11/
11/
15 V
“
-15 V
“
11.5 V 2.5 V
-11.5 V 2.5 V
0V
“
“
“
VTH(H)
39
12/
“
“
-2 V
2.0 V
“
“
0V
VTH(L)
VIO
40
12/
“
“
-2 V
0.8 V
“
“
0V
41
42
43
44
45
46
47
48
49
50
2/ 3/
“
“
“
“
3/
“
“
“
“
3.5 V
26.5 V
15 V
7V
3V
3.5 V
26.5 V
15 V
7V
3V
-26.5 V
-3.5 V
-15 V
-3 V
-7 V
-26.5 V
-3.5 V
-15 V
-3 V
-7 V
Open
“
“
“
“
“
“
“
“
“
31
ZI
51
AE
52
53
See footnotes at end of time.
-02
only
Open
“
-9 V
14 V
-11.5 V Open Open
11.5 V
“
“
“
mA
-100
“
“
“
IHL(-) = (E37 – E36)
“
“
“
-30
25
“
mA
30
100
“
pA
“
E37
mV
I10
I11
mA
mA
ICH(+) = I10
ICH(-) = I11
“
“
I12
mA
VTH(H) ≤ 2 V if I12 ≥ 1 mA
1
“
“
I13
VTH(L) ≤ 0.5 V if –10 < I13 < 10 µA
-10
10
None
“
“
“
“
K1
“
“
“
“
8
“
“
“
“
“
“
“
“
“
E38
E39
E40
E41
E42
E43
E44
E45
E46
E47
µA
V
“
“
“
“
“
“
“
“
“
VIO = 10 (E38 – E1)
VIO = 10 (E39 – E1)
VIO = 10 (E40 – E1)
VIO = 10 (E41 – E1)
VIO = 10 (E42 – E1)
IIB = 100 (E38 – E43)
IIB = 100 (E39 – E44)
IIB = 100 (E40 – E45)
IIB = 100 (E41 – E46)
IIB = 100 (E42 – E47)
-5
“
“
“
“
-25
“
“
“
“
5
“
“
“
“
75
“
“
“
“
ZI = 0.23 / |E38 +E44 –E39 –E43|
1
K4
K4
8
“
E48
E49
V
“
AE = (E48 – E49) / 23
-.02
.02
Calculate value using data from tests 41, 42, 46, and 47.
3.5 V -26.5 V
26.5 V -3.5 V
-25
Type 01
Type 02
IOS(-) = I9
Type 01
Type 02
IHL(+) = (E35 – E34)
7
“
9.5 V K1,K2,K3
-9.5 V
“
-9 V -11.5 V Open Open
14 V 11.5 V
“
“
2.5 V
0V
“
“
4.5 V
2V
“
“
0.5 V
-2 V
“
“
9 V -11.5 V
“
“
14 V 11.5 V
“
“
2.5 V
0V
“
“
4.5 V
2V
“
“
0.5 V
-2 V
“
“
IOS(+) = I8
“
“
“
-3
mA
mA
3
mA
µA
mV
“
“
“
“
nA
“
“
“
“
GΩ
%
“
5V
25 V
-25 V
-5 V
“
“
-7.5 V
12.5 V
-10 V
10 V
“
“
“
“
K7
K7
“
“
E50
E51
“
“
AE = (E50 – E51) / 20
-.02
.02
“
“
54
3V
7V
-7 V
-3 V
“
“
0.5 V
4.5 V
-2 V
2V
“
“
“
“
K4
K4
“
“
E52
E53
“
“
AE = (E52 – E53) / 4
-.04
.04
“
“
55
15 V
-15 V
“
2.5 V
0V
“
“
K5
“
E54
“
VIO ADJ(+) = 10 (E40 – E54)
6
56
15 V
-15 V
“
2.5 V
0V
“
“
K8
“
E55
“
VIO ADJ(-) = 10 (E40 – E55)
mV
-6
mV
MIL-M-38510/125B
9/
VIO
ADJ(+)
VIO
ADJ(-)
Max
“
33
IIB
Min
8/
3011
TA =
+125°C
1/
30
IOS(+)
4001
“
“
“
“
4001
“
“
“
“
Unit
Equation
29
timing
2
Measured pin
TABLE III. Group A inspection for all device types – Continued.
Subgroup
Symbol
MIL-STD883
method
2
+PSRR
4003
TA =
+125°C
-PSRR
4003
Adapter pin numbers
Test
no.
18 V
12 V
18 V
-18 V
-18 V
-12 V
4/ 5/
13/
“
“
“
6/ 13/
“
15 V
“
“
“
“
15 V
15 V
ZO
63
VHS
64
5/ 7/
13/
“
“
65
66
ICC
1/
Min
None
None
None
8
“
“
E56
E57
E58
V
“
“
+PSRR = 20 log |600/(E56 – E57)|
80
“
80
dB
11
“
“
“
“
“
“
E59
E60
E61
E62
E63
E64
E65
“
“
“
“
“
“
“
FRR = 20 log |1150/(E60 – E59)|
FRR = 20 log |1150/(E61 – E60)|
FRR = 20 log |1150/(E62 – E61)|
FRR = 20 log |1150/(E63 – E62)|
80
“
“
“
“
dB
“
“
“
“
0V
0V
K1, K2
“
“
“
“
K3
K3
Open
“
“
“
Open
“
“
“
K6
“
“
“
“
“
“
“
E66
E67
E68
E69
“
“
“
“
VHS = 10 (E67 – E66)
“
“
None
2
I14
mA
Open 2.5 V
“
-0.5 V
“
5.5 V
0V
-3 V
3V
Open
“
“
Open
“
“
-15 V
“
“
“
“
-15 V
-15 V
See fig. 4
timing waveforms and
fig. 19
0V
“
“
“
“
0V
0V
“
“
“
“
“
-10 V
10 V
“
“
“
“
3.5 V
-26.5 V
See fig. 7
and fig. 19
-11.5 V
26.5 V
-3.5 V
15 V
-15 V
32
IIH
68
8.5 V
-15 V
-15 V
See fig. 6
and fig. 19
11.5 V
Open
2.5 V
2.5 V
-21.5 V Open
-8.5 V
71
0V
0V
0V
“
“
0V
0V
K1,K2,K3
7
5.5 V
0V
Open
Open
None
0V
5.5 V
“
“
“
“
0V
5.5 V
“
“
“
“
5.5 V
0V
“
“
“
“
21.5 V
2.5 V
0V
0.4 V
69
70
Units
7
15 V
15 V
IIL
Value
6
67
4
-PSRR = 20 log |600/(E56 – E58)|
ZO = 5 (E65 – E64)
VHS = 10 (E69 – E68)
ICC = I14
Type 01
Type 02
RSC = 400 / (I16 – I15)
-5
“
-5
“
dB
2
Ω
5
mV
“
“
“
5
1
5.5
mA
6.0
400
mA
Ω
I15
I16
mA
mA
4
I17
0
10
I18
µA
“
IIH = I17
5
IIH = I18
0
10
µA
“
4
I19
“
IIL = I19
-1.0
1.0
“
5
I20
“
IIL = I20
-1.0
1.0
“
25
mA
“
“
30
50
“
nA
3011
72
9/
15 V
-15 V
10 V
2.5 V
0V
“
“
K1,K2
9
I21
mA
IOS(-)
3011
73
9/
15 V
-15 V
-10 V
2.5 V
0V
“
“
K1,K2
9
I22
“
IHL(+)
74
10/ 13/
3.5 V
-26.5 V
See fig. 8
-11. 5 V
“
“
None
11
E70
mV
“
E71
mV
IHL(-)
75
10/ 13/ 26.5 V
-3.5 V
∆t = 10 ms
11.5 V
“
“
“
“
“
E72
E73
mV
mV
IHL(-) = 0.1 (E73 – E72)
ICH(+)
76
11/
15 V
-15 V
11.5 V 2.5 V
0V
“
9.5 V
K1,K2,K3
7
I23
mA
ICH(+) = I23
ICH(-)
77
11/
“
“
-11.5 V 2.5 V
“
“
-9.5 V
“
“
I24
mA
ICH(-) = I24
2
VTH(H)
78
12/
“
“
-2 V
2.0 V
“
“
0V
“
“
I25
mA
VTH(H) ≤ 2 V if I25 ≥ 1 mA
1
VTH(L)
79
12/
“
“
-2 V
0.8 V
“
“
0V
“
“
I26
µA
VTH(L) ≥ 0.8 V if –10 < I26 < 10 µA
-10
and fig. 19
Max
1
75
IOS(+)
See footnotes at end of table.
Unit
Equation
No.
5
RSC
3
Measured pin
IOS(+) = I8
Type 01
Type 02
IOS(-) = I9
Type 01
Type 02
IHL(+) = 0.1 (E71 – E70)
-25
-30
-50
“
“
“
“
“
“
“
“
“
-2
mA
mA
mA
10
µA
MIL-M-38510/125B
2
58
59
60
61
62
Energized
relays
1
57
FRR
Limits
Notes
TABLE III. Group A inspection for all device types – Continued.
Subgroup
Symbol MIL-STD883
method
Adapter pin numbers
Test
no.
Energized
relays
1
3
VIO
TA =
-55°C
IIB
4001
“
“
“
“
4001
“
“
“
“
80
81
82
83
84
85
86
87
88
89
3/
“
“
“
“
3/
“
“
“
“
90
91
ZI
AE
92
-PSRR
4003
3
3.5 V -26.5 V Open
26.5 V -3.5 V
“
15 V
-15 V
“
7V
-3 V
“
3V
-7 V
“
3.5 V -26.5 V
“
26.5 V -3.5 V
“
15 V
-15 V
“
7V
-3 V
“
3V
-7 V
“
4
5
6
-9 V -11.5 V Open
14 V 11.5 V
“
2.5 V
0V
“
4.5 V
2V
“
0.5 V
-2 V
“
-9 V -11.5 V
“
14 V 11.5 V
“
2.5 V
0V
“
4.5 V
2V
“
0.5 V
-2 V
“
7
Open
“
“
“
“
“
“
“
“
“
-02
only
Measured pin
No.
1/
Min
Max
VIO = 10 (E74 – E1)
VIO = 10 (E75 – E1)
VIO = 10 (E76 – E1)
VIO = 10 (E77 – E1)
VIO = 10 (E78 – E1)
IIB = 100 (E74 – E79)
IIB = 100 (E75 – E80)
IIB = 100 (E76 – E81)
IIB = 100 (E77 – E82)
IIB = 100 (E78 – E83)
-5
“
“
“
“
-25
“
“
“
“
5
“
“
“
“
75
“
“
“
“
mV
“
“
“
“
nA
“
“
“
“
ZI = 0.23 / |E74 +E80 –E75 –E79|
AE = (E84 – E85) / 23
1
-.02
.02
GΩ
%
“
Value Units
None
“
“
“
“
K1
“
“
“
“
8
“
“
“
“
“
“
“
“
“
E74
E75
E76
E77
E78
E79
E80
E81
E82
E83
V
“
“
“
“
“
“
“
“
“
K4
K4
8
“
E84
E85
V
“
Unit
Equation
5V
25 V
3V
7V
-25 V
-5 V
-7 V
-3 V
“
“
“
“
-7.5 V
12.5 V
0.5 V
4.5 V
-10 V
10 V
-2 V
2V
“
“
“
“
“
“
“
“
K7
K7
K4
K4
“
“
“
“
E86
E87
E88
E89
“
“
“
“
AE = (E86 – E87) / 20
-.02
.02
AE = (E88 – E89) / 4
-.04
.04
94
15 V
-15 V
“
2.5 V
0V
“
“
K5
“
E90
VIO ADJ(+) = 10 (E76 – E90)
6
95
15 V
-15 V
“
2.5 V
0V
“
“
K8
“
E91
“
“
“
96
18 V
12 V
-18 V
-18 V
Open
“
2.5 V
-0.5 V
0V
-3 V
Open
“
Open
“
None
None
“
“
E92
E93
“
“
+PSRR = 20 log |600/(E92 – E93)|
80
“
dB
5.5 V
97
mV
-6
VIO ADJ(-) = 10 (E76 – E91)
“
“
“
“
mV
18 V
-12 V
“
3V
“
“
None
“
E94
“
-PSRR = 20 log |600/(E92 – E94)|
80
dB
FRR
98
99
100
101
4/ 5/
“
“
“
“
15 V
“
“
“
“
-15 V
“
“
“
“
See fig. 4
timing
0V
“
“
“
“
“
“
“
“
“
“
“
“
“
“
K1, K2
“
“
“
“
“
“
“
“
“
E95
E96
E97
E98
E99
“
“
“
“
“
FRR = 20 log |1150/(E96 – E95)|
FRR = 20 log |1150/(E97 – E96)|
FRR = 20 log |1150/(E98 – E97)|
FRR = 20 log |1150/(E99 – E98)|
80
“
“
“
“
dB
“
“
“
“
ZO
102
6/
15 V
15 V
-15 V
-15 V
See fig. 6
0V
0V
-10 V
10 V
0V
0V
K3
K3
“
“
E100
E101
“
“
ZO = 5 (E101 – E100)
VHS
103
5/ 7/
“
3.5 V
3.5 V
-26.5 V
-26.5 V
See fig. 7
-11.5 V
-11.5 V
Open
“
Open
“
K6
“
“
“
E102
E103
“
“
VHS = 10 (E103 – E102)
104
“
“
26.5 V
26.5 V
-3.5 V
-3.5 V
11.5 V
11.5 V
“
“
“
“
“
“
“
“
E104
E105
“
“
VHS = 10 (E105 – E104)
ICC
105
15 V
-15 V
Open
2.5 V
0V
“
“
None
2
I27
mA
RSC
106
15 V
15 V
-15 V
-15 V
0V
0.4 V
2.5 V
2.5 V
0V
0V
“
“
0V
0V
K1,K2,K3
“
7
“
I28
I29
mA
mA
See footnotes at end of table.
ICC = I27
Type 01
Type 02
RSC = 400 / (I29 – I28)
2
Ω
-5
“
5
mV
“
-5
“
5
“
“
1
1
75
6.5
7.0
400
mA
mA
Ω
MIL-M-38510/125B
33
4003
2
Calculate value using data from tests 80, 81, 85, and 86
3.5 V -26.5 V Open
-9 V -11.5 V Open Open
26.5 V -3.5 V
“
14 V 11.5 V
“
“
93
VIO
ADJ(+)
VIO
ADJ(-)
+PSRR
Limits
Notes
TABLE III. Group A inspection for all device types – Continued.
Subgroup
3
TA =
-55°C
Symbol MIL-STD883
Test no.
method
IIH
IIL
3
4
5
6
7
No.
Value
Units
1/
Min
Max
107
1/
8.5 V
-21.5 V
Open
5.5 V
0V
Open
Open
None
4
I30
0
10
“
“
“
“
0V
5.5 V
“
“
“
5
I31
µA
“
IIH = I30
108
IIH = I31
0
10
µA
“
109
“
21.5 V
-8.5 V
“
0V
5.5 V
“
“
“
4
I32
“
IIL = I32
-1.0
1.0
“
110
“
“
“
“
5.5 V
0V
“
“
“
5
I33
“
IIL = I33
-1.0
1.0
9/
15 V
-15 V
10 V
2.5 V
0V
“
“
K1,K2
9
I34
mA
IOS(+) = I34
IOS(-)
3011
112
9/
15 V
-15 V
-10 V
2.5 V
0V
“
“
K1,K2
9
I35
“
IOS(-) = I35
113
11/
15 V
-15 V
11.5 V 2.5 V
0V
“
9.5 V K1,K2,K3
7
I36
mA
-11.5 V 2.5 V
Type 01
Type 02
Type 01
Type 02
-25
-30
ICH(+) = I36
“
mA
25
“
“
30
-2
“
mA
ICH(-)
114
11/
“
“
“
“
-9.5 V
“
“
I37
mA
ICH(-) = I37
2
VTH(H)
115
12/
“
“
-2 V
2.0 V
“
“
0V
“
“
I38
mA
VTH(H) ≤ 2 V if I38 ≥ 1 mA
1
VTH(L)
116
12/
“
“
-2 V
0.8 V
“
“
0V
“
“
I39
mA
VTH(L) ≥ 0.8 V if –10 ≤ I39 ≤ 10 µA
-10
taq
117
14/ 15/
15 V
-15 V
See fig. 9,
0V
Open
11
t1
118
119
120
“
“
“
“
“
“
“
“
“
10, and 11
“
“
“
“
“
“
“
“
“
t2
t3
t4
µs
“
“
“
tap
121
15/ 16/
“
“
See fig. 12
“
“
“
“
“
t5
ns
“
“
“
17/
“
“
“
“
“
“
“
“
thru 15
See fig. 18
“
“
“
“
“
“
“
“
“
“
“
“
“
“
“
None
“
“
“
8
t6
t7
t8
t9
“
“
“
tS
122
123
124
125
FRRac
126
18/
“
“
See fig. 5
“
“
“
None
8
E106
TR(ts)
127
19/
3.5 V
-26.5 V
VIN = 20 VPP
See fig. 16
“
“
“
None
8
t10
µs
TR(ts) = ∆t = t10
2.5
µs
128
“
26.5 V
-3.5 V
“
“
“
“
“
t11
TR(ts) = ∆t = t11
2.5
129
“
3.5 V
-26.5 V
“
“
“
“
“
“
V01,
∆V01
µs
mV
TR(OS) = 100 ∆V01 / V01
40
µs
%
130
“
26. V
-3.5 V
“
“
“
“
mV
TR(OS) = 100 ∆V02 / V02
40
%
“
“
“
“
V02,
∆V02
E107
mVrms
en(S) = 0.1 E107
10
µVrms
“
“
“
“
E108
mVrms
en(H) = 0.1 E108
10
µVrms
VIN = 100 mV
pulse
Open K1,K2,K6
“
“
“
“
“
“
mA
mA
10
µA
taq = t1
taq = t2
taq = t3
taq = t4
25
“
“
“
µs
“
“
“
300
ns
“
“
“
1.5
“
“
“
µs
tap = t5
tap = t6
tap = t7
tap = t8
tS = t9
mVOPP
FRRac = 20 log |20000/E106|
86
µs
dB
en(S)
131
20/
15 V
-15 V
See fig. 17
“
“
“
en(H)
132
20/
15 V
-15 V
See fig. 17
“
∆VIO /
∆T
133
∆VIO / ∆T = [VIO (test 43) – VIO (test 4)] / 100°C
-20
20
µV/°C
∆VIO /
∆T
134
∆VIO / ∆T = [VIO (test 82) – VIO (test 4)] / 80°C
-20
20
µV/°C
See footnotes at end of table.
MIL-M-38510/125B
34
TA = -55°C
2
Unit
Equation
111
TR(OS)
TA =
+125°C
8
1
Measured pin
3011
TA =
+25°C
8
Limits
Energized
relays
IOS(+)
ICH(+)
7
Adapter pin numbers
Notes
MIL-M-38510/125B
TABLE III. Group A inspection – Continued.
1/
The equations take into account the test amplifier gain of 100 and other circuit constants so that the calculated
value is in table I units.
2/
In order to remove test amplifier offset from the data values measure the offset of U1 on pin 8 with pin 9 grounded and
the device under test removed. Software subtraction techniques shall be used to correct the data.
3/
Common mode input range conditions are exercised by grounding the signal input and swinging the power supplies to
their nominal levels minus the common mode voltage.
For example for VCM = +11.5 V, +VCC = 15 V, - 11.5 = 3.5 V and –VCC = -15 V – 11.5 V = -26.5 V.
4/
With a 0 V signal input the device under test logic input is switched from 5 V to 0 V. This resets the system in the
hold mode. The test amplifier output is measured immediately after each 11.5 V change at the signal output.
5/
Logic input step changes should have a rise time of 0.5 µs or less.
6/
E28 and E29 are measured with the device under test in the hold mode and with the hold capacitor terminal grounded.
7/
For the hold mode step test, the first and second measurements are made with the device under test in the sample
and hold modes, respectively. The hold measurements should be made within 50 µs of the device under test hold
command, especially at +125°C.
8/
High and low state logic input currents shall be measured over the common mode voltage range as shown.
9/
The output shall be shorted to ground for 25 ms or less.
10/ Hold leakage current at 25°C is determined by measuring the droop referred to the test amplifier output over a
100 ms interval.
11/ The charge current measurements on pin 7 are referenced to forced voltage of 9.5 V and –9.5 V, respectively.
12/ With worst case logic threshold voltages applied, the hold capacitor terminal output current is measured to
determine if the device is in the correct operating mode. The logic threshold levels for VTH(H) and VTH(L)
are guaranteed by measuring the hold capacitor current.
For VTH(H) hold capacitor current ≥ 1 mA. For VTH(L) hold capacitor current ≤ 10 µA.
13/ Hold mode droop at 125°C due to high JFET leakage current will tend to mask the data for VHS, ZO, and FRR.
To preclude this effect from happening, the test adapter sample/hold circuit, which is not at an elevated temperature,
should be used to acquire and hold the data for the measurement system.
14/ Step the signal input from 0 V to +10 V. After a delay of ≈ 100 µs, generate a 100 µs sample mode pulse.
The difference between the input and device under test output is monitored with a 100 V/V differential amplifier
followed by tester sample/hold circuit. Reduce the device under test sample mode pulse width until there is a
100 mV (.01%) change at the tester sample/hold output from the 100 µs pulse value. The sample mode pulse
width for this condition is the acquisition time. Repeat the above procedure for input signal transitions of 10 V to 0 V,
0 V to –10 V, and –10 V to 0 V. Figure 10 shows an automatic flow chart method and figure 11 shows a simplified
manual method for determining acquisition time.
15/ Even with a Teflon hold capacitor servicing the device under test sample hold circuit, dielectric absorption errors
can occur when dynamic signals are applied to the device under test input. To minimize these errors, the error
amplifier output should be measured immediately after the test event. The tester sample and hold circuit is used to
hold the analog data for the slower responding automatic measurement system.
35
MIL-M-38510/125B
TABLE III. Group A inspection – Continued.
16/ Step the logic input from 5 V to 0 V with the input at 0 V. After a 2 µs time delay, step the signal input up to 10 V.
For this condition the device under test output should be ≈ 0 V. Gradually decrease the delay until a 100 mV (.01 %)
shift occurs at the tester sample/hold output. Repeat the above procedure for input signal transitions of 10 V to 0 V,
0 V to –10 V, and –10 V to 0 V. The delay corresponding to the 100 mV shift is equal to the aperture time.
See figures 12 through 15.
17/ Settling time is determined as shown on figure 18 as the time for the S/H to settle within 1 mV of final value after the
hold command is given.
18/ Dynamic feedthrough rejection is determined in the hold mode with a signal input of 20 VPP at a frequency of 1 kHz.
19/ Overshoot TR(OS) and settling time TR(ts) are indicative of the stability of the device
20/ Broadband noise en(S) and en(H) is measured with a 10,000 V/V low noise bandpass amplifier as shown on figure 17.
5. PACKAGING
5.1 Packaging requirements. For acquisition purposes, the packaging requirements shall be as specified in the contract or
order (see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel need
to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are maintained by
the Inventory Control Point's packaging activity within the Military Service, or Defense Agency, or within the military service’s
system command. Packaging data retrieval is available from the managing Military Department's or Defense Agency's
automated packaging files, CD-ROM products, or by contacting the responsible packaging activity.
36
MIL-M-38510/125B
TABLE IV. Group C end point electrical parameters.
(TA = 25°C, ±VCC = ±15 V for all device types)
Table III
test no.
Test
Limits
Delta limits
Units
Min
Max
Min
Max
4
VIO
-3
+3
-0.5
+0.5
mV
9
IIB
-1
25
-2.5
2.5
nA
6.0 NOTES
This section contains information of a general or explanatory nature that may be helpful, but it is not mandatory.
6.1 Intended use. Microcircuits conforming to this specification are intended for original equipment design applications and
logistic support of existing equipment.
6.2 Acquisition requirements. Acquisition documents should specify the following:
a.
Title, number, and date of the specification.
b.
PIN and compliance identifier, if applicable (see 1.2).
c.
Requirements for delivery of one copy of the conformance inspection data pertinent to the device inspection lot to be
supplied with each shipment by the device manufacturer, if applicable.
d.
Requirements for certificate of compliance, if applicable.
e.
Requirements for notification of change of product or process to contracting activity in addition to notification to the
qualifying activity, if applicable.
f.
Requirements for failure analysis (including required test condition of method 5003 of MIL-STD-883), corrective
action, and reporting of results, if applicable.
g.
Requirements for product assurance options.
h.
Requirements for special carriers, lead lengths, or lead forming, if applicable. These requirements should not affect
the part number. Unless otherwise specified, these requirements will not apply to direct purchase by or direct
shipment to the Government.
i.
Requirements for "JAN" marking.
j.
Packaging requirements (see 5.1).
37
MIL-M-38510/125B
6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are, at the
time of award of contract, qualified for inclusion in Qualified Manufacturers List QML-38535 whether or not such products have
actually been so listed by that date. The attention of the contractors is called to these requirements, and manufacturers are
urged to arrange to have the products that they propose to offer to the Federal Government tested for qualification in order that
they may be eligible to be awarded contracts or purchase orders for the products covered by this specification. Information
pertaining to qualification of products may be obtained from DSCC-VQ, 3990 E. Broad Street, Columbus, Ohio 43218-3990.
6.4 Superseding information. The requirements of MIL-M-38510 have been superseded to take advantage of the
available Qualified Manufacturer Listing (QML) system provided by MIL-PRF-38535. Previous references to MIL-M-38510 in
this document have been replaced by appropriate references to MIL-PRF-38535. All technical requirements now consist of this
specification and MIL-PRF-38535. The MIL-M-38510 specification sheet number and PIN have been retained to avoid
adversely impacting existing government logistics systems and contractor’s parts lists.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535, MIL-HDBK-1331, and as follows:
AE
Gain error. The ratio of “sample” mode output voltage swing to input common mode
voltage swing expressed in percent. To the user this can be interpreted as the
percentage deviation from unity gain.
DR(+), DR(-)
Droop rate. The rate of change of hold capacitor voltage with time due to “hold”
mode leakage current. Note that IHL= CH x ∆VHC / ∆t = CH x DR.
DSE
Dynamic sampling error. The error introduced into the held output due to a
changing analog input when the “hold” command is given. This error is proportional
to the product of input signal slew rate, hold capacitance, and the series charge
resistor.
en(S), en(H)
Noise. The total rms noise of the device that exists within a 10 Hz to 10 kHz
“brickwall” bandwidth. Both “sample” mode, en(S), and “hold” mode, en(H),
specifications exist.
FRR
Feedthrough rejection ratio. The ratio in dB of an input voltage change to a “hold”
mode output voltage change.
ICH(+), ICH(-)
Hold capacitor charge current. The current that the input amplifier can supply to
charge up the hold capacitor.
IHL(+), IHL(-)
Hold mode leakage current. The input bias current of the output buffer amplifier.
This leakage current causes a droop rate error of the external hold capacitor.
IIB
Input bias current. The current flowing into the signal input for any rated common
mode voltage condition.
IIH, IIL
Logic input current. The current into a mode control input for a forward bias (high
state), IIH, condition or a below threshold (low state), IIL, condition.
IOS(+), IOS(-)
Output short circuit current. The “sample” mode output short circuit current to
ground with +10 V and –10 V applied at the input for IOS(+) and IOS(-), respectively.
+PSRR, -PSRR
Power supply rejection ratio. The ratio in dB of the change in +VCC or –VCC voltage
to the change in offset voltage measured at the output with the opposite –VCC or
+VCC voltage held constant.
38
MIL-M-38510/125B
tap
Aperture time. The delay required between the “hold” command and a 10 volt input
signal transition such that the resulting output change is less than 1 mV.
taq
Acquisition time. The time, in terms of minimum sample pulse width, that is required
for the device to acquire a 10 volt full scale change to within a specified error band
of final value for a specified hold capacitor size.
TR(OS)
Transient response (overshoot). The percentage ratio of signal overshoot to the 100
mV final value. This parameter is related to circuit phase margin and stability.
TR(ts)
Transient response (settling time). The small signal time interval from the
application of a 100 mW pulse to the time when the output enters and remains
within 10 percent of its final value.
tS
Hold settling time. The time required for the output to settle within 1 mV of final
value after the “hold” command is given.
VCM
Common mode voltage. The voltage of the input terminal with respect to a voltage
midway between +VCC and –VCC.
VHC
Hold capacitor voltage. The voltage “held” by the external hold capacitor.
VHS
“Hold” step voltage. The output voltage change with a fixed input voltage when the
device is switched from “sample” to “hold” mode with a 4 V logic signal.
VIO
Input offset voltage. The “sample” mode output to input dc voltage for any rated
common mode voltage condition.
6.6 Logistic support. Lead materials and finishes (see 3.3) are interchangeable. Unless otherwise specified, microcircuits
acquired for Government logistic support will be acquired to device class B (see 1.2.2), lead material and finish A (see 3.4).
Longer length leads and lead forming should not affect the part number.
6.7 Substitutability. The cross-reference information below is presented for the convenience of users. Microcircuits covered
by this specification will functionally replace the listed generic-industry type. Generic-industry microcircuit types may not have
equivalent operational performance characteristics across military temperature ranges or reliability factors equivalent to MIL-M38510 device types and may have slight physical variations in relation to case size. The presence of this information should not
be deemed as permitting substitution of generic-industry types for MIL-M-38510 types or as a waiver of any of the provisions of
MIL-PRF-38535.
Military device type
01
02
Generic-industry type
198
5537
6.8 Changes from previous issue. Marginal notations are not used in this revision to identify changes with respect to the
previous issue, due to the extensiveness of the changes.
Custodians:
Army – CR
Navy - EC
Air Force - 11
NASA - NA
DLA – CC
Preparing activity:
DLA - CC
Project 5962-2005-026
Review activities:
Army - MI, SM
Navy - AS, CG, MC, SH, TD
Air Force – 03, 19, 99
NOTE: The activities listed above were interested in this document as of the date of this document. Since organizations and
responsibilities can change, you should verify the currency of the information above using the ASSIST Online database at
http://assist.daps.dla.mil.
39
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