AN47215 PSoC RC Oscillator to Accurately Time Sleep Cycles.pdf

AN47215
PSoC® RC Oscillator to Accurately Time Sleep Cycles
Author: Ben Kropf
Associated Project: Yes
Associated Part Family: CY8C20x34, CY8C21x23, CY8C21x34, CY8C23x33, CY8C24x23A,
CY8C24x94, CY8C27x43, CY8C29x66, CYWUSB6953
Software Version: PSoC ® Designer 5.4
Related Application Notes: None
To get the latest version of this application note, or the associated project file, please visit
http://www.cypress.com/go/AN47215.
Many PSoC® applications require the use of sleep mode for low power operation. This application note describes a
method of using an external RC oscillator to create sleep cycles with an accurate period. This method uses external
components that are cheaper than an external crystal.
Contents
Introduction
Introduction ....................................................................... 1
Circuit ................................................................................ 2
Using a More Accurate Reference ............................... 3
RC Circuit Power Consumption .................................... 4
Choosing the Right Capacitor....................................... 5
Example Projects .............................................................. 5
Fixed Reference Project ............................................... 6
Dynamic Reference Project .......................................... 6
Summary ........................................................................... 8
Worldwide Sales and Design Support ............................. 10
Sleep mode is often used in PSoC applications. One
common way of waking up a PSoC from sleep mode is by
using the interrupt of the sleep timer circuit. This timer is
clocked by the internal low speed oscillator (ILO) or the
external crystal oscillator (ECO) of a PSoC. The ILO is the
only internal oscillator that a PSoC can use to wake itself
up. This is because all other internal oscillators are shut
down during sleep. The ILO has a nominal frequency of
32 kHz. However, this frequency can deviate by –50% to
+100% from the nominal frequency [1]. The ILO can be
bypassed to use an ECO instead, to achieve an accurate
32.768 kHz clock frequency. However, some PSoC device
families do not have this option. There are two primary
options for timing sleep cycles:


No ECO - very low timing accuracy
Use ECO - higher system cost
This
application
note
describes
an
external
resistor-capacitor (RC) oscillator solution that is a good
compromise between the two options. This method
improves sleep cycle timing accuracy when compared to
the first option. And the added system costs of this method
are lower than those of the second option.
1
See the F32K1 specification in each specific PSoC device data
sheet.
www.cypress.com
Document No. 001-47215 Rev. *B
1
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
Circuit
Figure 1 shows a PSoC interfaced to an external RC
oscillator circuit. Before going to sleep, the firmware code
sets an output pin to drive HIGH. The voltage at the vOSC(t)
node is seen in Equation 1. The input pin of Figure 1 has a
threshold voltage at which it switches from LOW to HIGH.
This threshold voltage is referred to as VTH. When vOSC(t) in
Equation 1 reaches VTH, the input pin changes from LOW
to HIGH and triggers an interrupt. This GPIO interrupt
brings the PSoC out of sleep mode to resume normal
operation.
Equation 2 is a solution for the time it takes for the vOSC(t)
signal to reach VTH and wake up the PSoC. TSLEEP is the
period of the sleep cycle.
vOSC (t ) = VDD (1 − e − t / ROSC COSC )
This circuit needs some method to quickly discharge COSC.
This is because the RC circuit must be reset to start a new
sleep cycle. Figure 2 shows the same circuit with the
addition of a switch that can connect to GND to discharge
the capacitor. During sleep when COSC is charging, P0[0] is
configured as a high impedance input. This is equivalent
to the switch in Figure 2 being open. After the P0[0] GPIO
interrupt wakes the chip from sleep mode, P0[0] is
reconfigured as an output pin driving LOW. This is
equivalent to the switch in Figure 2 being closed. This
allows all charge to flow out of the capacitor into GND,
which resets the COSC voltage at 0 V. In Figure 2, P0[0]
functions as both an input and a switch that resets the
vOSC(t) signal to 0 V by discharging the capacitor.
Figure 2. External RC Circuit with Discharging Pin
VDD
Equation 1
vOSC(t)
Int
TSLEEP = − ROSC COSC ln(1 − VVTH
)
DD
Input
P0[0]
Equation 2
From Equation 2, it is clear that ROSC and COSC can be
selected to choose a suitable TSLEEP for an application.
Assume VDD is 5 V, VTH is 2.5V, and the desired TSLEEP is
1s. When these values are used in Equation 2, the values
of ROSC and COSC must be chosen to have a product of
approximately 1.44.
Figure 1. External RC Circuit
ROSC
Output
P1[0]
COSC
PSoC
GND
VDD
vOSC(t)
Int
Figure 3. Waveform of vosc(t) Signal
Input
P0[0]
VDD
ROSC
Output
P1[0]
COSC
VTH
www.cypress.com
Document No. 001-47215 Rev. *B
twake2
tsleep3
GND
twake1
tsleep2
ton
tsleep1
PSoC
2
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
Figure 3 shows the vOSC(t) waveform seen at the capacitor.
The device continually goes into sleep mode, wakes up for
a short period of time to do its intended operation, and
then goes back to sleep. The ton time is when the device
first boots up and starts executing initialization code. The
twakex times are when the VTH voltage is reached. This
wakes the device up with an interrupt. Just after exiting
sleep mode, P1[0] is set LOW and P0[0] is put in a driving
LOW state to discharge the capacitor, resetting vOSC(t) at 0
V. The tsleepx times are when the device enters into sleep
mode. Just before doing so, P0[0] is put back in a high
impedance state and P1[0] is set HIGH.
There is a major drawback with this method. VTH is a value
between the VIH and the VIL specifications of a PSoC
device. Typically, this is a value between 0.8 V and
[2]
2.1 V . This possible variance in VTH causes a variance
in TSLEEP from Equation 2. For a VDD of 5 V, this variance in
TSLEEP is approximately –49% to +59% from the nominal.
This accuracy does not account for variances in the value
of COSC and it is still almost as inaccurate as the ILO.
Using a More Accurate Reference
Figure 4 shows the circuit from Figure 2 with a comparator
instead of a GPIO input to detect the vOSC(t) signal voltage.
The reference for this comparator, VRef, is much more
accurate than VTH. This allows TSLEEP to also be much
more accurate. The following sections describe different
ways of implementing the comparator seen in Figure 4.
Figure 4. RC Oscillator Using Comparator
VDD
+
For the CMP User Module, VRef is a fixed internal
reference, an external reference, or a programmable
reference created with other analog circuitry in the device.
For this application, it is recommended to use the fixed
reference. This is because this requires no external
components and consumes less power when compared
with the other two options. The fixed reference in these
devices is the internal bandgap voltage (VBG) and typically
ranges between 1.28 V and 1.32 V [3]. Equation 3 is the
new solution for the sleep cycle time when using the CMP
User Module along with the VBG internal fixed reference.
The accuracy of TSLEEP when using VBG as the reference is
±1.8% (does not factor in COSC or VDD variance). This is a
good improvement over the previous method. It is also
more accurate than the ILO.
BG
TSLEEP = − ROSC COSC ln(1 − VVDD
)
vOSC(t)
P0[0]
VRef
ROSC
GPIO
P1[0]
COSC
PSoC
GND
DD
TSLEEP = − ROSC COSC ln(1 − kV
VDD )
TSLEEP = − ROSC COSC ln(1 − k )
2
See the VIL and VIH specifications in each specific PSoC device
data sheet.
www.cypress.com
Equation 3
For the CmpLP User Module, the VRef voltage is always an
internal reference. This reference is a function of the
device’s power supply voltage. It has 14 possible values
between 0.021VDD and 0.75VDD. Equation 4 gives the new
TSLEEP solution when using the CmpLP User Module. The k
term is the VDD multiplier selected for the CmpLP User
Module. Equation 5 is a simplified version of Equation 4.
The VDD term is eliminated. The solution of Equation 5 is
advantageous because it does not depend on the power
supply voltage. Therefore, the accuracy of TSLEEP ideally
depends only on variances in COSC.
-
Int
Fixed Reference Implementation
All PSoC device families can implement a comparator with
a fixed reference. For this application, it is desirable that
the comparator consumes as little current as possible
when operating. This is because the comparator must be
active while the device is in sleep mode when low power
operation is essential. The CY8C21x23 and CY8C21x34
device families should use the CMP User Module. It is the
only comparator user module available for these devices
and it typically consumes 10 μA of current when operating.
The
CY8C23x33,
CY8C24x23A,
CY8C24x94,
CY8C27x43, and CY8C29x66 device families should use
the CmpLP User Module for this application. This is
because it is the comparator user module that uses the
least amount of current. The typical current consumption
of this user module is also 10 μA when operating.
Equation 4
Equation 5
3
See the BG specification in each specific PSoC device data
sheet.
Document No. 001-47215 Rev. *B
3
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
For the fixed reference implementations described in this
section, the VOSC(t) waveform looks like that shown in
Figure 3. VTH in Figure 3 is either kVDD or VBG, depending
on which comparator user module is used.
Figure 6. Flowchart for Sleep Cycles Using Two
References
ton
For a description of the accompanying example project
that implements this method, see the Fixed Reference
Project section in this document. The section contains
more details about actually implementing this in the PSoC.
Device Power Up
Initialization
Dynamic Reference Implementation
The
CY8C23x33,
CY8C24x23A,
CY8C24x94,
CY8C27x43, and CY8C29x66 device families use the
CmpLP User Module for the comparator implementation of
Figure 4. The reference for this comparator user module is
dynamically programmable. Therefore, it is possible to
change the reference each time the chip exits sleep mode.
This allows a vOSC(t) waveform seen in Figure 5. The
software flowchart to implement this is shown in Figure 6.
The time labels next to the flowchart show which
processes correspond to the waveform of Figure 5.
Set comparator
reference to VRef1
Set P1[0] HIGH
Execute
Application Code
Figure 5. vOSC(t) Waveform when Changing the Reference
tsleep1 & tsleep3
VDD
Sleep
VRef1
twake1
Exit Sleep
VRef2
twake2
tsleep3
twake1
tsleep2
ton
tsleep1
Set comparator
reference to VRef2
Set P1[0] LOW
Equation 6 gives the period of the sleep cycle during the
rising edge of vOSC(t). Equation 7 gives the period of the
sleep cycle during the falling edge of vOSC(t). A small
portion of each sleep cycle is used by normal program
execution. Equation 6 is the solution for vOSC(t) to rise from
VRef2 up to VRef1. Equation 7 is the solution for vOSC(t) to
decay from VRef1 down to VRef2.
TSLEEP1 = − ROSC COSC ln(1 −
V Ref1 −V Ref2
TSLEEP 2 = − ROSC COSC ln( VRef2
)
Ref1
V
V DD
)
Sleep
twake2
Exit Sleep
Equation 6
Equation 7
The advantage of dynamically changing the comparator
reference is that the RC circuit can achieve longer sleep
cycles of TSLEEP1 added with TSLEEP2 while using the same
amount of current as before. The power consumption of
the RC circuit is discussed in the following section.
www.cypress.com
tsleep2
For a description of the accompanying example project
that implements this method, see the Dynamic Reference
Project section in this document. The section contains
more details about actually implementing this in the PSoC.
RC Circuit Power Consumption
The RC circuit consumes some amount of power because
the capacitor is being charged and discharged repeatedly.
It is desirable to minimize this power as much as possible.
When COSC is fully charged up to the upper reference, it
has the stored charge seen in Equation 8. The VRef term in
the equation is the upper reference being used.
Document No. 001-47215 Rev. *B
4
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
QC = VRef COSC
Choosing the Right Capacitor
Equation 8
If COSC is discharged completely at the end of each sleep
cycle as seen in Figure 3, the current used to charge COSC
is discarded without getting any value from it. The average
current consumption of the RC circuit is the amount of
charge stored in the capacitor divided by the length of the
charging time. This average current consumption is given
by Equation 9.
I RC =
QC
TSLEEP
Equation 9
Equation 10 uses substitution to combine Equations 8 and
9. It shows that an easy way to minimize the RC current is
to minimize COSC. However, decreasing COSC also
decreases TSLEEP as seen in Equation 3. Therefore, ROSC
must be increased to maintain the desired TSLEEP.
Unfortunately, it is not practical to choose an arbitrarily
large value for ROSC. As the resistance of ROSC increases
beyond approximately 10 MΩ, resistors are more difficult
to obtain and the prices are marginally more expensive
than smaller value resistors. In addition, very large
resistances can create situations where contaminants on
the PCB start having a noticeable effect on the circuit.
I RC =
VRef COSC
TSLEEP
All the methods described above depend heavily on the
variance of the COSC capacitor used for the system.
Because it is easy to get 1% accurate resistors, the
capacitor variance primarily determines the variance in
TSLEEP. Therefore, it is possible to determine the accuracy
of the sleep cycle by choosing a particular capacitor. Good
capacitors with less variance tend to cost more. In each
case they should still be less expensive than crystals. This
is an advantage as the designer only needs to pay for as
much accuracy as needed.
The data sheet for the capacitor manufacturer must be
consulted for the accuracy of the capacitor used. The table
below shows the typical accuracy of capacitance values
for common dielectric types.
Table 1. Typical Accuracies for Capacitor Types [4]
Capacitor Type
Equation 10
Dynamically changing the reference (as seen in Figure 5)
further reduces the current consumption of the RC circuit.
This is because COSC is discharged slowly. The slow
discharge of COSC is used to time out part of each sleep
cycle. Therefore, COSC is only charged up during part of
each sleep cycle. This reduces the average current used
by the RC circuit.
Generally, both solutions discussed in this application note
are most effective when TSLEEP is 100 ms to 1000 ms, COSC
is 0.1 μF to 1.0 μF, and ROSC is 100 kΩ to 10 MΩ. These
target ranges provide a good balance of achieving a long
TSLEEP, a low average IRC, and a low cost for the passive
components.
When a very long period of time is required between each
application code execution, it is better for most
applications to use multiple sleep cycles instead of longer
sleep cycles. For example, if one minute is needed
between each time the processor wakes up to execute its
primary functionality, then it is better to use 600 sleep
cycles with a period of 100 ms instead of creating an RC
circuit to give a one minute sleep cycle.
Capacitance
Accuracy
Typical
Maximum
Capacitance
C0G ceramic
5%
0.047 µF
NPO ceramic
5%
0.047 µF
X7R ceramic
10%
0.33 µF
Y5V ceramic
+20/–80%
22 µF
Z5U ceramic
20%
2.2 µF
2E6 ceramic
20%
2.2 µF
PZT ceramic
1%
1 µF
Polycarbonate
1%
10 µF
Polyester
10%
10 µF
Electrolytic
+80/–20%
>1,000 µF
Tantalum
5% to 20%
>100 µF
Polystyrene
0.5%
10 µF
Example Projects
There are two example projects that accompany this
application note. Both of them implement a form of the
solution presented in this application note. Both projects
have the user modules required for this application in a
second configuration of the project. To see the user
modules used for this application, click on the Sleep tab
near the top of the Device Editor view. The example
projects are discussed in the following sections.
4
Source of data is www.wikipedia.org and www.avx.com. Always
consult a capacitor manufacturer’s documentation to obtain the
most reliable and accurate specifications for capacitors.
www.cypress.com
Document No. 001-47215 Rev. *B
5
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
Fixed Reference Project
The first example project is named “FixedRef”. It
implements the solution discussed in the Fixed Reference
Implementation section of this application note. Figure 4 is
the circuit used with the example project. The
CY8C21534-24PVXI device is used for the project. This
project can be implemented with the CY3210-PSoCEval1
kit along with a 28-pin SSOP to DIP adapter socket.
The input to the comparator is on the P0[0] pin. This pin is
chosen because it is an analog input pin. Therefore, there
is a signal path from P0[0] to the input of the CMP User
Module. Any of the Port 0 pins can also be used for this
purpose.
The output pin that drives the RC oscillator is on the P1[0]
pin. This pin was chosen because it is also the
programming data signal pin for the device. In most
applications, it is best to avoid sharing this GPIO with
other functions of the device. However, this port pin can
easily be shared between the programming and the RC
oscillator functionality. To allow successful programming,
P1[0] must not be loaded with less impedance than
120 pF in parallel with 1 kΩ[5]. In this application, the RC
circuit loads this pin with a large resistance in series with a
capacitance. If the RC circuit has proper R and C values
as discussed earlier, then the impedance they introduce
will not be too small to allow programming. Therefore, by
sharing P1[0] as the RC circuit driver and a programming
pin, a second GPIO need not be used as the RC circuit
driver.
This project uses dynamic reconfiguration to load all
hardware used to time the sleep cycles. Any user modules
and hardware used during normal program execution
need not be used during sleep in most applications.
Therefore, the Sleep configuration of the project is loaded
just before the long sleep cycle. Although this project uses
an analog block for the comparator, it is only used during
the sleep cycle. Therefore, the same analog block can be
used for something else during normal operation[ 6]. The
base configuration of the project has nothing in it. It can be
filled up with user modules to accomplish normal device
operation.
Figure 7 shows an oscilloscope screenshot of the vOSC(t)
signal for this project. The cursors in the figure show the
TSLEEP time to be 29.2 ms, which is close to the nominal of
30 ms.
Figure 7. vOSC(t) Waveform for the FixedRef Project
For this project, ROSC is a 1 MΩ, ±1% resistor and COSC is a
0.1 μF, ±10% X7R ceramic capacitor. VRef is the fixed VBG
voltage which is nominally 1.3V and VDD is 5 V. This
creates a nominal TSLEEP of 30 ms with an accuracy of
approximately ±11%.
There are two primary functions in main.c. The first is
named Sleep and is used to execute a number of sleep
cycles determined by a parameter passed to the function.
There is a defined label near the top of main.c called
TOTAL_SLEEP_TIME. The number of desired milliseconds
is entered for this label to determine the total length of
sleep time. The TSLEEP definition is defined to be 30 to
match the 30.1 ms solution for TSLEEP. The software
automatically calculates the number of sleep cycles to
execute to achieve the total sleep time desired.
The second primary function is named DoSomething. All
it does is toggle a GPIO port pin. This function represents
the user’s application code. The HIGH time of this toggled
GPIO pin should be approximately one second. This
signal output is on P1[2].
5
See application note AN2014 for more information on ISSP
programming.
www.cypress.com
Dynamic Reference Project
The second example project is named “DynRef”. It
implements the solution discussed in the Dynamic
Reference Implementation section of this application note.
Figure 4 shows the circuit that is also used with this
example project. The CY8C27443-24PXI device is used
for the project. This 28-pin DIP package device can be
used with the CY3210-PSoCEval1 kit to easily implement
this project.
This “DynRef” example project is similar to the “FixedRef”
example project. The differences between the two are
discussed in this section.
6
See application note AN2014 for more information on Dynamic
Reconfiguration.
Document No. 001-47215 Rev. *B
6
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
For this project, ROSC is a 1 MΩ, ±1% resistor and COSC is a
0.1 μF, ±10% X7R ceramic capacitor. VRef1 is 3.75 V
(0.75VDD) and VRef2 is 210 mV (0.042VDD). VDD is also 5 V
for this project. This creates a nominal TSLEEP of 411 ms
(solved with Equations 6 and 7) with an accuracy of about
±11%.
Figure 8 shows an oscilloscope screenshot of the vOSC(t)
signal for this project. The cursors in the figure show the
total TSLEEP time to be 436 ms, which is close to the
nominal of 411 ms and is within the expected accuracy of
11%.
This project also has a Sleep function and a
DoSomething function. Both of these functions do the
same thing they do in the “FixedRef” project. However, the
Sleep function in this project must take care of executing
one sleep cycle on the rising edge of vOSC(t) and a second
sleep cycle on the falling edge of vOSC(t). Also, much of the
code that manages the vOSC(t) signal is moved to the
CMP_LP user module’s interrupt service routine (ISR).
This ISR is written in C code and is located in main.c.
Because of the longer sleep cycles in this project, only two
of them are executed in main.c. This means the toggled
pin output signal on P1[2] should have a HIGH time of
approximately 822 ms because each sleep cycle is
411 ms long.
Figure 8. vOSC(t) Waveform for the DynRef Project
www.cypress.com
Document No. 001-47215 Rev. *B
7
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
Summary
About the Author
This application note discusses methods to achieve sleep
timing that is more accurate than when using the ILO. The
methods are also less expensive than using an external
crystal. This application note is also applicable for any
other application where a reference frequency that is more
accurate than the PSoC’s internal sleep timer is needed,
without the extra cost of a crystal. Two example projects
that implement the methods discussed accompany this
application note.
www.cypress.com
Name:
Ben Kropf.
Title:
Applications Engineer Staff
Background:
Graduated with a B.S. degree in
Electrical Engineering from Seattle
Pacific
University.
Professional
experience
includes
mixed-signal
embedded system design, firmware
and software design, high brightness
LED applications, and switching power
supplies.
Document No. 001-47215 Rev. *B
8
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
Document History
Document Title: PSoC® RC Oscillator to Accurately Time Sleep Cycles - AN47215
Document Number: 001-47215
Revision
ECN
Orig. of
Change
Submission
Date
Description of Change
**
2525145
BTK
07/02/08
New application note.
*A
3320371
ANUP
07/19/11
Updated Software Version.
Updated Example Projects.
*B
4461278
PMAD
07/30/2014
®
Updated Software Version as “PSoC Designer 5.4”.
Updated Example Projects.
Updated attached Example Projects.
Updated in new template.
Completing Sunset Review.
www.cypress.com
Document No. 001-47215 Rev. *B
9
®
PSoC RC Oscillator to Accurately Time Sleep Cycles
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Document No. 001-47215 Rev. *B
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