DC1766A - Demo Manual

DEMO MANUAL DC1766A
LTC6957-3/LTC6957-4
Low Phase Noise, Dual CMOS Output
Buffer/Driver/Logic Converter
Description
Demonstration Circuit 1766A features the LTC®6957-3/
LTC6957-4, a low phase noise, dual CMOS output buffer/
driver/logic converter.
The DC1766A provides SMA connectors for the differential
inputs and the CMOS outputs. The inputs are terminated
to on-board 50Ω resistors and the outputs present similar
impedance. The DC1766A allows the user to take advantage
of the shutdown and bandwidth selection features of the
LTC6957. The DC1766A can operate with a single-ended or
differential sine wave or square-wave input signal. Supply
the DC1766A with 3.3V and it is ready to function. Or, the
output can be powered from a lower voltage supply if a
lower voltage CMOS driver is desired. The DC1766A gives
extra component population options to make it compatible
with different logic signal types.
Design files for this circuit board are available at
http://www.linear.com/demo
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Figure 1. DC1766A Inputs and Outputs
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DEMO MANUAL DC1766A
Quick Start Procedure
The DC1766A is very straightforward to operate. Refer to
Figure 1 for the following discussion.
DC1766A Configuration
1.Apply a low-noise and low-spurious 3.3V supply between
the V+ (E1) and GND (E2) turrets.
2.Make sure that jumper VDD (JP7) is at the V+ position
if 3.3V CMOS output operation is desired. Otherwise,
apply a voltage that is between 2.4V and 3.3V between
the VDD (E4) and GND (E3) turrets, and move jumper
VDD (JP7) to EXT position to operate the CMOS outputs
at the voltage level supplied at the VDD turret.
3.Connect a low phase noise (or jitter) single-ended or
differential input signal to IN+ (J1) and/or IN– (J2)
SMA connectors. Refer to the LTC6957 data sheet for
appropriate input signal types and levels.
4.Connect either of the outputs (OUT1, J3 or OUT2, J4)
to a high-speed scope, spectrum analyzer or a signal
analyzer to start the evaluation of the LTC6957.
5.Configure the input bandwidth of the LTC6957 with the
use of FILTA (JP1) and FILTB (JP2) jumpers. Follow the
instructions given in the LTC6957 data sheet to choose
the correct bandwidth given an input signal.
6.Shut down an unused output by using jumper SD1 (JP3)
to shutdown OUT1 or jumper SD2 (JP4) to shutdown
OUT2.
DC1766A Reconfiguration
The DC1766A is flexible and allows the connectivity of a
variety of input and output signal types. The DC1766A is
configured as shown in the schematic diagram. However,
the DC1766A allows the installation of different input and
output configurations to adapt to a variety of logic signals. Refer to the Applications Information section of the
LTC6957 data sheet for all possible connectivity options
that can be implemented by modifying the DC1766A.
NOTE: The CMOS outputs of the DC1766A are ACcoupled and attenuated through two 100Ω resistors as
shown in the DC1766A schematic diagram to present
a 50Ω source impedance appropriate to connect to a
50Ω input impedance instrument.
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DEMO MANUAL DC1766A
Assembly Options
Table 1. DC1766A Assembly Options
ASSEMBLY VERSION
PART NUMBER
OUTPUT TYPE
DC1766A-A
LTC6957HMS-3
In-Phase CMOS
DC1766A-B
LTC6957HMS-4
Complementary CMOS
Layout Top Layer
The top metal layer of the DC1766A is shown here as an example of good PCB layout for the LTC6957-3/LTC6957-4.
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DEMO MANUAL DC1766A
Parts List
ITEM
QTY
REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
DC1766A General BOM
1
4
C1, C4, C6, C8
CAP., X7R, 0.01µF 50V 10%, 0603
NIC, NMC0603X7R103K50TRP
2
2
C13, C23
CAP., X7R, 0.1µF 50V 10%, 0603
TDK, C1608X7R1H104K
3
2
C14, C15
CAP., X5R, 1µF 25V 10%, 0603
TDK, C1608X5R1E105K
4
2
C16, C17
CAP., TANT, 22µF 10V, 3528
AVX, TPSB226K010R0400
5
4
E1, E2, E3, E4
TESTPOINT, TURRET 0.094"
MILLMAX, 2501-2-00-80-00-00-07-0
6
5
JP1, JP2, JP3, JP4, JP7
JMP, HD1X3-079
SAMTEC, TMM-103-02-L-S
7
4
J1, J2, J3, J4
CONN., SMA 50Ω EDGE-LAUNCH
E.F. JOHNSON, 142-0701-851
8
4
R1, R2, R20, R22
RES., CHIP, 100Ω 1% 0603
VISHAY, CRCW0603100RFKEA
9
0
R3, R4, R6, R11, R14
RES., OPT 0603
OPT
10
2
R7, R15
RES., CHIP, 49.9Ω 1% 0603
VISHAY, CRCW060349R9FKEA
11
4
R16, R17, R18, R19
RES., CHIP, 330k 1% 0603
VISHAY, CRCW0603330KFKEA
12
4
STAND-OFF, NYLON 0.500
KEYSTONE, 8833 (SNAP ON)
13
5
SHUNT, .079" CENTER
SAMTEC, 2SN-BK-G
DC1766A General BOM
DC1766A
IC, LTC6957HMS-3, MS12
LINEAR TECH., LTC6957HMS-3
DC1766A GENERAL BOM
DC1766A
IC, LTC6957HMS-4, MS12
LINEAR TECH., LTC6957HMS-4
DC1766A-A
1
1
2
1
U1
DC1766A-B
1
1
2
1
U1
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
A
COMPLEMENTARY CMOS
-B
5
1. ALL RESISTORS AND CAPACITORS ARE 0603.
V+
6
5
4
3
2
1
V+
1
2
3
*
R18
330k
FILTB
4
3
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
12
7
8
9
10
11
V+
SCALE = NONE
3
2
1
JP4
SD2
L
H
3
REV
L
H
DATE:
N/A
SIZE
VDD
C17
22uF
10V 3528
VDD
2.4V - 3.45V
E4
__
ECO
2
DESCRIPTION
C4
0.01uF
C1
0.01uF
R22
100
R4
OPT
VDD
R20
100
R3
OPT
VDD
MICHEL A.
SMA-R
J4
LTC6957HMS-3 / -4
DEMO CIRCUIT 1766A
2
12/17/2012, 01:39 PM
1
SHEET 1
LOW PHASE NOISE, DUAL CMOS OUTPUT
BUFFER/ DRIVER/ LOGIC CONVERTER
IC NO.
DATE
OUT2
OUT1
12-17-12
SMA-R
J3
APPROVED
1
3
OF 1
REV.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
R2
100
R1
100
PRODUCTION
REVISION HISTORY
TECHNOLOGY
C23
0.1uF
C15
1uF
TITLE: SCHEMATIC
3
2
1
JP3
SD1
GND
E3
V+
MICHEL A.
KIM T.
APPROVALS
R19
330k
SD2
GNDOUT
OUT2
INGND
VDD
OUT1
SD1
R17
330k
EXT
V+
IN+
JP7
VDD
V+
FILTA
U1
R16
330k
CUSTOMER NOTICE
FILTB
3
H
2
1
L
JP2
FILTA
3
H
2
1
L
JP1
V+
VDD
3
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
LTC6957HMS-4
U1
LTC6957HMS-3
ASSY
R15
49.9
C8
0.01uF
IN-PHASE CMOS
R14
OPT
C13
0.1uF
-A
SMA-R
V+
R11
OPT
R7
49.9
C6
0.01uF
NOTE: UNLESS OTHERWISE SPECIFIED
*
IN-
J2
SMA-R
R6
OPT
C14
1uF
+
B
C
IN+
J1
V+
C16
22uF
3528 10V
V+
V+
3.15V - 3.45V GND
E1
E2
4
+
D
5
A
B
C
D
DEMO MANUAL DC1766A
Schematic Diagram
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DEMO MANUAL DC1766A
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
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Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation
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Linear Technology Corporation
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●
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