DC1783A - Demo Manual

DEMO MANUAL DC1783A
LTC2380/LTC2379/LTC2378/
LTC2377/LTC2376: 18-Bit/16-Bit, 2Msps/1.6Msps/1Msps/
500ksps/250ksps Low Power, Low Noise ADCs
DESCRIPTION
The LTC2380/LTC2379/LTC2378/LTC2377/LTC2376 are
low power, low noise ADCs with serial outputs that can
operate from a single 2.5V supply. The following text refers
to the LTC2379-18 but applies to all parts in the family,
the only difference being the maximum sample rates and
the number of bits. The LTC2379-18 supports a ±5V fully
differential input range with a 101dB SNR, consumes
only 18mW and achieves ±2LSB INL max with no missing codes at 18-bits. The DC1783A demonstrates the DC
and AC performance of the LTC2379-18 in conjunction
with the DC590 QuikEval™ and DC718 PScope™ data
collection boards. Use the DC590 to demonstrate DC
performance such as peak-to-peak noise and DC linearity.
Use the DC718 if precise sampling rates are required or to
demonstrate AC performance such as SNR, THD, SINAD
and SFDR. The demonstration circuit 1783A is intended
to demonstrate recommended grounding, component
placement and selection, routing and bypassing for this
ADC. Several suggested driver circuits for the analog
inputs will be presented.
Design files for this circuit board are available at
http://www.linear.com/demo
L, LT, LTC, LTM, µModule, Linear Technology and the Linear logo are registered trademarks
and QuikEval and PScope are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
–9V
GND
+9V
CLK IN
100MHz MAX
3.3VP-P MAX
TO DC718
AIN+
0V TO VREF MAX
AIN–
0V TO VREF MAX
TO DC590
DC1783A F01
Figure 1. DC1783A Connection Diagram
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DEMO MANUAL DC1783A
DESCRIPTION
Table 1. DC1783A Assembly Options
ASSEMBLY VERSION
U1 PART NUMBER
MAX CONVERSION RATE
NUMBER OF BITS
MAX CLK IN FREQUENCY
DC1783A-A
LTC2380CMS-16
2Msps
16
100MHz
DC1783A-B
LTC2378CMS-16
1Msps
16
50MHz
DC1783A-C
LTC2377CMS-16
500ksps
16
25MHz
DC1783A-D
LTC2376CMS-16
250ksps
16
12.5MHz
DC1783A-E
LTC2379CMS-18
1.6Msps
18
99.2MHz
DC1783A-F
LTC2378CMS-18
1Msps
18
62MHz
DC1783A-G
LTC2377CMS-18
500ksps
18
31MHz
DC1783A-H
LTC2376CMS-18
250ksps
18
15.5MHz
QUICK START PROCEDURE
DC718
DC590 SETUP
Check to make sure that all switches and jumpers are
set as shown in the connection diagram of Figure 1. The
default connections configure the ADC to use the onboard
reference and regulators to generate the required common
mode voltages. The analog input is DC-coupled. Connect
the DC1783A to a DC718 USB High Speed Data Collection
Board using connector J2. Then, connect the DC718 to a
host PC with a standard USB A/B cable. Apply ±9V to the
indicated terminals. Then apply a low jitter signal source
to J4. The default setup uses a single-ended to differential
converter so that it is only necessary to apply a single-ended
input signal to J4. Connect a low jitter 100MHz 3.3VP-P
sine wave or square wave to connector J1. Note that J1
has a 50Ω termination resistor to ground.
IMPORTANT! To avoid damage to the DC1783A, make
sure that VCCIO (JP6) is set to 3.3V before connecting the
DC590 to the DC1783A.
To use the DC590 with the DC1783A, it is necessary to
apply –9V and ground to the –9V and GND terminals or
disable amplifier U15 by moving R32 and R36 to R31 and
R38 respectively. If U15 is disabled, it is required that J4
and J8 are both driven. If U15 is not disabled then it is
only necessary to drive J4. Connect the DC590 to a host
PC with a standard USB A/B cable. Connect the DC1783A
to a DC590 USB serial controller using the supplied
14-conductor ribbon cable. Apply a signal source to J4 or
J4 and J8 depending on how the DC1783A is configured.
Run the PScope software (PScope.exe version K72 or
later) supplied with the DC718 or download it from www.
linear.com.
Run the evaluation software supplied with the DC590 or
download it from www.linear.com. The correct control
panel will be loaded automatically. Click the COLLECT
button (Figure 7) to begin reading the ADC.
Complete software documentation is available from the
Help menu. Updates can be downloaded from the Tools
menu. Check for updates periodically as new features
may be added.
DC1783A SETUP
The PScope software should recognize the DC1783A and
configure itself automatically.
Click the COLLECT button (See Figure 6) to begin acquiring
data. The Collect button then changes to Pause, which can
be clicked to stop data acquisition.
DC Power
The DC1783A requires ±9VDC and draws 100mA. Most
of the supply current is consumed by the CPLD, opamps,
regulators and discrete logic on the board. The 9VDC
input voltage powers the ADC through LT1763 regulators
which provide protection against accidental reverse bias.
Additional regulators provide power for the CPLD and
opamps. See Figure 1 for connection details.
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DEMO MANUAL DC1783A
QUICK START PROCEDURE
Clock Source
Analog Input
You must provide a low jitter 3.3VP-P sine or square wave
to J1. The clock input is AC-coupled so the DC level of the
clock signal is not important. A generator like the HP8644
or the DC1216A-A is recommended. Even a good generator
can start to produce noticeable jitter at low frequencies.
Therefore it is recommended for lower sample rates to
divide down a higher frequency clock to the desired sample
rate. The ratio of clock frequency to conversion rate is
62:1 for 18-bit parts and 50:1 for 16-bit parts. If the clock
input is to be driven with logic, it is recommended that the
50Ω terminator (R5) be removed. Slow rising edges may
compromise the SNR of the converter in the presence of
high-amplitude higher frequency input signals.
The default driver for the analog inputs of the LTC2379-18
on the DC1783A is shown in Figure 2. This circuit converts
a single-ended 0V to 5V input signal applied at AIN+ into
a differential signal with a swing of ±5V between the +IN
and –IN inputs of the ADC. In addition, this circuit band
limits the input frequencies to approximately 800kHz.
Data Output
Parallel data output from this board (0V to 3.3V default),
if not connected to the DC718, can be acquired by a logic
analyzer, and subsequently imported into a spreadsheet, or
mathematical package depending on what form of digital
signal processing is desired. Alternatively, the data can be
fed directly into an application circuit. Use pin 3 of J2 to
latch the data. The data can be latched using either edge
of this signal. The data output signal levels at J2 can also
be reduced to 0V to 2.5V if the application circuit cannot
tolerate the higher voltage. This is accomplished by moving JP3 to the 2.5V position.
Reference
The default reference is a LTC6655 5V reference. Alternatively, if a lower power reference is desired, this reference
(U20) can be removed and a LTC6652 5V reference can
be installed in the U10 position. This will result in only
a small loss in performance in applications where the
ADC is continuously converting. If an external reference
is used it must settle quickly in the presence of glitches
on the REF pin.
R32
20Ω
AIN
0V TO VREF
C19
0.003µF
NPO
LT6350
VREF/2
C45
10µF
C39
0.003µF R16
0Ω
NPO
R36
20Ω
C40
R19
0.003µF 0Ω
NPO
+
LTC2379-18
–
DC1783A F02
Figure 2. Single-Ended to Differential Converter
Alternatively, if your application circuit produces a differential signal which can drive the ADC but you need to level
shift the input signal, the circuit shown in Figure 3 can be
used. The circuit in Figure 3 AC-couples the input signal
and is usable down to about 10kHz. The lower frequency
limit can be extended by increasing C17 and C48.
AC-coupling the input may degrade the distortion performance of the ADC due to nonlinearity of the coupling
capacitor (C17). The circuit in Figure 3 can be implemented
on the DC1783A by putting JP1 and JP5 in the AC position, moving R32 and R36 to the R31 and R38 positions
and adding a 1k resistor at the R9 location. At this point
it will be necessary to drive both AIN+ and AIN–. One of
these RC pairs can be attached to the input of the circuit
in Figure 2. This allows a single-ended input signal to be
level shifted.
One of the most asked for ADC driver circuits is one that
allows the input voltage to swing below ground while using
a single supply ADC. The input driver shown in Figure 4
accepts a true bipolar input voltage range of ±10V and
converts it to the 0V to 5V input swing of the ADC. The
circuit of Figure 4 can be implemented on the DC1783A
by replacing R9 with 499Ω, R15 with 2k, R35 with 2k and
R45 with 499Ω.
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DEMO MANUAL DC1783A
QUICK START PROCEDURE
Data Collection
VCM
R9
499Ω
For SINAD, THD or SNR testing a low noise, low distortion
generator such as the B&K Type 1051 or Stanford Research
DS360 should be used. A low jitter RF oscillator such as
the HP8644 or DC1216A-A is used as the clock source.
This demo board is tested in house by attempting to
duplicate the FFT plot shown on the front page of the
LTC2379-18 data sheet. This involves using a 100MHz clock
source, along with a sinusoidal generator at a frequency of
2kHz. The input signal level is approximately –1dBFS. The
input is level shifted and filtered with the circuit shown in
Figure 5. A typical FFT obtained with DC1783A is shown
in Figure 6. Note that to calculate the real SNR, the signal
level (F1 amplitude = –1.080dB) has to be added back to
the SNR that PScope displays. With the example shown in
Figure 6 this means that the actual SNR would be 101.07dB
instead of the 99.99dB that PScope displays. Taking the
RMS sum of the recalculated SNR and the THD yields
a SINAD of 100.7dB which is fairly close to the typical
number for this ADC.
There are a number of scenarios that can produce misleading results when evaluating an ADC. One that is
common is feeding the converter with a frequency, that
VCM
AIN+
0V TO VREF
AIN–
0V TO VREF
C17
10µF
R9
1k
R31
20Ω
C39
0.003µF R16
0Ω
NPO
+IN
C19
0.003µF
NPO
C48
10µF
R40 R38
1k 20Ω
VCM
–IN
C40
R19
0.003µF 0Ω
NPO
DC1783A F03
Figure 3. AC-Coupled Differential Driver
LT6350
8
R15
2k
+
–
1
10V TO –10V
AIN
R35
2k
–
+
2
+
–
R45
499Ω
4
0V TO 5V
TO IN+
5
5V TO 0V
TO IN–
DC1783A F04
VCM = VREF /2
Figure 4. ±10V Single-Ended to 0V to 5V Differential
DC-Coupled Driver
VREF
1k
SINE IN
–VREF TO +VREF
1k
AIN+
0.15µF
DC1783A F05
Figure 5. Level Shift and Filter Circuit Used for Board Testing
is a sub-multiple of the sample rate, and which will only
exercise a small subset of the possible output codes. The
proper method is to pick an M/N frequency for the input
sine wave frequency. N is the number of samples in the
FFT. M is a prime number between one and N/2. Multiply
M/N by the sample rate to obtain the input sine wave
frequency. Another scenario that can yield poor results
is if you do not have a signal generator capable of ppm
frequency accuracy or if it cannot be locked to the clock
frequency. You can use an FFT with windowing to reduce
the leakage or spreading of the fundamental, to get a close
approximation of the ADC performance. If an amplifier or
clock source with poor phase noise is used, the windowing
will not improve the SNR.
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DEMO MANUAL DC1783A
QUICK START PROCEDURE
Layout
As with any high performance ADC, this part is sensitive
to layout. The area immediately surrounding the ADC on
the DC1783A should be used as a guideline for placement, and routing of the various components associated
with the ADC. Here are some things to remember when
laying out a board for the LTC2379-18. A ground plane is
necessary to obtain maximum performance. Keep bypass
capacitors as close to supply pins as possible. Use individual low impedance returns for all bypass capacitors.
Use of a symmetrical layout around the analog inputs will
minimize the effects of parasitic elements. Shield analog
input traces with ground to minimize coupling from other
traces. Keep traces as short as possible.
Component Selection
When driving a low noise, low distortion ADC such as
the LTC2379-18, component selection is important so
as to not degrade performance. Resistors should have
low values to minimize noise and distortion. Metal film
resistors are recommended to reduce distortion caused
by self heating. Because of their low voltage coefficients,
to further reduce distortion NPO or silver mica capacitors
should be used. Any buffer used to drive the LTC2379-18
should have low distortion, low noise and a fast settling
time such as the LT6350.
DC1783A JUMPERS
Definitions
JP1: Selects AC- or DC-coupling of AIN+. The default setting is DC.
JP2: VCM sets the DC bias for AIN+ and AIN– when the
inputs are AC-coupled. VREF/2 is the default setting.
JP3: VCCIO sets the output levels at J2 to either 3.3V or
2.5V. Use 3.3V to interface to the DC718 which is the
default setting.
JP5: Selects AC- or DC-coupling of AIN–. The default setting is DC.
JP6: FS selects whether the digital gain compression is
on or off. In the VREF position digital gain compression
is off and the analog input range at AIN+ is 0V to VREF. In
the 0.8VREF position digital gain compression is turned on
and the analog input range at AIN+ is 0.1VREF to 0.9VREF.
JP7: Selects –3.6V or ground for V–. The default is –3.6V.
Setting JP7 to ground is useful for evaluating single supply operation of the buffer when operating the ADC with
digital gain compression turned on.
JP8: Selects 8V or 5V for V+. The default is 8V. Setting JP8
to 5V is useful for evaluating single 5V supply operation
of the buffer when operating the ADC with digital gain
compression turned on.
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DEMO MANUAL DC1783A
QUICK START PROCEDURE
Figure 6. Pscope Screen Shot
Figure 7. QuikEval Screen Shot
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DEMO MANUAL DC1783A
PARTS LIST
ITEM
QTY
REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
1
17
C1-C5, C7, C10, C11, C13-C16, C41, C43,
C56, C57, C60
Capacitor, X5R, 0.1µF, 16V, 10%, 0603
AVX, 0603YD104KAT
2
12
C6, C9, C17, C24, C26, C29, C45, C48, C52,
C53, C61, C63
Capacitor, X5R, 10µF, 6.3V, 20%, 0603
TDK, C1608X5R0J106MT
3
13
C8, C12, C22, C25, C28, C44, C46, C51, C54,
C55, C59, C62, C64
Capacitor, X7R, 1µF, 16V, 10%, 0603
TDK, C1608X7R1C105K
4
0
C18, C47, C49, C58
Capacitor, 0603
OPT
5
1
C19
Capacitor, C0G, 3300pF, 50V, 10%, 1206
AVX, 12065A332KAT2A
6
1
C20
Capacitor, X5R, 47µF, 6.3V, 20%, 0805
Taiyo Yuden, JMK212BJ476MG-T
7
1
C21
Capacitor, X5R, 22µF, 16V, 20%, 1210
Taiyo Yuden, EMK325BJ226MM-T
8
4
C23, C27, C30, C50
Capacitor, X7R, 0.01µF, 16V, 10%, 0603
AVX, 0603YC103KAT
9
2
C39, C40
Capacitor, COG, 3300pf, 50V, 10%, 0603
Kemet, C0603C332K5GACTU
10
8
C31-C38
Capacitor, X7R, 0.1µF, 16V, 10%, 0402
TDK, C1005X7R1C104KT
11
1
C42
Capacitor, C0G, 15pF, 50V, 10%, 0603
AVX, 06035A150KAT2A
12
5
E1, E4, E6, E7, E10
TP, Turret, 0.094"
Mill-Max, 2501-2-00-80-00-00-07-0
13
5
E2, E3, E5, E8, E9
TP, Turret, 0.064"
Mill-Max, 2308-2-00-80-00-00-07-0
14
3
J1, J4, J8
Connector, BNC-5 Pins
Connex, 112404
15
1
J2
Connector, 40 Pins SMT, CON-EDGE40-100
Samtec, TSW-120-07-L-D
16
1
J3
Header, 2mm × 7mm, 0.079"
Molex, 87831-1420
17
1
J5
Header, 2mm × 5mm, 0.100", HD2X5-100
Samtec, TSW-105-07-L-D
18
7
JP1-JP3, JP5-JP8
Jumper, 1mm × 3mm, 0.100", HD1X3-100
Samtec, TSW-103-07-L-S
19
4
R1, R3, R4, R8
Resistor, Chip, 33Ω, 1%, 0603
NIC, NRC06F33R0TRF
20
10
R2, R6, R7, R13, R24, R29, R40, R43, R48,
R49
Resistor, Chip, 1k, 1%, 0603
NIC, NRC06F1001TRF
21
1
R5
Resistor, Chip, 49.9Ω, 1%, 1206
NIC, NRC12F49R9TRF
22
3
R10, R11, R12
Resistor, Chip, 4.99k, 1%, 0603
NIC, NRC06F4991TRF
23
6
R14, R33, R34, R39, R45, R46
Resistor, Chip, 0Ω, 1%, 0603
NIC, NRC06F0000TRF
24
1
R18
Resistor, Chip, 1k, 1%, 0603
NIC, NRC06F1001TRF
25
2
R16, R19
Resistor, Chip, 0Ω, 1%, 0402
NIC, NRC04F0000TRF
26
2
R17, R28
Resistor, Chip, 2k, 1%, 0603
NIC, NRC06F2001TRF
27
3
R20, R22, R23
Resistor, Chip, 1k, 1%, 0402
NIC, NRC04F1001TRF
28
1
R21
Resistor, Chip, 10k, 1%, 0603
NIC, NRC06F1002TRF
dc1783afb
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DEMO MANUAL DC1783A
PARTS LIST
ITEM
QTY
29
1
REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
R25
Resistor, Chip, 1.69k, 1%, 0603
NIC, NRC06F1691TRF
30
1
R26
Resistor, Chip, 1.54k, 1%, 0603
NIC, NRC06F1541TRF
31
1
R27
Resistor, Chip, 2.80k, 1%, 0603
NIC, NRC06F2801TRF
32
1
R30
Resistor, Chip, 10k, 1%, 0402
NIC, NRC04F1002TRF
33
0
R9, R15, R31, R35, R37, R38, R41
Resistor, 0603
OPT
34
2
R32, R36
Resistor, Chip, 20Ω, 1%, 0603
NIC, NRC06F20R0TRF
35
1
R42
Resistor, Chip, 5.62k, 1%, 0603
NIC, NRC06F5621TRF
36
1
R47
Resistor, Chip, 1.05k, 1%, 0603
NIC, NRC06F1051TRF
37
1
R50
Resistor, Chip, 249Ω, 1%, 0603
NIC, NRC06F2490TRF
38
1
R54
Resistor, Chip, 6.49k, 1%, 0603
NIC, NRC06F6491TRF
39
2
U2, U4
IC, Tinylogic ULP-A Unbuffered Inverter, SC70-5 Fairchild, NC7SVU04P5X
40
1
U3
IC, Single D Flip Flop, US8
ON Semi., NL17SZ74
41
3
U5, U13, U16
IC, LT1763CS8, SO8
Linear Technology, LT1763CS8
42
1
U6
IC, Single SPST Bus Switch, SC70-5
Fairchild, NC7SZ66P5X
43
1
U7
IC, Serial EEPROM, TSSOP
Microchip, 24LC025-I/ST
44
2
U8, U9
IC, Tinylogic UHS Inverter, SC70-5
Fairchild, NC7SZ04P5X
45
0
U10
IC, LTC6652AHMS8-5, MS8
OPT
46
1
U11
IC, Max II Family, TQFP100
Altera, EPM240GT100C5N
47
1
U12
IC, LT1763CS8-1.8, SO8
Linear Technology, LT1763CS8-1.8
48
1
U14
IC, LT1763CS8-2.5, SO8
Linear Technology, LT1763CS8-2.5
49
1
U15
IC, LT6350CMS8, MS8
Linear Technology, LT6350CMS8
50
1
U17
IC, LT1964ES5-SD, SOT23-5
Linear Technology, LT1964ES5-SD
51
1
U20
IC, LTC6655HMS8-5, MS8
Linear Technology, LTC6655HMS8-5
52
4
MTG1, MTG2, MTG3, MTG4
Stand-Off, Nylon (Snap On), 0.25" Tall
Keystone, 8831 (Snap On)
53
7
Shunts as Shown on Assy Dwg (JP1-JP3,
JP5-JP8)
Shunt, 0.100" Center
Samtec, SNT-100-BK-G
54
1
Stencil for Top Side
DC1783A
dc1783afb
8
DEMO MANUAL DC1783A
PARTS LIST
ITEM
QTY
REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
LTC2380CMS-16 – DC1783A-A
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2380CMS-16, MS16
Linear Technology, LTC2380CMS-16
LTC2378CMS-16 – DC1783A-B
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2378CMS-16, MS16
Linear Technology, LTC2378CMS-16
LTC2377CMS-16 – DC1783A-C
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2377CMS-16, MS16
Linear Technology, LTC2377CMS-16
LTC2376CMS-16 – DC1783A-D
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2376CMS-16, MS16
Linear Technology, LTC2376CMS-16
LTC2379CMS-18 – DC1783A-E
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2379CMS-18, MS16
Linear Technology, LTC2379CMS-18
3
1
R44
Resistor, Chip, 300Ω, 1%, 0402
NIC, NRC06F3000TRF
LTC2378CMS-18 – DC1783A-F
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2378CMS-18, MS16
Linear Technology, LTC2378CMS-18
3
1
R44
Resistor, Chip, 300Ω, 1%, 0402
NIC, NRC06F3000TRF
LTC2377CMS-18 – DC1783A-G
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2377CMS-18, MS16
Linear Technology, LTC2377CMS-18
3
1
R44
Resistor, Chip, 300Ω, 1%, 0402
NIC, NRC06F3000TRF
LTC2376CMS-18 – DC1783A-H
1
1
DC1783A
General BOM
2
1
U1
IC, LTC2376CMS-18, MS16
Linear Technology, LTC2376CMS-18
3
1
R44
Resistor, Chip, 300Ω, 1%, 0402
NIC, NRC06F3000TRF
dc1783afb
9
DEMO MANUAL DC1783A
SCHEMATIC DIAGRAM
dc1783afb
10
DEMO MANUAL DC1783A
SCHEMATIC DIAGRAM
dc1783afb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
DEMO MANUAL DC1783A
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation
dc1783afb
12 Linear Technology Corporation
LT 0313 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2011
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