DC1795A - Schematic

A
B
C
D
E
REVISION HISTORY
CS
SDO
SCLK
SDI
2
J19
OPT
E9
R37
330
J9
R39
330
1
0
R41
VCO-
J15
C25
C38
OPT
R40
150
6
C29
OPT
0603
3
GND
2
VTUNE
1
CPOUT
E4
GND
16
R12
RZ_P
196
0603
V+OA
OPT
OPT
0603
OPT
0603
5
V+OA
6
C5
0805
0.1uF
1
4
7361
NOTE: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE IN OHMS, 0402
2. ALL CAPACITORS ARE IN MICROFARADS, 0402
A
8
-INB
OUTB
V+
U2
CP_A
0603
OPT
4
V-
B
A
+INA
2
-INA
1
OUTA
LT1678IS8
V+OA
*
B
18
19
20
17
GND
V+
V+
V+
22
23
21
LV/CM-
LV/CM+
STAT1
V+P1
SYNC
PECL1+
C6
0.1uF
C3
20V
R1
47uF
7343
4.99K
R78
C56
R57
0
0.1uF
OPT
R77
C55
R52
0
0.1uF
OPT
R76
C54
R46
0
0.1uF
OPT
R75
C53
R42
0
0.1uF
OPT
R74
C52
GND
PECL1-
V+
V+P1
R31
0
0.1uF
V+VCO
V+P2
VCO+
PECL2+
VCO-
PECL2-
OPT
R66
C51
V+VCO
V+P2
R24
0
0.1uF
V+
V+P3
GND
PECL3+
V+CP
PECL3-
OPT
R65
C50
CP
V+P3
0
0.1uF
OPT
R64
C49
R21
0
0.1uF
J17
PECL0+
J16
PECL0-
J13
PECL1+
J12
PECL13
12
11
10
9
8
7
6
5
4
3
2
R22
1
J8
PECL2+
J7
PECL2-
J11
PECL3+
J10
PECL3-
2
C67
C58
0.1uF
R69
OPT
0603
R8
OPT
C71
R6
OPT
CP
R16 0.1uF
49.9
C70
C57
R7
49.9
0.1uF
R20
R19
OPT
100
R33
OPT
R23
OPT
R9
OPT
V+
C40
J4
U9
4
5
6
OPT
REF
R17
OPT
0
OUT+
GND
OUT-
EN
VCC
VTUNE
3
2
1
EN-XO
CCHD-575-25-100
V+XO
C66
0.1uF
R73 0
V+CP
3
OPT
OPT
0603
+
47uF
+
C30
35V
7
+INB
RZ_A OPT
V+P0
13
CP_P
0.056uF
0603
R70
0
0603
R71
OPT
0603
1206
CI1_A
OPT
E7
E2
R72
0
0603
CI2_A
0603
J3
R67
GND
0
0603
R68
40
0603
R18
OPT
0603
38
39
CI1_P 0.1uF
V+VCO
0603
V+CP
0.1uF
1206
+
CPOUT
C22
OPT
C28
CI2_P 0.56uF
CS
24
5
GND
7
14
34
35
0.1uF
0805
C23
47uF
35V
7361
33
100pF
4
GND
GND
13
C24
2
32
37
GND
GND
12
GND
31
R35
200K
36
U3
OPT
RFOUT
GND
11
GND
8
V+VCO
GND
GND
10
GND
15
V+VCO
E16
9
VCC
GND
30
C68
OPT
E17
29
R29
49.9
150
OPT
R32
100pF
R25
STAT2
14
GND
R43
4
PECL0-
16
15
49
OUT+
CVCSO-914-1000
SDI
GND
GND
28
V+P0
PECL0+
48
OUT-
27
SCLK
V+
EN
5
C72
U1
LTC6950IUHH
V+
47
VCC
R36
OPT
37.4
26
V+REF
3
VTUNE
6
25
REF+
2
OPT
R28
49.9
46
E8
R38
OPT
45
1
R26
47uF
7361
REF-
U4
R53
SML-010MT SML-010VT
44
V+VCXO
C69
OPT
OPT
V+REF
E5
C59
35V
0805
C27
0
43
EN
E6
V+VCXO
R44
0.1uF
SDO
C32
R55
0
V+
V+
R30
+
V+VCXO
OPT
GND
C26
OPT
GND
LVDS/CMOS-
R60
OPT
41
J14
*
VCO+
D2
RED
2
D1
GRN
R56
0
42
SYNC
J18
E10
1
SYNC
DATE
LVDS/CMOS+
R61
0
R62
E11
APPROVED
MICHEL A. 03-28-14
2
STAT1 (LOK)
DESCRIPTION
PRODUCTION
R63
0
4
3
REV
__
*
STAT2 (ERR)
ECO
0603
0.1uF
R2
4.99K
CUSTOMER NOTICE
THE LAYOUT FOOTPRINT FOR U4 AND U9 ACCEPTS
MOST OSCILLATORS IN 9mm X 14mm OR 5mm X
7.5mm PACKAGE WITH EITHER FOUR OR SIX PINS.
C
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
D
KIM T.
MICHEL A. TITLE: SCHEMATIC
1.4 GHZ LOW PHASE NOISE, LOW JITTER PLL WITH CLOCK DISTRIBUTION
SIZE
N/A
SCALE = NONE
TECHNOLOGY
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
DATE:
IC NO.
LTC6950IUHH
REV.
2
DEMO CIRCUIT 1795A
03/28/2014, 01:19 PM
SHEET 1
E
OF 2
1
A
B
C
LTC6950 BYPASS AND BULK CAPACITORS
V+ TO 5.25V
E1
GND
V+ = 3.15V - 3.45V
20V +
7343
E3
C41
0.1uF
C61
0.1uF
C62
0.1uF
C63
0.1uF
C64
0.1uF
C65
0.1uF
C73
0.1uF
C74
0.1uF
4
C42
0.01uF
0201
C43
0.01uF
0201
C44
0.01uF
0201
C45
0.01uF
0201
C46
0.01uF
0201
C47
0.01uF
0201
C48
0.01uF
0201
C60
0.01uF
0201
C12
0.01uF
0201
C13
0.01uF
0201
C14
0.01uF
0201
C15
0.01uF
0201
C16
0.01uF
0201
C17
0.01uF
0201
C18
0.01uF
0201
C19
0.01uF
0201
V+
20V +
7343
C8
1.0uF
0603
C7
47uF
C4
0.01uF
0201
C9
0.01uF
0201
C10
0.01uF
0201
C11
0.01uF
0201
E20
U6
NC7WZ17P6X
3
V+
DC590 SPI INTERFACE
R58
200K
1
6
R51 100
3
4
R54 100
2
SDO
3
GND
VCC
V+
5
U7
NC7WZ17P6X
R10
4.99K
SCL
SDA
WP
A2
A1
A0
WP
EEGND
1
6
3
4
2
GND
VCC
8
1
R79
100
C33
0.1uF
2
VCC(A)
V+
5
VCC(B)
6
DIR
5
GND
3
C36
CS
SCLK
0.1uF
R59 100
U8
74LVC1T45GW V+
4
6
5
7
3
2
1
C31
0.1uF
R14
200K
VCC
U5
24LC025-I /ST
R13
200K
GND
R5
4.99K
ARRAY
R4
4.99K
13
8 GND
3 GND
GND
1
V+ 2
5V
6
CS 4
SCK/SCL 7
MOSI/SDA 5
MISO
10
EEVCC 9
EESDA 11
EESCL 12
EEGND 14
AUX
V+DIG CS SCLK SDI
EEPROM
J5
HD2X7-079-MOLEX
2
E
V+
C2
1.0uF
0603
C1
47uF
E21
J2
BNC
GND
C39
0.1uF
V+CP
J1
BNC
4
D
V+
SDI
C35 0.1uF
2
C34
0.1uF
4
SDO
R11
0
0603
R15
200K
NOTE: EEPROM FOR BOARD IDENTIFICATION
CUSTOMER NOTICE
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
1
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
A
B
C
TECHNOLOGY
KIM T.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
MICHEL A. TITLE: SCHEMATIC
1.4 GHZ LOW PHASE NOISE, LOW JITTER PLL WITH CLOCK DISTRIBUTION
SIZE
N/A
SCALE = NONE
D
DATE:
IC NO.
LTC6950IUHH
REV.
2
DEMO CIRCUIT 1795A
03/24/2014, 05:07 PM
SHEET 2
E
OF 2
1
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