DC2094A - Demo Manual

DEMO MANUAL DC2094A
LTC2348/LTC2347/LTC2343:
16-/18-Bit, Octal, Quad and Dual
200ksps/400ksps/600ksps SAR ADCs
DESCRIPTION
Demonstration circuit 2094A shows the proper way to drive
the LTC®2348 family of ADCs. The LTC2348/LTC2347/
LTC2343 are low noise, high speed, simultaneous sampling
16-/18-bit successive approximation register (SAR) ADCs.
The following text refers to the LTC2348-18 but applies
to all parts in the family, the only differences being the
number of bits, number of channels and the maximum
sample rate. The LTC2348-18 has a flexible SoftSpan™
interface that allows conversion-by-conversion control of
the input voltage span on a per-channel basis. An internal
2.048V reference and 2X buffer simplify basic operation
while an external reference can be used to increase the
input range and the SNR of the ADC.
The DC2094 demonstrates the DC and AC performance of
the LTC2348-18 in conjunction with the DC590/DC2026 and
DC890 data collection boards. Use the DC590/DC2026 to
demonstrate DC performance such as peak-to-peak noise
and DC linearity. Use the DC890 if precise sampling rates
are required or to demonstrate AC performance such as
SNR, THD, SINAD and SFDR. The DC2094 is intended
to demonstrate recommended grounding, component
placement and selection, routing and bypassing for this
ADC. A suggested driver circuit for the analog inputs is
also presented.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2094A
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
SoftSpan, PScope and QuikEval are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
ASSEMBLY OPTIONS
Table 1. DC2094A Assembly Options
MAX
CONVERSION RATE
(ksps)
NUMBER OF
CHANNELS
NUMBER
OF BITS
MAX CLK IN
FREQUENCY
(MHz)
CLK IN/
fs RATIO
LTC2348-18
200
8 Simultaneous
18
60
300
DC2094A-B
LTC2347-18
400
4 Simultaneous
18
67.2
168
DC2094A-C
LTC2343-18
600
2 Simultaneous
18
61.2
102
DC2094A-D
LTC2348-16
200
8 Simultaneous
16
60
300
DC2094A-E
LTC2347-16
400
4 Simultaneous
16
67.2
168
DC2094A-F
LTC2343-16
600
2 Simultaneous
16
61.2
102
ASSEMBLY
VERSION
U1 PART
NUMBER
DC2094A-A
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1
DEMO MANUAL DC2094A
DC2094A CONNECTION DIAGRAM
Figure 1. DC2094A Connection Diagram
DC890 QUICK START PROCEDURE
Check to make sure that all switches and jumpers are
set to their default settings as described in the DC2094A
Jumpers section of this manual. The default connections
configure the ADC to use the onboard reference and regulators to generate all the required bias voltages. The analog
inputs by default are DC coupled. Connect the DC2094A
to a DC890 USB High Speed Data Collection Board using
connector P1. Then, connect the DC890 to a host PC with
a standard USB A/B cable. Apply ±16V to the indicated
terminals. Then apply a low jitter signal source to J5 and
J6. Use J7 to route the signal sources of J5 and J6 to the
desired AIN0-AIN7 inputs. Observe the recommended
input voltage range for each analog input. Connect a low
jitter 2.5VP-P sine wave or square wave to connector J1.
See Table 1 for the appropriate clock frequency. Note that
J1 has a 50Ω termination resistor to ground.
2
Run the PScope™ software (Pscope.exe version K79 or
later), which can be downloaded, from www.linear.com/
designtools/software.
Complete software documentation is available from the
Help menu. Updates can be downloaded from the Tools
menu. Check for updates periodically as new features
may be added.
The PScope software should recognize the DC2094A and
configure itself automatically.
Click the Collect button (see Figure 2) to begin acquiring
data. The Collect button then changes to Pause, which
can be clicked to stop data acquisition.
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DEMO MANUAL DC2094A
DC890 QUICK START PROCEDURE
Figure 2. PScope Screen Shot
DC590/DC2026 QUICK START PROCEDURE
IMPORTANT! To avoid damage to the DC2094A, make
sure that VCCIO (JP6 of the DC590, JP3 of the DC2026)
of the DC590/DC2026 is set to 3.3V before connecting
the DC590/DC2026 to the DC2094A.
source to J5 and J6. Use J7 to route the signal sources
of J5 and J6 to the desired AIN0-AIN7 inputs. No Clock is
required on J1 when using the DC590/DC2026. The clock
signal is provided by the DC590/DC2026.
To use the DC590/DC2026 with the DC2094A, it is necessary to apply ±16V and ground to the ±16V and GND
terminals of the DC2094A. Connect the DC590/DC2026
to a host PC with a standard USB A/B cable. Connect the
DC2094A to a DC590/DC2026 USB serial controller using
the supplied 14-conductor ribbon cable. Apply a signal
Run the QuikEval™ software (quikeval.exe version K105
or later), which is available from www.linear.com/designtools/software. The correct control panel will be loaded
automatically. Click the COLLECT button (Figure 6) to
begin reading the ADC.
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3
DEMO MANUAL DC2094A
DC2094A SETUP
DC POWER
The DC2094A requires ±16VDC and draws +175mA/–12mA.
Most of the supply current is consumed by the CPLD,
op amps, regulators and discrete logic on the board. The
±16VDC input voltage powers the ADC through LT1763
regulators, which provide protection against accidental
reverse bias. Additional regulators provide power for the
CPLD and opamps.
CLOCK SOURCE
You must provide a low jitter 2.5VP-P sine or square wave
to the clock input, J1. The clock input is AC coupled so the
DC level of the clock signal is not important. A generator
such as the Rohde & Schwarz SMB100A high speed clock
source is recommended to drive the clock input. Even a
good generator can start to produce noticeable jitter at
low frequencies. Therefore, it is recommended for lower
sample rates to divide down a higher frequency clock to
the desired sample rate. The ratio of clock frequency to
conversion rate is shown in Table 1. If the clock input is
to be driven with logic, it is recommended that the 49.9Ω
termination resistor (R4) be removed. Driving R4 with
discreet logic may result in slow rising edges. These slow
rising edges may compromise the SNR of the converter
in the presence of high-amplitude higher frequency input
signals.
DATA OUTPUT
Parallel data output from this board (0V to 2.5V by default),
if not connected to the DC890, can be acquired by a logic
analyzer, and subsequently imported into a spreadsheet, or
mathematical package depending on what form of digital
4
signal processing is desired. Alternatively, the data can
be fed directly into an application circuit. Use pin 50 of
P1 to latch the data. The data should be latched using the
negative edge of this signal. The data output signal levels
at P1 can also be increased to 0V to 3.3V if the application
circuit requires a higher voltage. This is accomplished by
moving JP2 to the 3.3V position.
Reference
The default reference is the LTC2348-18 internal 4.096V
reference. Alternatively, if a higher reference voltage is
desired, the LTC6655-5 reference (U7) can be used by
setting the REF jumper (JP1) to the EXT position and
installing a 0Ω resistor in the R7 position. This should
result in better SNR performance but may slightly degrade
the THD performance of the LTC2348-18.
Analog Inputs
All eight inputs have the same driver circuitry. An example
of the default driver circuit for the analog inputs of the
LTC2348-18 on the DC2094A is shown in Figure 3. The
circuit of Figure 3 provides a pseudo-differential output to
Channel 2 and Channel 3 of the LTC2348-18 with a maximum ±10.24V single-ended input voltage. Alternatively,
the two single-ended channels shown can be combined to
form a fully differential driver. In the circuit of Figure 3 this
is done by removing R131 and changing R141 to 0Ω. At
this point both AIN2 and AIN3 must be driven to ±5.12V to
achieve a full-scale input voltage for AIN2+ and AIN2– of
the LTC2348-18. Changing R146 and R142 in a similar way
would also allow AIN3+ and AIN3– of the LTC2348‑18 to
be driven fully differentially. Fully differential drive should
provide a slight improvement in THD performance.
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DEMO MANUAL DC2094A
DC2094A SETUP
Figure 3. ±10.24V Pseudo-Differential DC Coupled Driver
DC890 DATA COLLECTION
For SINAD, THD or SNR testing a low noise, low distortion generator such as the B&K Type 1051 or Stanford
Research SR1 should be used. A low jitter RF oscillator
such as the Rohde & Schwarz SMB100A is used to drive
the clock input. This demo board is tested in house by
attempting to duplicate the FFT plot shown in Typical
Performance Characteristics section of the LTC2348-18
data sheet. This involves using a 60MHz clock source,
along with a sinusoidal generator at a frequency of approximately 1kHz. The input signal level is approximately
–1dBFS. A typical FFT obtained with DC2094A is shown
in Figure 2. Note that to calculate the real SNR, the signal
level (F1 amplitude = –1.012dB) has to be added back to
the SNR that PScope displays. With the example shown in
Figure 2 this means that the actual SNR would be 96.68dB
instead of the 95.67dB that PScope displays. Taking the
RMS sum of the recalculated SNR and the THD yields
a SINAD of 96.5dB, which is fairly close to the typical
number for this ADC.
To change the default settings for the LTC2348-18 in
PScope, click on the Set Demo Bd Options button in the
PScope tool bar shown in Figure 4. This will open the
Configure Channels menu of Figure 5. In this menu it is
possible to set the input signal range and gain compression setting for each channel. There is also a button to
return PScope to the default DC2094A settings, which are
optimized for the default hardware settings of the DC2094A.
There are a number of scenarios that can produce misleading results when evaluating an ADC. One that is common
is feeding the converter with an input frequency, that is
a sub-multiple of the sample rate, and which will only
exercise a small subset of the possible output codes.
The proper method is to pick an M/N frequency for the
input sine wave frequency. N is the number of samples
in the FFT. M is a prime number between one and N/2.
Multiply M/N by the sample rate to obtain the input sine
Figure 4. PScope Tool Bar
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5
DEMO MANUAL DC2094A
DC890 DATA COLLECTION
wave frequency. Another scenario that can yield poor
results is if you do not have a signal generator capable of
ppm frequency accuracy or if it cannot be locked to the
clock frequency. You can use an FFT with windowing to
reduce the “leakage” or spreading of the fundamental, to
get a close approximation of the ADC performance. If an
amplifier or clock source with poor phase noise is used,
the windowing will not improve the SNR.
Figure 5. PScope Configuration Menu
DC590/DC2026 DATA COLLECTION
Due to the relatively low and somewhat unpredictable
sample rate of the DC590/DC2026, its usefulness is limited to noise measurement and data collection of slowly
moving signals. A typical data capture and histogram
are shown in Figure 6. To change the default settings for
the LTC2348-18 in QuikEval click on the Channel Config.
button. This will open the ConfigDialog menu of Figure 7.
In this menu it is possible to set the input signal range
and gain compression setting for each sequence. There
is also a button to return QuikEval to the default DC2094A
settings, which are optimized for the default hardware
settings of the DC2094A.
LAYOUT
As with any high performance ADC, this part is sensitive
to layout. The area immediately surrounding the ADC on
the DC2094A should be used as a guideline for placement, and routing of the various components associated
with the ADC. Here are some things to remember when
laying out a board for the LTC2348-18. A ground plane is
6
necessary to obtain maximum performance. Keep bypass
capacitors as close to supply pins as possible. Use individual low impedance returns for all bypass capacitors.
Use of a symmetrical layout around the analog inputs will
minimize the effects of parasitic elements. Shield analog
input traces with ground to minimize coupling from other
traces. Keep traces as short as possible.
COMPONENT SELECTION
When driving a low noise, low distortion ADC such as
the LTC2348-18, component selection is important so
as to not degrade performance. Resistors should have
low values to minimize noise and distortion. Metal film
resistors are recommended to reduce distortion caused
by self-heating. Because of their low voltage coefficients,
to further reduce distortion NPO or silver mica capacitors
should be used. Any buffer used to drive the LTC2348-18
should have low distortion, low noise and a fast settling
time such as the LT1355.
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DEMO MANUAL DC2094A
DC590/DC2026 DATA COLLECTION
Figure 6. QuikEval Screen Shot
Figure 7. QuikEval Configuration Menu
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DEMO MANUAL DC2094A
DC2094A JUMPERS
DEFINITIONS
JP1 – REF selects INT or EXT reference for the ADC. The
default setting is INT.
JP2 – VCCIO sets the output levels at P1 to either 3.3V
or 2.5V. Use 2.5V to interface to the DC890, which is the
default setting. Use 3.3V to interface to the DC2026.
JP3 – I/O selects LVDS or CMOS logic levels. The default
setting is CMOS. LVDS is for future use only.
JP4 – EEPROM is for factory use only. The default position is WP.
JP6 to JP12 – AIN0-AIN7 can be used to short individual
AIN inputs to ground or can be used drive the individual
AIN inputs. The default is to leave these open.
DC2094A CONNECTORS
DEFINITIONS
J3 – JTAG is for factory use only.
P1 – DC890 interface is used to communicate with the
DC890 controller.
J4 – DC590/DC2026 interface is used to communicate
with the DC2026 Linduino controller or DC590.
J1 – CLK provides the master clock for the DC2094A when
interfaced to the DC890.
J5 and J6 – Provide analog input voltages to AIN0-AIN7
of the ADC.
J2 – FPGA PROGRAM is used to program the FPGA. This
is for factory use only.
J7 – Routes the signals of J5 and J6 to AIN0-AIN7.
8
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DEMO MANUAL DC2094A
PARTS LIST
ITEM QTY REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
Required Circuit Components
1
13
C1-C3, C5-C9, C14-C16, C21, C47
CAP., X7R, 0.1µF, 25V, 10%, 0603
MURATA, GRM188R71E104KA01D
2
0
C4, C94, C95, C102, C103, C106-C109,
C113, C115-C119, C124, C125,
C130-C133, C137, C139-C141
CAP., 0402
OPT
3
2
C10, C12
CAP., X5R, 2.2µF, 25V, 20%, 0603
TDK, C1608X5R1E225M080AB
CAP., X7R, 47µF, 10V, 10%, 1210
MURATA, GRM32ER71A476KE15L
4
1
C11
5
8
C13, C25, C28, C30, C33, C36, C41, C44 CAP., X7R, 1µF, 50V, 10%, 0603
TAIYO YUDEN, UMK107AB7105KA-T
6
9
C23, C27, C29, C32, C35, C38, C40,
C43, C46
MURATA, GRM188R61E106MA73D
7
37
C17-C20, C22, C48-C69, C73, C84, C85, CAP., X7R, 0.1µF, 50V, 10%, 0402
C90-C92, C97, C105, C120, C128
MURATA, GRM155R71H104KE14D
8
1
C24
CAP., TANT, 47µF 25V, 20%, 7343
AVX, TPSD476M025R0250
CAP., X5R, 10µF 25V, 20%, 0603
9
6
C26, C31, C34, C37, C42, C45
CAP., X7R, 0.01µF, 50V, 10%, 0603
MURATA, GRM188R71H103KA01D
10
1
C39
CAP., X5R, 3.3µF 25V, 20%, 0603
TDK, C1608X5R1E335M
11
1
C70
CAP., X5R, 47µF 6.3V, 20%, 0805
SAMSUNG, CL21A476MQCLRNC
12
2
C71, C88
CAP., X5R, 4.7µF, 10V, 10%, 0603
SAMSUNG, CL10A475KP8NNNC
13
3
C72, C83, C89
CAP., X7R, 0.01µF, 16V, 10%, 0402
MURATA, GRM155R71C103KA01D
14
1
C74
CAP., X7R, 1nF, 50V, 10%, 0402
AVX, 04025C102KAT2A
15
3
C75, C76, C77
CAP., X7R, 22nF, 50V, 10%, 0402
MURATA, GRM155R71H223KA12D
16
2
C78, C93
CAP., X7R, 4.7nF, 50V, 10%, 0402
MURATA, GRM155R71H472KA01D
17
4
C79, C80, C81, C82
CAP., C0G, 10pF, 50V, 5%, 0402
MURATA, GRM1555C1H100JA01D
18
1
C86
CAP., X7R, 2.2nF, 50V, 10%, 0402
MURATA, GRM155R71H222KA01D
19
1
C87
CAP., TANT, 470µF 10V, 20%, 7343
AVX, TPSE477M010R0050
20
0
C100, C101, C112, C114, C126, C127,
C136, C138
CAP., 0805
OPT
21
2
C111, C122
CAP., NP0, 270pF, 50V, 2%, 0402
MURATA, GRM1555C1H271GA01D
22
4
D1, D2, D3, D4
DIODE, SCHOTTKY 30V 0.1A, SOD323
DIODES INC., BAT54WS-7-F
23
9
E1, E2, E4, E7-E12
TESTPOINT, TURRET, 0.064" pbf
MILL-MAX, 2308-2-00-80-00-00-07-0
24
3
E3, E5, E6
TESTPOINT, TURRET, 0.094" pbf
MILL-MAX, 2501-2-00-80-00-00-07-0
25
4
JP1, JP2, JP3, JP4
JMP, 1X3, 0.100", HD1X3-100
WÜRTH ELEKTRONIK, 61300311121
26
4
JP7, JP8, JP9, JP10
HEADER, 1X2, 0.100", HD1X2-100
SAMTEC, TSW-102-07-L-S
27
3
J1, J5, J6
CONN BNC FEM JACK PC MNT STRGHT, BNC5
AMPHENOL CONNEX, 112404
28
2
J2, J3
HEADER, 2X5, 0.100", HD2X5-100
WÜRTH ELEKTRONIK, 61301021121
29
1
J4
CONN., 14 Pin, 2mm
MOLEX, 87831-1420
30
1
J7
HEADER, 3X8, 0.100", HD3X8-100
SAMTEC, TSW-108-07-L-T
31
1
L1
FERRITE BEAD, 1206
MURATA, BLM31PG391SN1L
32
10
R1, R5, R21, R22, R36, R37, R39, R41,
R44, R46
RES., CHIP, 1k, 1/10W, 1% 0603
YAGEO, RC0603FR-071KL
33
15
R2, R3, R6, R8, R10-R20
RES., CHIP, 33Ω, 1/10W, 5% 0603
YAGEO, RC0603JR-0733RL
34
1
R4
RES., CHIP, 49.9Ω, 1/4W, 1% 1206
YAGEO, RC1206FR-0749R9L
35
0
R7
RES., 0603
OPT
36
5
R9, R109, R125, R133, R149
RES., CHIP, 0Ω, 1/10W, 0603
YAGEO, RC0603FR-070RL
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9
DEMO MANUAL DC2094A
PARTS LIST
ITEM QTY REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
37
0
R23, R50, R51, R53, R54, R56, R57,
R114, R115, R117-R119, R121, R128,
R137, R141, R142, R143-R145, R147
RES., 0402
OPT
38
40
R24-R31, R33, R49, R52, R62-R90
RES., CHIP, 33Ω, 1/16W, 5% 0402
YAGEO, RC0402JR-0733RL
39
17
R32, R47, R48, R55, R58, R105, R106,
R116, R120, R122, R130-R132, R139,
R146, R148, R155
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
40
2
R34, R38
RES., CHIP, 11.5k, 1/10W, 1% 0603
YAGEO, RC0603FR-0711K5L
41
1
R35
RES., CHIP, 5.62k, 1/10W, 1% 0603
YAGEO, RC0603FR-075K62L
42
1
R40
RES., CHIP, 1.07k, 1/10W, 1% 0603
YAGEO, RC0603FR-071K07L
43
1
R42
RES., CHIP, 1.58k, 1/10W, 1% 0603
YAGEO, RC0603FR-071K58L
44
1
R43
RES., CHIP, 3.09k, 1/10W, 1% 0603
YAGEO, RC0603FR-073K09L
45
1
R45
RES., CHIP, 1.43k, 1/10W, 1% 0603
YAGEO, RC0603FR-071K43L
46
11
R59, R60, R95-R103
RES., CHIP, 10k, 1/16W, 5% 0402
YAGEO, RC0402JR-0710KL
47
4
R91, R92, R93, R94
RES., CHIP, 4.99k, 1/10W, 1% 0603
YAGEO, RC0603FR-074K99L
48
1
R104
RES., CHIP, 1k, 1/16W, 5% 0402
YAGEO, RC0402JR-071KL
49
2
R126, R134
RES., CHIP, 100Ω, 1/16W, 1% 0402
YAGEO, RC0402FR-07100RL
50
4
U2, U3, U5, U13
IC., INVERTER UHS SINGLE, SC70-5
FAIRCHILD, NC7SZ04P5X
51
1
U4
IC., D-TYPE POS TRG SNGL, US8
ON SEMI., NL17SZ74USG
52
5
U6, U9, U10, U11, U12
IC., BUS SWITCH SPST SGL LV, SC70-5
FAIRCHILD, NC7SZ66P5X
53
1
U7
IC., 0.25ppm NOISE, LOW DRIFT PRECISION REF., MS8 LINEAR TECH., LTC6655BHMS8-5
54
1
U8
IC., I/O EXPANDER I2C 8B, SSOP20
NXP, PCF8574TS/3, 118
55
1
U14
IC., 200mA LDO MICROPWR REGULATORS, SOT23-5
LINEAR TECH., LT1964ES5-SD
56
5
U15, U16, U17, U18, U21
IC., 500mA LDO MICROPWR REGULATORS, SO8
LINEAR TECH., LT1763CS8
57
1
U19
IC, LINEAR REGULATOR, SO8
LINEAR TECH., LT3021ES8-1.2
58
1
U20
IC., 500mA LDO MICROPWR REGULATORS, SO8
LINEAR TECH., LT1763CS8-2.5
59
1
U22
IC, CYCLONE III FPGA 5K, EQFP144
ALTERA, EP3C5E144C7N
60
1
U23
IC, CONFIG DEVICE 4MBIT, SO8
ALTERA, EPCS4SI8N
61
1
U24
IC., SERIAL EEPROM, TSSOP8
MICROCHIP, 24LC024-I/ST
62
2
U26, U27
IC, DUAL 12MHz, OP AMP, SO8
LINEAR TECH., LT1355CS8
63
4
MH1-MH4
STAND-OFF, NYLON, 0.25"
KEYSTONE, 8831(SNAP ON)
64
12
SHUNTS AS ASSY DWG (JP1-JP4, J7)
SHUNT, 0.1" CENTER
WÜRTH ELEKTRONIK, 60900213421
10
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DEMO MANUAL DC2094A
PARTS LIST
ITEM QTY REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
DC2094A-A Required Circuit Components
1
1
2
4
C96, C104, C121, C129
CAP., X7R, 0.1µF, 50V, 10%, 0402
DC2094A-GENERAL BOM
TAIYO YUDEN, UMK105B7104KV-FR
3
6
C98, C135, C99, C110, C123, C134
CAP., NP0, 270pF, 50V, 2%, 0402
MURATA, GRM1555C1H271GA01D
4
4
JP5, JP6, JP11, JP12
HEADER, 1X2, 0.100", HD1X2-100
SAMTEC, TSW-102-07-L-S
5
6
R61, R113, R129, R140, R151, R156
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
6
6
R108, R152, R110, R123, R136, R150
RES., CHIP, 100Ω, 1/16W, 1% 0402
YAGEO, RC0402FR-07100RL
7
4
R107, R124, R135, R151
RES., CHIP, 0Ω, 1/10W, 0603
YAGEO, RC0603FR-070RL
8
0
R111, R154, R112, R127, R138, R153
RES., 0402
OPT
9
1
U1
I.C., 8-CH, LQFP48LX-7X7
LINEAR TECH., LTC2348ILX-18
10
2
U25, U28
IC, DUAL 12MHz, OP AMP, SO8
LINEAR TECH., LT1355CS8
DC2094A-B Required Circuit Components
1
1
2
4
DC2094A-GENERAL BOM
C96, C104, C121, C129
CAP., X7R, 0.1µF, 50V, 10%, 0402
TAIYO YUDEN, UMK105B7104KV-FR
3
2
C98, C135
CAP., NP0, 270pF, 50V, 2%, 0402
MURATA, GRM1555C1H271GA01D
4
0
C99, C110, C123, C134
CAP., 0402
OPT
5
4
JP5, JP6, JP11, JP12
HEADER, 1X2, 0.100", HD1X2-100
SAMTEC, TSW-102-07-L-S
6
10
R61, R113, R129, R140, R151, R156,
R112, R127, R138, R153
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
7
4
R107, R124, R135, R151
RES., CHIP, 0Ω, 1/10W, 0603
YAGEO, RC0603FR-070RL
8
2
R108, R152
RES., CHIP, 100Ω, 1/16W, 1% 0402
YAGEO, RC0402FR-07100RL
9
0
R110, R123, R136, R150, R111, R154
RES., 0402
OPT
10
1
U1
I.C., 4-CH, LQFP48LX-7X7
LINEAR TECH., LTC2347ILX-18
11
2
U25, U28
IC, DUAL 12MHz, OP AMP, SO8
LINEAR TECH., LT1355CS8
dc2094afa
11
DEMO MANUAL DC2094A
PARTS LIST
ITEM QTY REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
DC2094A-C Required Circuit Components
1
1
2
0
C96, C104, C121, C129, C98, C135,
C99, C110, C123, C134
CAP., X7R, 0.1µF, 50V, 10%, 0402
DC2094A-GENERAL BOM
OPT
3
0
JP5, JP6, JP11, JP12
HEADER, 1X2, 0.100", HD1X2-100
OPT
4
7
R61, R111, R154, R112, R127, R138,
R153
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
5
0
R107, R124, R135, R151
RES., CHIP, 0Ω, 1/10W, 0603
OPT
6
0
R108, R152, R113, R129, R140, R151,
R156, R110, R123, R136, R150
RES., 0402
OPT
7
1
U1
I.C., 2-CH, LQFP48LX-7X7
LINEAR TECH., LTC2343ILX-18
8
0
U25, U28
IC, DUAL 12MHz, OP AMP, SO8
OPT
DC2094A-D Required Circuit Components
1
1
2
4
C96, C104, C121, C129
CAP., X7R, 0.1µF, 50V, 10%, 0402
DC2094A-GENERAL BOM
TAIYO YUDEN, UMK105B7104KV-FR
3
6
C98, C135, C99, C110, C123, C134
CAP., NP0, 270pF, 50V, 2%, 0402
MURATA, GRM1555C1H271GA01D
4
4
JP5, JP6, JP11, JP12
HEADER, 1X2, 0.100", HD1X2-100
SAMTEC, TSW-102-07-L-S
5
0
R61, R111, R154, R112, R127, R138,
R153
RES., 0402
OPT
6
4
R107, R124, R135, R151
RES., CHIP, 0Ω, 1/10W, 0603
YAGEO, RC0603FR-070RL
7
6
R108, R152, R110, R123, R136, R150
RES., CHIP, 100Ω, 1/16W, 1% 0402
YAGEO, RC0402FR-07100RL
8
5
R113, R129, R140, R151, R156
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
9
1
U1
I.C., 8-CH, LQFP48LX-7X7
LINEAR TECH., LTC2348ILX-16
10
2
U25, U28
IC, DUAL 12MHz, OP AMP, SO8
LINEAR TECH., LT1355CS8
12
dc2094afa
DEMO MANUAL DC2094A
PARTS LIST
ITEM QTY REFERENCE
PART DESCRIPTION
MANUFACTURER/PART NUMBER
DC2094A-E Required Circuit Components
1
1
2
4
C96, C104, C121, C129
CAP., X7R, 0.1µF, 50V, 10%, 0402
DC2094A-GENERAL BOM
TAIYO YUDEN, UMK105B7104KV-FR
3
2
C98, C135
CAP., NP0, 270pF, 50V, 2%, 0402
MURATA, GRM1555C1H271GA01D
4
0
C99, C110, C123, C134
CAP., 0402
OPT
5
4
JP5, JP6, JP11, JP12
HEADER, 1X2, 0.100", HD1X2-100
SAMTEC, TSW-102-07-L-S
6
0
R61, R110, R123, R136, R150, R111,
R154
RES., 0402
OPT
7
4
R107, R124, R135, R151
RES., CHIP, 0Ω, 1/10W, 0603
YAGEO, RC0603FR-070RL
8
2
R108, R152
RES., CHIP, 100Ω, 1/16W, 1% 0402
YAGEO, RC0402FR-07100RL
9
9
R112, R127, R138, R153, R113, R129,
R140, R151, R156
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
10
1
U1
I.C., 4-CH, LQFP48LX-7X7
LINEAR TECH., LTC2347ILX-16
11
2
U25, U28
IC, DUAL 12MHz, OP AMP, SO8
LINEAR TECH., LT1355CS8
DC2094A-F Required Circuit Components
1
1
DC2094A-GENERAL BOM
2
0
C96, C104, C121, C129, C98, C135,
C99, C110, C123, C134
CAP., X7R, 0.1µF, 50V, 10%, 0402
OPT
3
0
JP5, JP6, JP11, JP12
HEADER, 1X2, 0.100", HD1X2-100
OPT
4
0
R61, R113, R129, R140, R151, R156,
R108, R152, R110, R123, R136, R150
RES., 0402
OPT
5
0
R107, R124, R135, R151
RES., CHIP, 0Ω, 1/10W, 0603
OPT
6
6
R111, R154, R112, R127, R138, R153
RES., CHIP, 0Ω, 1/10W, 0402
YAGEO, RC0402FR-070RL
7
1
U1
I.C., 2-CH, LQFP48LX-7X7
LINEAR TECH., LTC2343ILX-16
8
0
U25, U28
IC, DUAL 12MHz, OP AMP, SO8
OPT
dc2094afa
13
A
B
C
D
*
13
14
11
12
9
10
7
8
5
6
3
4
1
2
47
48
ASSY
-A
-B
-C
-D
-E
-F
5
U1
LTC2348-18
LTC2347-18
LTC2343-18
LTC2348-16
LTC2347-16
LTC2343-16
SUFFIX
48-18
47-18
43-18
48-16
47-16
43-16
-Bit
18
18
18
16
16
16
Ksps
200
400
600
200
400
600
-CHANNEL
8
4
2
8
4
2
4
AIN0AIN0+
AIN1AIN1+
AIN2AIN2+
AIN3AIN3+
AIN4AIN4+
AIN5AIN5+
AIN6AIN6+
AIN7AIN7+
1. ALL RESISTORS AND CAPACITORS ON THIS PAGE ARE 0603.
NOTES: UNLESS OTHERWISE SPECIFIED
AIN7+
AIN7-
AIN6+
AIN6-
AIN5+
AIN5-
AIN4+
AIN4-
AIN3+
AIN3-
AIN2+
AIN2-
AIN1+
AIN1-
AIN0+
VDD
VDDL
U1
LTC23XX
C14
0.1uF
50V
C10
2.2uF
C8
0.1uF
50V
C5
0.1uF
50V
C4
OPT
50V
VCC
VEE
*
REFBUF
E1
VCCIO
CNV
SDI
SDO7
SDO-/SDO6
SDO+/SDO5
SCKO-/SDO4
SCKO+/SCKO
SCKI-/SCKI
SCKI+/SDO3
SDI-/SDO2
SDI+/SDO1
SDO0
BUSY
CSL
LVDS/CMOSL
PD
24
37
36
35
34
33
32
29
28
27
26
25
38
39
23
22
C15
0.1uF
50V
C11
47uF 10V
1210
X7R
R21
1k
R22
1k
33
33
33
33
33
33
33
33
33
33
33
EXT
INT
R7
OPT
WRIN2 2
JP1
REF
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
1
2
3
REFBUF
C9
0.1uF
50V
C12
2.2uF
5
6
7
8
3
4
BNC
GND
4
3
2
1
R33
33 0402
C13
1uF
R4
49.9
1206
C3
0.1uF
5
CLR
GND
INTL
SCL
NC
SDA
VDD
A0
A1
NC
A2
P0
GND
4
20
19
18
17
16
15
14
13
12
11
GND
1
4
A
OE
0402
8
33
33
33
33
R28
R29
R30
R31
NC7SZ66P5X
U10
R32
0
2
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
VCCIO
SCALE = NONE
GUY H.
KIM T.
APPROVALS
SCKI-/SCKI
33
33
R26
R27
SDI_IN
33
33
R24
R25
4
WRIN
R3
33
0402 X 8PLCS
U6
3
NC7SZ66P5X
R9
0
R6
33
C6
0.1uF
NL17SZ74
U4
7
CUSTOMER NOTICE
WRIN2L
R8
33
PR
VCC
VCCIO
U3
NC7SZ04P5X
4
C2
0.1uF
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
NC7SZ66P5X
U9
VCC
1
A
OE
2
VCCIO
VCCIO C19
0.1uF
P7
P6
NC
P5
P4
VSS
P3
NC
P2
P1
PCF8574TS
U8
SDI 2 B
1
2
3
4
5
6
7
8
9
10
4
R2
33
6
C16
0.1uF
VCCIO
U2
4
C1
0.1uF
NC7SZ04P5X
LVDS/CMOSLIN
C17
0.1uF
0402
VCCIO
2
3
VCC
0402
R5
1k
R1
1k
VCCIO C18
0.1uF
V+
LVDS/CMOSL 2 B
GND
VOUT_S GND
VIN
SHDN
VOUT_F
GND
U7
J1
LTC6655BHMS8-5
NC7SZ04P5X
U13
VCCIO C22
0.1uF
0402
5V
CLK
100MHz MAX
2.5VPP
5
VCCIO
5
VCCIO
2
1
3
VCC
2
AIN0-
42
43
40
VDD
VDD
VDDL
31
OVDD
21
19
REFBUF
REFIN
16
17
45
VCC
VEE
VEE
GND
GND
GND
GND
GND
GND
OGND
46
44
41
20
18
15
30
4
5
3
5
3
3
GND
CP
Q
3
D
Q
5
4
OE
1
A
2 B
5
3
U5
SDA
SCL
AUX0
GND
CNV
TECHNOLOGY
WRIN2L
NC7SZ66P5X
U11
GND
4
NC7SZ66P5X
U12
CNV_IN
GUY H.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
1
A
OE
DATE
04-02-15
APPROVED
DATE:
B
SIZE
1
LTC23XXILX FAMILY
DEMO CIRCUIT 2094A
04/02/2015, 10:17 AM
IC NO.
SHEET 1
2
OF 4
REV.
8/4/2-CHANNEL, SOFTSPAN, HIGH SPEED, SERIAL, SAR, ADC
TITLE: SCHEMATIC
4
VCC
1
A
OE
CSB
CLKIN
VCCIO C21
0.1uF
VCC
0402
2 B
WRIN2
AUX1
AUX2
SCK_IN
LVDS/CMOSLIN
WRIN2
AUX1
VCCIO C20
0.1uF
SCK_IN
CNV_IN
LVDS /CMOSLIN
SCK_IN2
WRIN
SDI_IN
SCK_IN
CNV_IN
WRIN2
WRIN
SDI_IN
OPT
R23
LVDS/CMOSL
PRODUCTION
LVDS/ CMOSL
WRIN
2 B
1
DESCRIPTION
REVISION HISTORY
CNV
SDI
SDO7
SDO-/SDO6
SDO+/SDO5
SCKO-/SDO4
SCKO+/SCKO
SCKI-/SCKI
SCKI+/SDO3
SDI-/SDO2
SDI+/SDO1
SDO0
BUSY
2
REV
CNV
SDI
SDO7
SDO- /SDO6
SDO+ /SDO5
SCKO- /SDO4
SCKO+ /SCKO
SCKI- /SCKI
SCKI+/SDO3
SDI- /SDO2
SDI+ /SDO1
SDO0
BUSY
NC7SZ04P5X
2
C7
0.1uF
ECO
5
3
5
3
5
14
3
5
A
B
C
D
DEMO MANUAL DC2094A
SCHEMATIC DIAGRAM
dc2094afa
A
B
C
D
GND
+16V/+18V
5
E6
E3
C24
47uF 25V
7343
TANT
+16V/+18V
C44
1uF
25V
C41
1uF
25V
C39
3.3uF
25V
C36
1uF
25V
C33
1uF
25V
C30
1uF
25V
C25
1uF
25V
5
8
5
8
5
8
5
8
5
8
5
8
5
8
SHDN
IN
LT1763CS8
U21
SHDN
IN
LT1763CS8-2.5
U20
SHDN
IN
LT3021ES8-1.2
U19
SHDN
IN
LT1763CS8
U18
SHDN
IN
LT1763CS8
U17
SHDN
IN
LT1763CS8
U16
SHDN
IN
LT1763CS8
U15
GND
GND
GND
3
6
7
GND
GND
GND
3
6
7
GND
GND
GND
3
6
7
GND
GND
GND
3
6
7
GND
6
AGND
4
GND
GND
GND
3
6
7
GND
GND
GND
3
6
7
5
BYP
SEN
OUT
BYP
SEN
OUT
SEN
OUT
BYP
SEN
OUT
BYP
SEN
OUT
BYP
SEN
OUT
BYP
SEN
OUT
4
2
1
4
2
1
3
2
4
2
1
4
2
1
4
2
1
4
2
1
4
4
C45
0.01uF
C42
0.01uF
C37
0.01uF
C34
0.01uF
C31
0.01uF
C26
0.01uF
R46
1k
R45
1.43k
R44
1k
R43
3.09k
R41
1k
R40
1.07k
R39
1k
R38
11.5k
R37
1k
R35
5.62k
3
R42
1.58k
JP2
VCCINT
+3.3V
VCCIO
1
+2.5V
2
C46
10uF
25V
+3V
C43
10uF
25V
+2.5V
C40
10uF
25V
+1.2V
C38
10uF
25V
VDD
C35
10uF
25V
VCCIO
C32
10uF
25V
VCC
C29
10uF
25V
V+
VCC
V+
E12
+3V
+2.5V
+1.2V
VDD
VCCIO
E11
E10
E9
E8
E7
E4
3
3
-16V/-18V
E5
3
SHDN
IN
GND
ADJ
OUT
LT1964ES5-SD
4
5
R36
1k
R34
11.5k
1
C23 VEE
10uF
25V
2
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
GUY H.
KIM T.
APPROVALS
LTC Confidential-For Customer Use Only
B
DATE:
SIZE
1
LTC23XXILX FAMILY
DEMO CIRCUIT 2094A
03/12/2015, 11:32 AM
IC NO.
SHEET 2
2
OF 4
REV.
8/4/2-CHANNEL, SOFTSPAN, HIGH SPEED, SERIAL, SAR, ADC
TITLE: SCHEMATIC
VEE
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
E2
TECHNOLOGY Fax: (408)434-0507
1. ALL RESISTORS AND CAPACITORS ON THIS PAGE ARE 0603.
NOTES: UNLESS OTHERWISE SPECIFIED
C28
1uF
25V
CUSTOMER NOTICE
C27
10uF
25V
2
1
U14
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
-16V/-18V
2
A
B
C
D
DEMO MANUAL DC2094A
SCHEMATIC DIAGRAM
15
dc2094afa
A
B
C
D
19
27
36
41
48
57
63
82
95
108
118
123
131
140
145
1
2
3
4
7
10
11
22
23
BANK5
73
74
75
76
77
79
80
83
84
85
88
89
5
5
29
45
61
78
102
116
134
17
26
40
47
56
62
81
93
117
122
130
139
35
107
37
109
CYCLONE3-EP3C5E144
VCCINT
PWR
VCCINT
GND
VCCINT
GND
VCCINT
GNDA1 VCCINT
GND
VCCINT
GND
VCCINT
GND
VCCINT
GND
VCCIO1
GND
VCCIO2
GND
VCCIO3
GNDA2 VCCIO3
GND
VCCIO4
GND
VCCIO4
GND
VCCIO5
GND
VCCIO6
GND
VCCIO7
VCCIO7
VCCIO8
VCCIO8
VCCA1
VCCA2
VCCD_PLL1
VCCD_PLL2
U22A
CYCLONE3-EP3C5E144
IO1
IO2
IO3
IO4_RUP3
IO4_RDN3
IO5
IO6_VREF5
IO7
IO8_DIFFIOR8N
IO9_DIFFIOR8P
CLK7_DIFFCLK3N
CLK6_DIFFCLK3P
U22F
CYCLONE3-EP3C5E144
IO1
IO2
IO3
IO4
IO5_VREF1
IO6_DIFFL4P
IO7_DIFFL4N
CLK0
CLK1
BANK1
+
VCCD_PLL
C70
47uF
0805
+2.5V
C58
0.1uF
VCCIO
C48
0.1uF
+1.2V
33
33
R59
10k
C61
0.1uF
C51
0.1uF
C72
C73
0.01uF 0.1uF
C60
0.1uF
C50
0.1uF
C83
C89
C84
0.01uF 0.01uF 0.1uF
C71
4.7uF
0603
C59
0.1uF
C49
0.1uF
SDO0
CSB
LVDS/CMOSL
CNV_IN
SCK_IN
SDI_IN
WRIN
ID
R61
[2]
BANK2
24
25
28
30
31
32
33
34
BANK6
C90
0.1uF
C74
1nF
C62
0.1uF
C52
0.1uF
C85
0.1uF
C75
22nF
C63
0.1uF
C53
0.1uF
C91
0.1uF
C76
22nF
C64
0.1uF
C54
0.1uF
3
2
1
R63
R64
R66
R68
C92
0.1uF
C77
22nF
C65
0.1uF
C67
0.1uF
C68
0.1uF
SS0
SS1
SS2
A0
CMOS
LVDS
SDO7
CLKIN
BUSY
SDI
C69
0.1uF
C86
2.2nF
C93
4.7nF
+1.2V
L1
BLM31PG391SN1L
C78
4.7nF
C66
0.1uF
33
33
33
33
JP3
I/O
33
R49
VCCIO
33
R52
C55
0.1uF
90
91
100
104
105
106
CYCLONE3-EP3C5E144
CLK5_DIFFCLK2N
CLK4_DIFFCLK2P
IO1
IO2
IO3_VREF6
IO4
U22G
CYCLONE3-EP3C5E144
CLK2
CLK3
IO1
IO2
IO3_VREF2
IO4_RUP1
IO5_RDN1
IO6
U22C
BANK3
38
39
42
43
44
46
49
50
51
52
53
BANK7
110
111
112
113
114
115
119
120
121
124
125
126
127
CONFIG
6
8
9
12
13
14
15
16
18
20
21
86
87
92
94
96
97
98
99
101
103
CYCLONE3-EP3C5E144
IO1_DATA1
IO2_FLASH_NCE
N_STATUS
DCLK
IO3_DATA0
NCONFIG
TDI
TCK
TMS
TDO
NCE
IO4_DEV_OE
IO5_DEV_CLRN
CONF_DONE
MSEL0
MSEL1
MSEL2
IO6_INIT_DONE
IO7_CRC_ERROR
IO8_NCEO
IO9_CLKUSR
U22J
CYCLONE3-EP3C5E144
IO1
IO2
IO3
IO4
IO5_RUP4
IO6_RDN4
IO7_VREF7
IO8_DIFFIOT16N
IO9_DIFFIOT16P
IO10
IO11
IO12_DIFFIOT12N
IO13_DIFFIOT12P
U22H
CYCLONE3-EP3C5E144
IO1_DIFFIOB1P
IO2_DIFFIOB1N
IO3
IO4
IO5
IO6_VREF3
IO7_DIFFIOB9P
IO8_DIFFIOB9N
IO9
IO10_DIFFIOB11P
IO11_DIFFIOB11N
U22D
TDI
TCK
TMS
TDO
NCE
HD2X5-100
J3
1
3
5
7
9
TDI
4
3
BANK4
IO1_DIFFIOB12P
IO2_DIFFIOB12N
IO3
IO4_DIFFIOB16P
IO5_DIFFIOB16N
IO6
IO7_VREF4
IO8_RUP2
IO9_RDN2
IO10
IO11
IO12_DIFFIOB21P
IO13_DIFFIOB21N
IO14
U22E
54
55
58
59
60
64
65
66
67
68
69
70
71
72
BANK8
128
129
132
133
135
136
137
138
141
142
143
144
R104
1k
R95
10k
+3V
R69
R71
R72
R73
R75
R77
R79
R81
R83
R85
R87
R89
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
R57
OPT
R51
OPT
J2
1
3
5
7
9
NCS
DATA
VCC
GND
C81
10pF
+3V
C56
0.1uF
2
+3V
SCALE = NONE
GUY H.
KIM T.
V+
5V
EEVCC
EESDA
EESCL
EEGND
AUX
CS
SCK/SCL
MOSI/SDA
MISO
R93
4.99k
0603
CNV
SCK_IN2
SDI
SDO0
JP4
WP
PROG
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
1
2
3
SCL
SDA
VCCIO
EEPROM
R94
4.99k
0603
R91
4.99k
0603
DATE:
B
SIZE
1
LTC23XXILX FAMILY
DEMO CIRCUIT 2094A
03/12/2015, 11:32 AM
IC NO.
SHEET 3
2
OF 4
REV.
8/4/2-CHANNEL, SOFTSPAN, HIGH SPEED, SERIAL, SAR, ADC
LTC Confidential-For Customer Use Only
TECHNOLOGY Fax: (408)434-0507
10
9
11
12
14
6
4
7
5
1
2
6
5
7
3
2
1
R92
4.99k
0603
DC590/DC2026
SCL
SDA
WP
A2
A1
A0
24LC024-I /ST
EDGE-CON-100
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
P1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
C47
0.1uF
0603
HD2X7-079-MOLEX
J4
SS0
SS2
SS1
A1
A0
A2
IDOUT
D1
D0
D3
D2
CNVCLK
U24
CNVCLK
SYNC
D5
D4
D7
D6
D9
D8
D11
D10
D13
D12
D15
D14
D17
D16
TITLE: SCHEMATIC
C57
0.1uF
APPROVALS
C82
10pF
D4
BAT54WS
+3V
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
CUSTOMER NOTICE
C80
10pF
8
7
6
5
SDI+/SDO1
SDI-/SDO2
SCKI+/SDO3
SCKI-/SCKI
D3
BAT54WS
+3V
VCC
VCC
DCLK
ASDI
EPCS4SI8
U23
HD2X5-100
2
4
6
8
10
FPGA
PROGRAM
33
33
33
33
33
33
33
33
33
33
33
33
R56
OPT
R53
OPT
D2
BAT54WS
+3V
1
2
3
4
+3V
R58
0
R55
0
R48
0
R47
0
2
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
C79
10pF
D1
BAT54WS
+3V
CYCLONE3-EP3C5E144
IO1_DIFFIOT11N
IO2_DIFFIOT11P
IO3_DIFFIOT10N
IO4_DIFFIOT10P
IO5
IO6_VREF8
IO7
IO8
IO9
IO10
IO11_DIFFIOT01N
IO12_DIFFIOT01P
U22I
CYCLONE3-EP3C5E144
R100
10k
TCK
TDO
TMS
R103
10k
R99
10k
JTAG
2
4
6
8
10
R102
10k
R98
10k
IDOUT
D0
D1
SYNC
CNVCLK
D2
D3
D4
D5
A1
A2
R101
10k
R97
10k
33
33
33
33
33
33
33
33
33
33
33
SCKO+/SCKO
SCKO-/SDO4
SDO+/SDO5
SDO-/SDO6
VCCIO
+2.5V
R96
10k
VCCIO
R74
R76
R78
R80
R82
R84
R86
R88
R90
R62
R70
R54
OPT
R50
OPT
2. R61 IS O OHMS ON ASSEMBLY TYPES A,B,C,D AND OPTIONAL ON E,F,G,H. (SEE ASSY TABLE ON PAGE 4)
1. ALL RESISTORS AND CAPACITORS ON THIS PAGE ARE 0402.
NOTES: UNLESS OTHERWISE SPECIFIED
C87
C88
470uF 4.7uF
7343 0603
R65
R67
R60
10k
VCCIO
VCCIO
AUX0
AUX1
WRIN2
LVDS/CMOSLIN
1
2
U22B
1
2
8
VCC
GND
4
3
1
2
ARRAY
4
1
2
EEPROM
GND
GND
GND
16
13
8
3
5
A
B
C
D
DEMO MANUAL DC2094A
SCHEMATIC DIAGRAM
dc2094afa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
A
B
C
D
U1
ASSY
X
BNC
LTC2348-18
LTC2347-18
LTC2343-18
LTC2348-16
LTC2347-16
LTC2343-16
(PAGE 1)
X
X
8-CH
4-CH
2-CH
-A
-B
-C
-D
-E
-F
J6
BNC
17
9
18
10
19
11
20
12
21
13
22
14
23
15
24
16
X
X
X
X
VIN2 VIN1
8
7
6
5
4
3
2
1
J7
HD3X8-100
X
AIN7
AIN6
AIN5
AIN4
AIN3
AIN2
AIN1
AIN0
X
X
X
X
AIN3
AIN2
AIN1
AIN0
X
X
5
8
4
2
8
4
2
0.1uF
0.1uF
OPT
0.1uF
0.1uF
OPT
-CH C96,C104,
C121,C129
270pF
270pF
OPT
270pF
270pF
OPT
C98,
C135
JP8
JP7
*
JP6
*
JP5
0603
R149
0
0603
R133
0
0603
*
R124
0603
*
R107
C136
0805
OPT
C126
0805
OPT
C112
0805
OPT
C100
0805
OPT
2
3
R145
OPT
6
5
2
3
R119
OPT
6
5
-
+
-
+
-
+
-
+
*
*
C96
*
C120
0.1uF
C140
OPT
R155
0
1
LT1355CS8
C132
OPT
R139
0
U26A
VEE
C128
0.1uF
7
LT1355CS8
U26B
VCC
C116
OPT
*
R129
1
*
C108
OPT
R113
U25A
VEE
*
C104
7
U25B
VCC
R146
0
R131
0
R120
0
R105
0
R141
OPT
R114
OPT
*
R150
R142
OPT
R134
100
*
R123
R115
OPT
*
R108
*
R153
R137
OPT
*
R127
*
R111
3
*
C137
OPT
*
C134
C130
OPT
C124
OPT
C122
270pF
C118
OPT
C113
OPT
*
C110
C106
OPT
C102
OPT
C98
C94
OPT
270pF
OPT
OPT
270pF
OPT
OPT
STUFF
STUFF
OPT
STUFF
STUFF
OPT
0
0
0
OPT
OPT
OPT
4
0
0
OPT
0
0
OPT
100
100
OPT
100
100
OPT
100
OPT
OPT
100
OPT
OPT
3
OPT
OPT
0
OPT
OPT
0
OPT
0
0
OPT
0
0
R107,R124,R135,R151 (0603)
R108, R110,R123, R111, R112,R127,
C99,C110, JP5,JP6,
R61
C123,C134 JP11,JP12 (PAGE 3) R113,R129,R140,R151,R156 (0402) R152 R136,R150 R154 R138,R153
AIN7 AIN6 AIN5 AIN4 AIN3 AIN2 AIN1 AIN0
(JP12) (JP11) (JP10) (JP9) (JP8) (JP7) (JP6) (JP5)
VIN2
+/- 10.24V MAX
*
J5
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
VIN1
+/- 10.24V MAX
4
8
4
8
4
8
4
8
4
OPT
OPT
LT1355CS8
LT1355CS8
LT1355CS8
LT1355CS8
U25,U28
AIN3+
AIN3-
AIN2+
AIN2-
AIN1+
AIN1-
AIN0+
AIN0-
C138
0805
OPT
C127
0805
OPT
C114
0805
OPT
C101
0805
OPT
2
3
R147
OPT
6
5
2
3
R121
OPT
6
5
-
+
-
+
-
+
-
+
*
*
C121
*
C141
OPT
*
R156
1
*
C133
OPT
*
R140
U28A
VEE
C129
7
U28B
VCC
C117
OPT
R130
0
1
LT1355CS8
C109
OPT
R116
0
U27A
VEE
C105
0.1uF
7
LT1355CS8
R148
0
R132
0
R122
0
R106
0
R143
OPT
R117
OPT
*
R152
R144
OPT
*
R136
R126
100
R118
OPT
*
R110
*
*
R154
*
R138
R128
OPT
R112
1
*
C139
OPT
*
C135
C131
OPT
C125
OPT
*
C123
C119
OPT
C115
OPT
C111
270pF
C107
OPT
C103
OPT
C99
C95
OPT
2
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
GUY H.
KIM T.
APPROVALS
LTC Confidential-For Customer Use Only
DATE:
B
SIZE
1
LTC23XXILX FAMILY
DEMO CIRCUIT 2094A
04/02/2015, 10:19 AM
IC NO.
SHEET 4
2
OF 4
REV.
8/4/2-CHANNEL, SOFTSPAN, HIGH SPEED, SERIAL, SAR, ADC
TITLE: SCHEMATIC
AIN7+
AIN7-
AIN6+
AIN6-
AIN5+
AIN5-
AIN4+
AIN4-
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900 www.linear.com
TECHNOLOGY Fax: (408)434-0507
1. ALL RESISTORS AND CAPACITORS ON THIS PAGE ARE 0402.
NOTES: UNLESS OTHERWISE SPECIFIED
0603
*
R151
0603
*
R135
0603
R125
0
0603
CUSTOMER NOTICE
*
JP12
*
JP11
JP10
JP9
R109
0
C97
0.1uF
U27B
VCC
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
AIN7
AIN6
AIN5
AIN4
2
8
4
8
4
8
4
8
4
5
A
B
C
D
DEMO MANUAL DC2094A
SCHEMATIC DIAGRAM
dc2094afa
17
DEMO MANUAL DC2094A
DEMONSTRATION BOARD IMPORTANT NOTICE
Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:
This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete
in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union
directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.
If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU
OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS
FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims
arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or
agency certified (FCC, UL, CE, etc.).
No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance,
customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.
LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.
Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and
observe good laboratory practice standards. Common sense is encouraged.
This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application
engineer.
Mailing Address:
Linear Technology
1630 McCarthy Blvd.
Milpitas, CA 95035
Copyright © 2004, Linear Technology Corporation
18 Linear Technology Corporation
dc2094afa
LT 0415 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2014
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