Supertex inc. HV7355 Eight Channel, High Speed, Unipolar, Ultrasound Pulser 1.5A 150V Features ►► ►► ►► ►► ►► ►► ►► ►► ►► HVCMOS technology for high performance High density integrated ultrasound transmitter 0 to +150V output voltage ±1.5A source and sink current (min.) ±300mA current in CW mode Up to 18MHz operating frequency Matched delay times Built-in gate driver floating voltage regulator 2.5 to 3.3V CMOS logic interface The Supertex HV7355 is an eight-channel, unipolar, high voltage, high-speed pulse generator. It is designed for medical ultrasound applications. This high voltage and high speed integrated circuit can also be used for other piezoelectric, capacitive or MEMS sensors in ultrasonic nondestructive detection and sonar ranger applications. The HV7355 consists of a controller logic interface circuit, level translators, MOSFET gate drivers and high current P-channel and N-channel MOSFETs as the output stage for each channel. The output stages of each channel are designed to provide peak output currents over ±1.5A for pulsing, when MC = 1, with up to 150V swings. When MC = 0, all the output stages drop the peak current to ±500mA for low-voltage CW mode operation to save power. This direct coupling topology of the gate driver not only saves one high voltage capacitor per channel, but also makes the PCB layout easier. Application ►► ►► ►► ►► General Description Portable medical ultrasound imaging Piezoelectric transducer drivers NDT ultrasound transmission Pulse waveform generator Typical Application Circuit +5.0 to 150V +5.0V +3.3V VDD AVDD VLL VPP CPF LR VPF VSS EN MC PWR VDD CWD VPP LT VPF IN0 VDD Q0 TX0 X0 VDD LT RGND +3.3V Logic VDD VPP VPP LT VPF IN7 VDD Q7 Q[7:0] SET LE Data Latch CS SCK Shift Reg. Q7 SDO TX7 VDD X7 LT RGND RGND SUB D0 SDI VSUB GND VSS -5.0V Doc.# DSFP-HV7355 D011314 Supertex inc. www.supertex.com HV7355 Ordering Information Part Number Package Options Packing HV7355K6-G 56-Lead QFN (8x8) 250/Tray HV7355K6-G M937 56-Lead QFN (8x8) 2000/Reel ESD Sensitive Device -G denotes a lead (Pb)-free / RoHS compliant package Pin Configuration 56 Absolute Maximum Ratings Parameter 1 Value GND, RGND and VSUB 0V VLL, Positive logic supply -0.5V to +7.0V VDD, Positive logic and level translator supply -0.5V to +7.0V VSS, Negative level translator and LR supply +0.5V to -7.0V VPP, High voltage positive supply -0.5V to +160V ( VPP -VTXx) Voltage -0.5V to +160V All logic input PINX, NINX and EN voltages -0.5V to +7.0V (VTXx - RGND) Voltage -0.5V to +160V Operating temperature -40°C to 125°C Storage temperature -65°C to 150°C 56-Lead QFN (top view) Package Marking HV7355K6 LLLLLLLLL YYWW AAA CCC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package Package may or may not include the following marks: Si or 56-Lead QFN θja 56-Lead QFN L = Lot Number YY = Year Sealed WW = Week Sealed A = Assembler ID C = Country of Origin = “Green” Packaging 21 C/W O Power-Up Sequence Power-Down Sequence Step Description Step Description 1 VSS 1 EN & logic signal low 2 VLL with logic signal low 3 VPP 3 VDD 4 VDD 4 VPP 5 VLL 5 EN & logic signal go to high 6 VSS Note: Powering up/down in any arbitrary sequence will not cause any damage to the device. The powering up/down sequence is only recommended in order to minimize possible inrush current. Truth Table (MC = X) Drive Mode Control Table Logic Inputs Output EN Q[7:0] IN0~7 TX0~7 1 1111,1111 0 GND 1 1111,1111 1 VPP 1 0 X GND 0 X X HiZ Doc.# DSFP-HV7355 D011314 MC ISC (A) RonP RonN 0 0.50 18 13 1 1.6 8.0 3.0 Note: VPP = +150V, VDD = +5.0 V, VLL = +3.3V, VSS = -5.0V, VSUB = 0V 2 Supertex inc. www.supertex.com HV7355 Operating Supply Voltages and Current (Eight Active Channels) (Operating conditions, unless otherwise specified, VLL = +3.3V, VADD = VDD = +5.0V, VSS = -5.0V ,VPP = +150V, TA = 25°C) Sym Parameter Min Typ Max Units Conditions VLL Logic voltage reference 2.37 3.30 3.47 V --- VDD Internal voltage supply 4.5 5.0 5.5 V --- VPP Positive gate driver supply VDD - +150 V --- VSS Negative low voltage supply -5.5 -5.0 -4.5 V --- VPF Gate driver floating voltage - 5.0 - V --- ILL VLL Current EN = Low - 2.0 10 μA --- IDDQ VDD Current EN = Low - 50 150 μA f = 0MHz IDDEN VDD Current EN = High - 1.0 4.0 mA f = 0MHz IDDEN VDD Current MC = High - 160 - mA IDDENCW VDD Current MC = Low - 12 - mA f = 5.0MHz, continuous no loads ISSQ VSS Current EN = Low - 5.0 20 μA --- ISSEN VSS Current EN = High - 1.0 4.0 mA f = 0MHz ISSEN VSS Current MC = High - 95 - mA ISSENCW VSS Current MC = Low - 50 - mA f = 5.0MHz, continuous no loads IPPQ VPP Current EN = Low - 2.0 10 μA --- IPPEN VPP Current EN = High - 200 450 μA f = 0MHz IPPEN VPP Current MC = High - 370 - mA IPPENCW VPP Current MC = Low - 300 - mA f = 5.0MHz, continuous no loads Under Voltage and Over Temperature Protection Sym Parameter Min Typ Max Units Conditions VUVDD VDD threshold 3.4 - 4.4 V (Internal only) VUVLL VLL threshold - 1.7 - V (Internal only) VUVPF VPP - VPF threshold 2.5 - 3.8 V (Internal only) Logic Inputs (Operating conditions, unless otherwise specified, VLL = +3.3V, VADD = VDD = +5.0V, VSS = -5.0V ,VPP = +150V, TA = 25°C) Sym Parameter Min Typ Max Units Conditions VIH Input logic high voltage (VLL - 0.4) - VLL V --- VIL Input logic low voltage 0 - 0.4 V --- IIH Input logic high current - - 1.0 μA --- IIL Input logic low current -1.0 - - μA --- CIN Input logic capacitance - - 5.0 pF --- Doc.# DSFP-HV7355 D011314 3 Supertex inc. www.supertex.com HV7355 Electrical Characteristics (Operating conditions, unless otherwise specified, VLL = +3.3V, VADD = VDD = +5.0V, VSS = -5.0V ,VPP = +150V, TA = 25°C) P-Channel MOSFET Output, TX0~7 Sym Parameter Min Typ Max Units Conditions IOUT Output saturation current 1.4 1.6 - A MC = 1 RON Channel resistance - 8.0 - Ω 100mA IOUT Output saturation current 0.5 - - A MC = 0 RON Channel resistance - 18 - Ω 100mA Parameter Min Typ Max IOUT Output saturation current 1.5 1.7 - A MC = 1 RON Channel resistance - 3.0 - Ω ISD = 100mA IOUT Output saturation current 0.5 - - A MC = 0 RON Channel resistance - 22 - Ω 100mA N-Channel MOSFET Output, TX0~7 Sym Units Conditions AC Electrical Characteristics (Operating conditions, unless otherwise specified, VLL = +3.3V, VADD = VDD = +5.0V, VSS = -5.0V ,VPP = +150V, TA = 25°C) Sym Min Typ Max Input data rise/fall max time - - 10 ns --- tr Output rise time - 24 - ns tf Output fall time - 24 - ns 330pF//2.5kΩ load see timing test diagram Output frequency range - - 18 MHz tEN-ON Initial enable time - 150 200 μs 2μF on each CPF pin to 90% of VCPF tEN-OFF tinrf fOUT Parameter Units Conditions 100Ω resistor load, VPP = +90V Output disable time - 2.0 5.0 μs at 5.0MHz CW tdr Delay time on inputs rise - 5.0 - ns tdf Delay time on inputs fall - 5.0 - ns tdm Delay on mode change - 50 70 ns VPP = 25V 1.0Ω resistor load, 50% to 50% see timing test diagram Delay time matching - ± 2.0 - ns P to N, channel to channel Delay jitter on rise or fall - 15 - ps --- ΔtDELAY tj Serial Data Interface Timing Characteristics (Operating conditions, unless otherwise specified, VLL = +3.3V, VADD = VDD = +5.0V, VSS = -5.0V ,VPP = +150V, TA = 25°C) Sym Parameter Min Typ Max Units Conditions fSCK Serial clock max. frequency 25 - - MHz t1 SDI valid to SCK setup time 0 2.0 - ns t2 SDI valid to SCK hold time 4.0 - - ns t3 SCK high time 9.0 - - ns t4 SCK low time 9.0 - - ns t5 CS pulse width 9.0 - - ns t6 SCK high to CS high 7.0 - - ns t7 CS low to SCK high 7.0 - - ns t8 SDO delay from SCK rise edge - 6.5 - ns SDO with 100pF to GND t9 CS high to SCK rise edge 7.0 - - ns t10 SCK high to LE low 7.0 - - ns All from/to 50% rise or fall edges (See timing diagram) Doc.# DSFP-HV7355 D011314 4 All from/to 50% rise or fall edges (See timing diagram) Supertex inc. www.supertex.com HV7355 Output Timing Test Diagram +5.0 to 150V +5.0V +3.3V VDD AVDD VLL VPP CPF LR VPF VSS EN MC VDD PWR CWD VPP LT IN0 Q0 TX0 VPF VDD VDD R1 LT 50% RGND +3.3V Logic VDD INX tdfx tdrx VPP VPP IOUT LT 50% VPF IN7 VDD Q7 TX7 VDD TXX LT Q[7:0] SET LE Data Latch CS SCK Shift Reg. 90% 0A 10% tr tf RGND RGND Q7 SDO SUB D0 SDI VSUB GND VSS -5.0V Serial Data Interface Timing Diagram t1 SCK t2 1 t3 t4 2 t6 3 7 8 t9 SDI t5 t7 CS t8 SDO t10 LE Doc.# DSFP-HV7355 D011314 5 Supertex inc. www.supertex.com HV7355 Pin Description Pin Name 1 IN0 2 IN1 3 IN2 4 IN3 5 IN4 6 IN5 7 IN6 8 IN7 9 CS Serial interface enable, active low 10 SDI Serial shift register data input, MSB(D7) first, LSB(D0) last 11 LE Latch enable, active low 12 SCK Serial shift register clock 13 SDO Serial shift register data output 14 SET Set latch data Q[7:0] = 1, regardless the shift register inputs or LE, active high 15 MC Output current mode control pin, see Drive Mode Control Table 16 VLL Logic Hi voltage reference input (+3.3V) 17 VSS Negative power supply(-5.0V) 18 CPF Gate driver floating voltage decoupling capacitor to VPP 19 VPP 20 VPP 21 VPP 22 VPP 23 VDD 24 RGND 25 RGND 26 RGND 27 RGND Doc.# DSFP-HV7355 D011314 Description Input control for channels 0~7 Positive high voltage power supply (+150V) Positive voltage supply for gate drivers (+5.0V) Output return ground, 0V, RGND pins carry high current, must connect to load transducer ground 6 Supertex inc. www.supertex.com HV7355 Pin Description (cont.) Pin Name 28 TX7 29 TX7 30 TX6 31 TX6 32 TX5 33 TX5 34 TX4 35 TX4 36 TX3 37 TX3 38 TX2 39 TX2 40 TX1 41 TX1 42 TX0 43 TX0 44 RGND 45 RGND 46 RGND 47 RGND 48 VDD 49 VPP 50 VPP 51 VPP 52 VPP 53 CPF Gate driver floating voltage decoupling capacitor to VPP 54 GND Logic input reference ground, 0V 55 AVDD Positive internal voltage supply (+5.0V) 56 EN VSUB (Thermal Pad) Doc.# DSFP-HV7355 D011314 Description Output for channel 0~7 Output return ground, 0V, RGND pins carry high current, must connect to load transducer ground Positive voltage supply for gate drivers (+5.0V) Positive high voltage power supply (+150V) Chip power enable, active high Substrate bottom is internally connected to the central thermal pad on the bottom of package. It must be connected to GND (0V) externally 7 Supertex inc. www.supertex.com HV7355 56-Lead QFN Package Outline (K6) 8.00x8.00mm body, 1.00mm height (max), 0.50mm pitch D2 D 56 1 56 1 Note 1 (Index Area D/2 x E/2) Note 1 (Index Area D/2 x E/2) e E E2 b View B Top View Bottom View Note 3 θ A A3 L Seating Plane L1 Note 2 Side View A1 View B Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square. Symbol Dimension (mm) A A1 MIN 0.80 0.00 NOM 0.90 0.02 MAX 1.00 0.05 A3 0.20 REF b D D2 E E2 0.18 7.85* 2.75 7.85* 2.75 0.25 8.00 5.70 8.00 5.70 0.30 8.15* 6.70 8.15* 6.70 † e † 0.50 BSC L L1 θ 0.30 0.00 0O 0.40 - - 0.50 0.15 14O JEDEC Registration MO-220, Variation VLLD-2, Issue K, June 2006. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings are not to scale. Supertex Doc.#: DSPD-56QFNK68X8P050, Version A031010. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV7355 D011314 8 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com