CY24115
MediaClock™
Mini Disc Clock Generator
MediaClock™ Mini Disc Clock Generator
Features
Benefits
■
Integrated phase-locked loop (PLL)
■
High performance PLL tailored for mini disc applications.
■
Low jitter, high accuracy outputs
■
Meets critical timing requirements in complex system designs.
■
3.3 V operation
■
Enables application compatibility.
■
8-pin SOIC package
■
Industry standard package saves on board space.
Part Number
Outputs
Input Frequency Range
CY24115-2
1
1 MHz–30 MHz
Output Frequencies
90.3168 MHz and 180.6336 MHz (selectable)
Logic Block Diagram
XIN
OSC
Q
XOUT
VCO
OUTPUT
DIVIDERS
P
CLKA
PLL
FS0
FREQUENCY
TABLE
FS1
CLKSEL
VDD
VSS
Table 1. CLKSEL Function, CY24115-2
CLKSEL
CLKA
Unit PPM Error
0
90.3168
MHz
0
1
180.6336
MHz
0
Table 2. Input Frequency Function, CY24115-2
FS1
FS0
Xtal Input
Unit
0
0
2.8224
MHz
0
1
5.6448
MHz
1
0
11.2896
MHz
1
1
22.5792
MHz
Cypress Semiconductor Corporation
Document Number: 38-07275 Rev. *H
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised June 7, 2016
CY24115
Pin Configurations
Figure 1. 8-pin SOIC pinout
Pin Definitions
Pin Name
Pin Number
XIN
1
Reference input (crystal or external input)
Pin Description
VDD
2
3.3V voltage supply
CLKSEL
3
CLKA select line
For 24115-2, see Table 1 on page 1 for output values
VSS
4
Ground
CLKA
5
24115-2: 90.3168 MHz and180.6336 MHz (frequency selectable). See Table 1 on page 1.
FS0
6
Input frequency FS0. See Table 2 on page 1.
FS1
7
Input frequency FS1. See Table 2 on page 1.
XOUT[1]
8
Reference output
Note
1. Float XOUT if XIN is externally driven.
Document Number: 38-07275 Rev. *H
Page 2 of 9
CY24115
Absolute Maximum Conditions
Parameter
VDD
Description
Supply Voltage
TS
Storage Temperature
TJ
Junction Temperature
[2]
Min
Max
Unit
–0.5
7.0
V
–65
125
°C
–
125
°C
Digital Inputs
VSS – 0.3
VDD + 0.3
V
Digital Outputs Referred to VDD
VSS – 0.3
VDD + 0.3
V
2
–
kV
Min
Typ
Max
Unit
3.14
3.3
3.47
V
0
–
70
°C
Electrostatic Discharge
Recommended Operating Conditions
Parameter
Description
VDD
Operating Voltage
TA
Ambient Temperature
CLOAD
Max. Load Capacitance
fREF
Reference Frequency
t1
Driven Reference Edge Rate
0.8
DCIN
Driven Reference Duty Cycle
40
CIN
XIN, XOUT capacitance
–
12
tPU
Power up time for all VDD's to reach minimum specified voltage (power
ramps must be monotonic)
0.05
–
–
–
15
pF
2.8224
–
22.5792
MHz
–
–
V/ns
–
60
%
500
ms
pF
DC Electrical Characteristics
Parameter
Name
Description
Min
Typ
Max
Unit
IOH
Output High Current
VOH = VDD – 0.5 V,
VDD = 3.3 V (source)
12
24
–
mA
IOL
Output Low Current
VOL = 0.5, VDD = 3.3 V (sink)
12
24
–
mA
CIN
Input Capacitance
CLKSEL, FS0, FS1,
excludes XIN, XOUT
–
–
7
pF
VIL
Input Low Voltage
–
–
30
% of VDD
VIH
Input High Voltage
70
–
–
% of VDD
IIZ
Input Leakage Current
IDD
Supply Current
Sum of core and output current
–
5
–
A
–
–
35
mA
Note
2. Rated for 10 years.
Document Number: 38-07275 Rev. *H
Page 3 of 9
CY24115
AC Electrical Characteristics
(VDD = 3.3 V)
Parameter [3]
Min
Typ
Max
Unit
DC
Output Duty Cycle
Name
Duty cycle is defined in Figure 3,
50% of VDD
Description
45
50
55
%
t3
Rising Edge Slew Rate
Output clock rise time,
20%–80% of VDD
0.8
1.4
–
V/ns
t4
Falling Edge Slew Rate
Output clock fall time,
80%–20% of VDD
0.8
1.4
–
V/ns
t9
Clock Jitter
Peak to peak period jitter
–
–
350
ps
t10
PLL Lock Time
–
–
3
ms
Figure 2. Test Circuit
VDD
0.1 F
OUTPUTS
CLK out
CLOAD
GND
Figure 3. Duty Cycle Definition; DC = t2/t1
t1
t2
50%
CLK
50%
Figure 4. Rise and Fall Time Definitions
t3
t4
80%
CLK
20%
Note
3. Not 100% tested.
Document Number: 38-07275 Rev. *H
Page 4 of 9
CY24115
Ordering Information
Ordering Code
Package Type
Operating Range
Operating Voltage
Pb-free
CY24115KSXC-2
8-pin SOIC
Commercial
3.3 V
CY24115KSXC-2T
8-pin SOIC - Tape and Reel
Commercial
3.3 V
Ordering Code Definitions
CY 24115K
S
X C - 2
X
X = blank or T
blank = Tube; T = Tape and Reel
Configuration Type
Temperature Range:
C = Commercial
Pb-free
Package Type:
S = 8-pin SOIC
Base Part Number
Company ID: CY = Cypress
Document Number: 38-07275 Rev. *H
Page 5 of 9
CY24115
Package Diagram
Figure 5. 8-pin SOIC (150 Mils) S0815/SZ815/SW815 Package Outline, 51-85066
51-85066 *H
Document Number: 38-07275 Rev. *H
Page 6 of 9
CY24115
Acronyms
Acronym
Document Conventions
Description
Units of Measure
I/O
Input/Output
PLL
Phase-Locked Loop
°C
degree Celsius
Small-Outline Integrated Circuit
kHz
kilohertz
kV
kilovolt
MHz
megahertz
SOIC
Document Number: 38-07275 Rev. *H
Symbol
Unit of Measure
µA
microampere
mA
milliampere
mm
millimeter
ms
millisecond
mW
milliwatt
ns
nanosecond
ohm
%
percent
pF
picofarad
ps
picosecond
V
volt
W
watt
Page 7 of 9
CY24115
Document History Page
Document Title: CY24115, MediaClock™ Mini Disc Clock Generator
Document Number: 38-07275
Revision
ECN No.
Orig. of
Change
Submission
Date
**
110767
CKN
02/06/02
New data sheet.
*A
113515
CKN
04/30/02
Changed status from Preliminary to Final.
Updated DC Electrical Characteristics:
Updated details in “Description” column corresponding to IOH and IOL
parameters (Added (source) at the end in description of IOH parameter and
(sink) at the end in description of IOL parameter).
*B
121884
RBI
12/14/02
Updated Recommended Operating Conditions:
Added tPU parameter and its details.
*C
252154
RGL
08/26/04
Updated Ordering Information:
Updated part numbers.
Updated Package Diagram:
spec 51-85066 – Changed revision from *A to *C.
*D
2441946
AESA
05/15/08
Updated Ordering Information:
Added Note “Not recommended for new designs.” and referred the same note
in existing MPNs.
Added MPNs CY24115KSXC-2, and CY24115KSXC-2T.
Updated to new template.
*E
2781381
CXQ
03/19/10
Updated Ordering Information:
Removed MPNs CY24115SC-2, CY24115SC-2T, CY24115SC-1,
CY24115SC-1T, CY24115SXC-1, CY24115SXC-1T.
Updated Package Diagram:
spec 51-85066 – Changed revision from *C to *D.
Updated to new template.
*F
3068367
CXQ
10/21/2010
Removed CY24115-1 parts related information in all instances across the
datasheet.
Updated Ordering Information:
Removed MPNs CY24115SXC-2 and CY24115SXC-2T.
Added Ordering Code Definitions.
*G
4018058
CINM
06/03/2013
Updated Package Diagram:
spec 51-85066 – Changed revision from *D to *F.
Added Acronyms and Units of Measure.
Updated to new template.
Completing Sunset Review.
*H
5298871
XHT
06/07/2016
Updated Package Diagram:
spec 51-85066 – Changed revision from *F to *H.
Updated to new template.
Completing Sunset Review.
Document Number: 38-07275 Rev. *H
Description of Change
Page 8 of 9
CY24115
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at Cypress Locations.
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© Cypress Semiconductor Corporation, 2002-2016. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document,
including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other
intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress
hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to
modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users
(either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as
provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation
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TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE
OR ACCOMPANYING HARDWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. To the extent
permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any
product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is
the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products
are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or
systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the
device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably
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damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other
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Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United
States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.
Document Number: 38-07275 Rev. *H
MediaClock is a trademark of Cypress Semiconductor Corporation.
Revised June 7, 2016
Page 9 of 9