Wireless Components 3-Band TV Tuner IC TUA6030, TUA6032 Version 2.1 Specification July 2001 Revision History: Current Version: Preliminary Data Sheet,V1.1, August 2000 Previous Version:Target Data Sheet, V1.0, November 1999 Page (in previous Version) Page (in current Version) Subjects (major changes since last revision) all all Version to V1.1, status to preliminary Product Info Product Info Ordering code added. 4-2 4-2 Div. components changed. 4-3 4-3 Div. components changed. 5-2 5-2 Junction temperature and storage temperature +125 °C max. 5-5 5-5 Bus inputs SCL, SDA: VIH = 2.3 V. 5-8,5-9, 5-10 5-8,5-9, 5-10 Input conductance, input capacitance corrected. 5-10 5-10 Phase noise @ ±1 kHz frequency offset deleted. Phase noise, LOW band oscillator: ΦOSC = 92 dBc/Hz min @ ±10 kHz. Phase noise, MID band oscillator: ΦOSC = 92 dBc/Hz min @ ±10 kHz. 5-11 5-11 Phase noise @ ±1 kHz frequency offset deleted. Phase noise, HIGH band oscillator: ΦOSC = 87 dBc/Hz min. 5-14 5-14 Table 5-5, Description of Symbols: CP and OS ’default’ added 5-15 5-15 Table 5-5, Test Modes: Normal operation ’default’ added. 5-14 5-14 Table 5-5, Description of Symbols: CP and OS ’default’ added. 5-15 5-15 Table 5-5, Test Modes: Normal operation ’default’ added. 5-16 5-16 Table 5-10, A to D converter levels, footnote ’No erratic codes in the transition’ added, Table 5-1, Defaults at power-on reset, Auxiliary byte, bit5 = 1. 5-18, 5-19, 5-20 5-18, 5-19, 5-20 Smith charts added.. div div Tbf’s replaced . Revision History: Current Version: Data Sheet, V2.0, March 2001 Previous Version:Preliminary Data Sheet, V1.1, August 2000 all all Version to V2.0, preliminary deleted 3-3 3-3 LOW-/MID Oscillator: DC levels corrected 4-2, 4-3 4-2, 4-3 Application circuits modified 5-2 5-2 New definition of thermal properties. 5-6 5-6, 5-7 Saturation Voltages for P0, 2, 3 added 5-11 5-11 AGC take-over point: Min/max values added. Mixer output impedance: Values added Revision History: Current Version: Preliminary Data Sheet,V1.1, August 2000 5-11, 5-12 5-11, 5-12 Phase noise corrected 5-16 5-16 Table 5-1, Defaults at power-on reset, Auxiliary byte, bit5 = 1. 5-18 5-18 More telegram examples Revision History: Current Version: Data Sheet, V2.1, July 2001 Previous Version:Preliminary Data Sheet, V2.0, March 2001 all all Mirror imaged version TUA6032 added ABM®, AOP®, ARCOFI®, ARCOFI®-BA, ARCOFI®-SP, DigiTape®, EPIC®-1, EPIC ®-S, ELIC®, FALC®54, FALC®56, FALC®-E1, FALC®-LH, IDEC®, IOM®, IOM®-1, IOM®-2, IPAT®-2, ISAC®-P, ISAC®-S, ISAC®-S TE, ISAC®-P TE, ITAC®, IWE®, MUSAC®-A, OCTAT®-P, QUAT®-S, SICAT®, SICOFI®, SICOFI®2, SICOFI®-4, SICOFI®-4µC, SLICOFI® are registered trademarks of Infineon Technologies AG. ACE™, ASM™, ASP™, POTSWIRE™, QuadFALC™, SCOUT™ are trademarks of Infineon Technologies AG. Edition 03.99 Published by Infineon Technologies AG Balanstraße 73, 81541 München © Infineon Technologies AG 04.07.01. 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TUA6030, TUA6032 Product Info Product Info General Description Features The TUA6030, TUA6032 devices com- Package bine a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners. General ■ Suitable for PAL/NTSC and Digital Video Broadcasting Wideband AGC detector for internal tuner AGC − 5 programmable take-over points PLL − 2 programmable time constants 2 ■ 4 independent I C addresses ■ Full ESD protection 2 ■ I C bus protocol compatible with Mixer/Oscillator 3.3 V and 5V micro-controllers up to 400 kHz ■ High impedance mixer input (common emitter) for LOW band ■ Short lock-in time ■ Low impedance mixer input (com■ High voltage VCO tuning output mon base) for MID band ■ 4 PNP ports ■ Low impedance mixer input (common base) for HIGH band ■ 3 NPN ports ■ ■ 2 pin oscillator for LOW band ■ 1 NPN port/ADC input ■ 2 pin oscillator for MID band ■ ■ 4 pin oscillator for HIGH band Internal LOW/MID/HIGH band switch ■ Lock-in flag ■ Programmable reference divider ratio (24, 64, 80, 128) ■ Programmable charge pump current ■ The AGC stage makes the tuner AGC independent of the Video-IF AGC. IF-Amplifier ■ Application ■ IF preamplifier with symmetrical 75 Ω output impedance able to drive a SAW filter (500 Ω//40 pF) The IC is suitable for PAL and NTSC tuners in TV- and VCR-sets or set-top receivers for analog TV and Digital Video Broadcasting. Ordering Information Type Wireless Components Ordering Code Package TUA6030 Q67037-A1146 (tape and reel) P-TSSOP-38 TUA6032 Q67037-Axxxx (tape and reel) P-TSSOP-38 Product Info Specification, July 2001 1 Table of Contents 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2 2.1 2.2 2.3 2.4 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 3 3.1 3.2 3.3 3.4 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20 4 4-1 4-2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23 Application Circuit for NTSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24 Application Circuit for PAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25 5 5.1 5.1.1 5.1.2 5.1.3 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26 . . . . . . . 5-27 . . . . . . . 5-27 . . . . . . . 5-29 . . . . . . . 5-30 5.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-4 Bit Allocation Read / Write . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-5 Description of Symbols. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-6 Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-7 Test modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-8 Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-9 AGC take-over point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-10 A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-11 Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-12 Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 5.3 5.4 5.4.1 5.4.2 5.4.3 Wireless Components I2C Bus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-42 Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-43 Input admittance (S11) of the LOW band mixer (40 to 140 MHz). . . 5-43 Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . 5-43 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . 5-44 1-5 Specification, July 2001 TUA6030, TUA6032 Table of Contents 5.4.4 Output admittance (S22) of the of the Mixer output (30 to 50 MHz) . 5-44 5.4.5 Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . 5-45 5.5 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 5.5.6 5.5.7 5.5.8 Wireless Components Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in LOW band. . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . 5-46 Matching circuit for optimum noise figure in LOW band . . . . . . . . . . 5-47 Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . 5-47 Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . 5-48 Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . 5-48 Cross modulation measurement in MID and HIGH bands . . . . . . . . 5-49 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 5-49 1-6 Specification, July 2001 2 Product Description Contents of this Chapter Wireless Components 2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 2.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 2.3 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 2.4 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 2-7 Specification, July 2001 TUA6030, TUA6032 Product Description 2.1 Overview The TUA6030, TUA6032 devices combine a mixer-oscillator block with a digitally programmable phase locked loop (PLL) for use in TV and VCR tuners. The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch. The PLL block with four independently selectable chip addresses forms a digitally programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25, 50, 62.5 or 166.7 kHz. The tuning process is controlled by a microprocessor via an I2C bus. The device has 8 output ports, one of them (P6) can also be used as ADC input port. A flag is set when the loop is locked. The lock flag can be read by the processor via the I2C bus. 2.2 Features General ■ Suitable for PAL/NTSC and Digital Video Broadcasting ■ Wideband AGC detector for internal tuner AGC − 5 programmable take-over points − 2 programmable time constants ■ Full ESD protection Mixer/Oscillator ■ High impedance mixer input (common emitter) for LOW band ■ Low impedance mixer input (common base) for MID band ■ Low impedance mixer input (common base) for HIGH band ■ 2 pin oscillator for LOW band ■ 2 pin oscillator for MID band ■ 4 pin oscillator for HIGH band IF-Amplifier ■ IF preamplifier with symmetrical 75 Ω output impedance able to drive a SAW filter (500 Ω//40 pF) PLL Wireless Components ■ 4 independent I2C addresses ■ I2C bus protocol compatible with 3.3 V and 5V micro-controllers up to 400 kHz 2-8 Specification, July 2001 TUA6030, TUA6032 Product Description ■ Short lock-in time ■ High voltage VCO tuning output ■ 4 PNP ports ■ 3 NPN ports ■ 1 NPN port/ADC input ■ Internal LOW/MID/HIGH band switch ■ Lock-in flag ■ Programmable reference divider ratio (24, 64, 80, 128) ■ Programmable charge pump current 2.3 Application ■ The IC is suitable for PAL and NTSC tuners in TV- and VCR-sets or cable set-top receivers for analog TV and Digital Video Broadcasting. ■ The AGC stage makes the tuner AGC independent of the Video-IF AGC. Recommended band limits in MHz: Table 2-1 NTSC tuners RF input Oscillator Band min max min max LOW 55.25 127.25 101 173 MID 133.25 361.25 179 407 HIGH 367.25 801.25 413 847 Table 2-2 PAL tuners RF input Note: Tuning margin of Wireless Components Oscillator Band min max min max LOW 44.25 154.25 83.15 193.15 MID 161.25 439.25 200.15 478.15 HIGH 447.25 863.25 486.15 902.15 K3 MHz not included. 2-9 Specification, July 2001 TUA6030, TUA6032 Product Description 2.4 Package Outlines P-TSSOP-38 Wireless Components 2 - 10 Specification, July 2001 3 Functional Description Contents of this Chapter 3.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 3.2 Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 3.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 3.4 Circuit Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20 TUA6030, TUA6032 Functional Description 3.1 Pin Configuration OSCLOWOUT 1 38 HIGHIN OSCLOWIN 2 37 HIGHIN OSCGND 3 36 MIDIN OSCMIDIN 4 35 MIDIN OSCMIDOUT 5 34 LOWIN OSCHIGHIN 6 33 RFGND OSCHIGHOUT 7 32 MIXOUT OSCHIGHOUT 8 31 MIXOUT OSCHIGHIN 9 30 P2 29 AGC TUA6030 VCC 10 IFGND 11 28 GND IFOUT 12 27 SDA IFOUT 13 26 SCL PLLGND 14 25 AS VT 15 24 P1 CP 16 23 P0 P5 17 22 P3 P7 18 21 P4 XTAL 19 20 P6/ADC TUA6030 Pin_config Figure 3-1 Pin Configuration TUA6030 HIGHIN 1 38 OSCLOWOUT HIGHIN 2 37 OSCLOWIN MIDIN 3 36 OSCGND MIDIN 4 35 OSCMIDIN LOWIN 5 34 OSCMIDOUT RFGND 6 33 OSCHIGHIN MIXOUT 7 32 OSCHIGHOUT MIXOUT 8 31 OSCHIGHOUT P2 9 30 OSCHIGHIN 29 VCC TUA6032 AGC 10 GND 11 28 IFGND SDA 12 27 IFOUT SCL 13 26 IFOUT AS 14 25 PLLGND P1 15 24 VT P0 16 23 CP P3 17 22 P5 P4 18 21 P7 P6/ADC 19 20 XTAL TUA6032 Pin_config Figure 3-2 Wireless Components Pin Configuration TUA6032 3 - 12 Specification, July 2001 TUA6030, TUA6032 Functional Description 3.2 Pin Definition and Function Remark: First pin number refers to TUA6030, second to TUA6032 Table 3-1 Pin Definition and Function Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW OSCLOWOUT MID HIGH 0.0 V 0.0 V 2.2 V 1/38 1/38 OSCLOWIN 2/37 1.5 V 2/37 3/36 OSCGND oscillator ground 0.0 V OSCMIDIN 1.5 V 4/35 5/34 OSCMIDOUT 2.2 V 4/35 5/34 Wireless Components 3 - 13 Specification, July 2001 TUA6030, TUA6032 Functional Description Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 6/33 MID HIGH OSCHIGHIN 1.8 V 7/32 8/31 9/30 OSCHIGOUT 7/32 8/31 6/33 9/30 2.2 V OSCHIGOUT 2.2 V OSCHIGHIN 1.8 V 10/29 VCC supply voltage 5.0 V 5.0 V 5.0 V 11/28 IFGND IF ground 0.0 V 0.0 V 0.0 V 12/27 IFOUT 2.1 V 2.1 V 2.1 V 2.1 V 2.1 V 2.1 V 0.0 V 0.0 V 0.0 V VT VT VT 1.9 V 1.9 V 1.9 V 13/26 IFOUT 12/27 14/25 PLLGND 15/24 VT 16/23 CP 13/26 PLL ground 15/24 16/23 Wireless Components 3 - 14 Specification, July 2001 TUA6030, TUA6032 Functional Description Table 3-1 Pin Definition and Function (continued) Pin No. 17/22 Symbol Equivalent I/O-Schematic P5 Average DC voltage LOW MID HIGH 5 V or VCE 5 V or VCE 5 V or VCE 17/22 or 18/21 18/21 P7 5 V or VCE 5 V or VCE 5 V or VCE 19/20 XTAL 3.3 V 3.3 V 3.3 V 5 V or VCE 5 V or VCE 5 V or VCE 5 V or VCE 5 V or VCE 5 V or VCE 19/20 20/19 P6/ADC 20/19 21/18 P4 21/18 22/17 P3 n.a. n.a. 0 V or VCC VCE 23/16 P0 VCC VCE n.a. n.a. 24/15 P1 n.a. VCC VCE n.a. Wireless Components 22/17 or 23/16 or 24/15 3 - 15 Specification, July 2001 TUA6030, TUA6032 Functional Description Table 3-1 Pin Definition and Function (continued) Pin No. 25/14 Symbol Equivalent I/O-Schematic AS Average DC voltage LOW MID HIGH VAS VAS VAS n.a. n.a n.a n.a n.a n.a 0.0 0.0 0.0 25/14 26/13 SCL 26/13 27/12 SDA 27/12 28/11 GND Wireless Components ground 3 - 16 Specification, July 2001 TUA6030, TUA6032 Functional Description Table 3-1 Pin Definition and Function (continued) Pin No. 29/10 Symbol Equivalent I/O-Schematic Average DC voltage AGC LOW MID HIGH 3.0 V 3.0 V 3.0 V n.a. n.a. 0 V or VCC VCE 4.0 V 4.0 V 4.0 V 4.0 V 4.0 V 4.0 V 0.0 V 0.0 V 0.0 V 29/10 30/9 P2 30/9 31/8 MIXOUT 32/7 MIXOUT 31/8 32/7 Oscillator 33/6 RFGND 34/5 LOWIN IF ground 1.9 V 34/5 Wireless Components 3 - 17 Specification, July 2001 TUA6030, TUA6032 Functional Description Table 3-1 Pin Definition and Function (continued) Pin No. Symbol Equivalent I/O-Schematic Average DC voltage LOW 35/4 MIDIN 36/3 MIDIN 37/2 HIGHIN 38/1 HIGHIN Wireless Components MID HIGH 0.75 V 35/4 36/3 0.75 V 0.75 V 37/2 38/1 3 - 18 0.75 V Specification, July 2001 TUA6030, TUA6032 Functional Description 3.3 Block Diagram Remark: First pin number refers to TUA6030, second to TUA6032 OSCLOWOUT OSCLOWIN OSCGND 1/38 Oscillator LOW 2/37 3/ 36 OSCMIDIN 4/35 OSCMIDOUT 5/34 Mixer HIGH RF Input HIGH P0 P0.P1 Oscillator MID Mixer MID RF Input MID P1 38/1 HIGHIN 37/2 HIGHIN 36/3 MIDIN 35/4 MIDIN 34/5 LOWIN P1 OSCHIGHIN 6/ 33 OSCHIGHOUT 7/ 32 OSCHIGHOUT 8/31 OSCHIGHIN Oscillator HIGH Mixer LOW P0 P0.P1 32/7 MIXOUT 31/8 MIXOUT 30/9 VCC AGC Detector ATC IFGND 11/ 28 AGC Prog. Divider 12/27 I2C Bus FL IFOUT 33 RFGND /6 SAW Driver 9/ 30 VCC 10/ 29 IFOUT RF Input LOW 13/26 Lock Detector fdiv PLLGND 14/ 25 VT 15/ 24 CP 16/23 P5 17/22 P7 18/21 XTAL 19/20 Phase/ Freq Comp Charge Pump fref PORTS CP, OS Crystal Oscillator Reference Divider P2 29/ 10 AGC 28/ 11 GND 27/ 12 SDA 26/ 13 SCL 25/ 14 AS 24/ 15 P1 23/ 16 P0 22/17 P3 21/18 P4 20/19 P6/ADC ADC TUA6030_1 BlockDiag Figure 3-3 Wireless Components Block Diagram 3 - 19 Specification, July 2001 TUA6030, TUA6032 Functional Description 3.4 Circuit Description 3.4.1 Mixer-Oscillator block The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a band switch. Filters between tuner input and IC separate the TV frequency signals into three bands. The band switching in the tuner front-end is done by using three PNP port outputs. In the selected band the signal passes a tuner input stage with a MOSFET amplifier, a double-tuned bandpass filter and is then fed to the mixer input of the IC which has in case of LOW band a high-impedance input and in case of MID or HIGH band a low-impedance input. The input signal is mixed there with the signal from the activated on chip oscillator to the IF frequency which is filtered out at the balanced mixer output pair by means of a parallel tuned circuit. The following IF amplifier is capacitively coupled to the mixer outputs and has a low output impedance to drive the SAW filter directly. 3.4.2 PLL block The oscillator signal is internally DC-coupled as a differential signal to the programmable divider inputs. The signal subsequently passes through a programmable divider with ratio N = 256 through 32767 and is then compared in a digital frequency/phase detector with a reference frequency fref = 31.25, 50, 62.5 or 166.7 kHz. This frequency is derived from an unbalanced, low-impedance 4 MHz crystal oscillator (pin XTAL) divided by 128, 80,64 or 24. The reference frequencies will be different with a quartz other than 4 MHz. The phase detector has two outputs which drive two current sources of a charge pump. If the negative edge of the divided VCO signal appears prior to the negative edge of the reference signal, the positive current source pulses for the duration of the phase difference. In the reverse case the negative current source pulses. If the two signals are in phase, the charge pump output (CP) goes into the high-impedance state (PLL is locked). An active low-pass filter integrates the current pulses to generate the tuning voltage for the VCO (internal amplifier, external pull-up resistor at VT and external RC circuitry). The charge pump output is also switched into the high-impedance state if the control bits T2, T1,T0 = 0, 1, 0. Here it should be noted, however, that the tuning voltage can alter over a long period in the high impedance state as a result of self discharge in the peripheral circuity. VT may be switched off by the control bit OS to allow external adjustments. If the VCO is not oscillating the PLL locks to a tuning voltage of 33V (VTH). Wireless Components 3 - 20 Specification, July 2001 TUA6030, TUA6032 Functional Description By means of control bit CP the pump current can be switched between two values by software. This programmability permits alteration of the control response of the PLL in the locked-in state. In this way different VCO gains can be compensated, for example. The software controlled ports P0 to P7 are general purpose open-collector outputs. The test bits T2, T1, T0 =1, 0, 0 switch the test signals fdiv (divided input signal) and fref (i.e.4 MHz / 64) to P4 and P5 respectively. The lock detector resets the lock flag FL if the width of the charge pump current pulses is greater than the period of the crystal oscillator (i.e. 250 ns). Hence, if FL = 1, the maximum deviation of the input frequency from the programmed frequency is given by ∆f = ± IP ∗ (KVCO / fXTAL) ∗ (C1+C2) / (C1∗C2) where IP is the charge pump current, KVCO the VCO gain, fXtal the crystal oscillator frequency and C1, C 2 the capacitances in the loop filter (Chapter 4). As the charge pump pulses at i.e. 62.5 kHz (= fref), it takes a maximum of 16 µs for FL to be reset after the loop has lost lock state. Once FL has been reset, it is set only if the charge pump pulse width is less than 250 ns for eight consecutive fref periods. Therefore it takes between 128 and 144 µs for FL to be set after the loop regains lock. 3.4.3 AGC The wide-band AGC stage detects the level of the IF output signal and generates an AGC voltage for gain control of the tuner input transistors. The AGC take-over and the time constant are selectable by the I2C bus. 3.4.4 I2C-Bus Interface Data is exchanged between the processor and the PLL via the I2C bus. The clock is generated by the processor (input SCL). Pin SDA functions as an input or output depending on the direction of the data (open collector, external pullup resistor). Both inputs have a hysteresis and a low-pass characteristic, which enhance the noise immunity of the I2C bus. The data from the processor pass through an I2C bus controller. Depending on their function the data are subsequently stored in registers. If the bus is free, both lines will be in the marking state (SDA, SCL are high). Each telegram begins with the start condition and ends with the stop condition. Start condition: SDA goes low, while SCL remains high. Stop condition: SDA goes high while Wireless Components 3 - 21 Specification, July 2001 TUA6030, TUA6032 Functional Description SCL remains high. All further information transfer takes place during SCL = low, and the data is forwarded to the control logic on the positive clock edge. The table ’Bit Allocation’ (see Table 5-4 Bit Allocation Read / Write on page 39) should be referred to for the following description. All telegrams are transmitted byte-by-byte, followed by a ninth clock pulse, during which the control logic returns the SDA line to low (acknowledge condition). The first byte is comprised of seven address bits. These are used by the processor to select the PLL from several peripheral components (address select). The LSB bit (R/W) determines whether data are written into (R/W = 0) or read from (R/W = 1) the PLL. In the data portion of the telegram during a WRITE operation, the MSB bit of the first or third data byte determines whether a divider ratio or control information is to follow. In each case the second byte of the same data type has to follow the first byte. Appropriate setting of the test bits will decide whether the bandswitch byte or the auxiliary byte will be transmitted (see Table 5-7 Test modes on page 40). If the address byte indicates a READ operation, the PLL generates an acknowledge and then shifts out the status byte onto the SDA line. If the processor generates an acknowledge, a further status byte is output; otherwise the data line is released to allow the processor to generate a stop condition. The status word consists of three bits from the A/D converter, the lock flag and the power-on flag. Four different chip addresses can be set by an appropriate DC level at pin AS (see Table 5-6 Address selection on page 40). While the supply voltage is applied, a power-on reset circuit prevents the PLL from setting the SDA line to low, which would block the bus. The power-on reset flag POR is set at power-on and if VCC falls below 3.2 V. It will be reset at the end of a READ operation. Wireless Components 3 - 22 Specification, July 2001 4 Applications Contents of this Chapter 4.1 4-1 4-2 Wireless Components Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24 Application Circuit for NTSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-24 Application Circuit for PAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25 4 - 23 Specification, July 2001 TUA6030, TUA6032 Applications 4.1 Circuits Remark: Pinning refers to TUA6030 BB659C 2k7 OSCLOWOUT 1n 2 BB659C 12p 3 HIGHIN OSCLOWIN balun 1:1 HIGH TOKO B4F Input 617DB-1023 balun 1:1 MID TOKO B4F Input 617DB-1023 37 OSCGND MID 36 1p5 1n 4 82p OSCMIDIN MIDIN 35 1p2 1n 5 L2 LOW Input LOWIN OSCMIDOUT 34 1p2 6 1k8 OSCHIGHIN RFGND OSCHIGHOUT MIXOUT OSCHIGHOUT MIXOUT 33 68p 1p2 7 L3 8 1p2 1k8 9 OSCHIGHIN 4n7 10 +5V 4n7 IFOUT 11 transformer 2:10 12 13 14 C2 2n2 C1 15 100n + 33 V 33k 16 8k2 100n 17 4n7 P7 18 4 MHz 4n7 L4 VCC IFGND IFOUT P2 68p 31 P2 30 150n 4n7 AGC 29 GND AGC 28 SDA SDA 27 220 12p TOKO 7KL600 GCS-A1010DX 560 32 1p2 TUA6030 BB659C P5 38 1n 2k7 47n HIGHIN 2p7 L1 12 1n 1 100p 8R2 2p2 IFOUT SCL 100p 26 100p AS PLLGND 25 VT P1 CP P0 P5 P3 P7 P4 AS 220 4n7 P1 24 4n7 P0 23 4n7 P3 22 4n7 P4 21 18p 19 SCL 220 XTAL 4n7 P6/ADC P6/ADC 20 4n7 App Circuit Ntsc Figure 4-1 Application Circuit for NTSC Recommended band limits in MHz RF input Coils Oscillator turns E wire E min max min max L1 8.5 3.2 mm 0.5 mm LOW 55.25 127.25 101 173 L2 3.5 2.5 mm 0.5 mm MID 133.25 361.25 179 407 L3 1.5 2.4 mm 0.5 mm HIGH 367.25 801.25 413 847 L4 12.5 3.5 mm 0.3 mm Wireless Components 4 - 24 Specification, July 2001 TUA6030, TUA6032 Applications Remark: Pinning refers to TUA6030 BB659C 2k7 2p2 1n 1 100p 2 3 BB659C 2k7 4 15p OSCGND HIGH Input TOKO B4F 617DB-1023 balun 1:1 MID TOKO B4F Input 617DB-1023 37 1n 36 1n 35 1n 5 L2 LOW Input LOWIN OSCMIDOUT 34 1p2 6 7 L3 OSCHIGHIN RFGND 33 68p OSCHIGHOUT MIXOUT OSCHIGHOUT MIXOUT 9 OSCHIGHIN 4n7 10 +5V 4n7 11 transformer 2:10 12 13 14 C2 2n2 C1 15 100n + 33 V 33k 16 8k2 100n 17 4n7 18 4 MHz 4n7 L4 IFGND IFOUT P2 68p 31 P2 30 150n AGC GND AGC 28 SDA 27 SDA 220 IFOUT SCL 100p 26 100p AS PLLGND 25 VT P1 CP P0 P5 P3 P7 P4 SCL 220 AS 220 4n7 P1 24 4n7 P0 23 4n7 P3 22 4n7 XTAL P4 21 18p 19 4n7 29 12p TOKO 7KL600 GCS-A1010DX 560 VCC TUA6030 1p2 1k8 IFOUT 32 1p2 8 P7 MIDIN OSCMIDIN balun 1:1 1p2 BB565 P5 MID 38 1n 1p2 1k8 47n HIGHIN OSCLOWIN 1p5 82p 8R2 HIGHIN 2p7 L1 12 OSCLOWOUT 4n7 P6/ADC P6/ADC 20 4n7 App Circuit PAL Figure 4-2 Application Circuit for PAL Recommended band limits in MHz RF input Coils Oscillator turns E wire E min max min max L1 8.5 3.2 mm 0.5 mm LOW 44.25 154.25 83.15 193.15 L2 2.5 3 mm 0.5 mm MID 161.25 439.25 200.15 478.15 L3 1.5 2.4 mm 0.5 mm HIGH 447.25 863.25 486.15 902.15 L4 14.5 4 mm 0.3 mm Wireless Components 4 - 25 Specification, July 2001 5 Reference Contents of this Chapter 5.1 5.1.1 5.1.2 5.1.3 Electrical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-27 . . . . . . . 5-27 . . . . . . . 5-29 . . . . . . . 5-30 5.2 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-4 Bit Allocation Read / Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-5 Description of Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-39 Table 5-6 Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-7 Test modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-8 Reference divider ratios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-9 AGC take-over point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-40 Table 5-10 A to D converter levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-11 Defaults at power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Table 5-12 Internal band selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-41 Wireless Components 5.3 I2C Bus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-42 5.4 5.4.1 5.4.2 5.4.3 5.4.4 5.4.5 Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-43 Input admittance (S11) of the LOW band mixer (40 to 140 MHz). . . 5-43 Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . 5-43 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . 5-44 Output admittance (S22) of the of the Mixer output (30 to 50 MHz) . 5-44 Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . 5-45 5.5 5.5.1 5.5.2 5.5.3 5.5.4 5.5.5 5.5.6 5.5.7 5.5.8 Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in LOW band. . . . . . . . . . . . . . . . . . . . . . . 5-46 Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . 5-46 Matching circuit for optimum noise figure in LOW band . . . . . . . . . . 5-47 Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . 5-47 Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . 5-48 Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . 5-48 Cross modulation measurement in MID and HIGH bands . . . . . . . . 5-49 Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 5-49 5 - 26 Specification, July 2001 TUA6030, TUA6032 Reference 5.1 Electrical Data 5.1.1 Absolute Maximum Ratings WARNING The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC may result. Table 5-1 Absolute Maximum Ratings, ambient temperature TAMB = - 10°C ... TAmax Parameter 1). Symbol Limit Values min max Unit Remarks Supply voltage VCC -0.3 6 V Ambient temperature TA -10 TAmax °C 2). +125 °C TJ + 125 °C TJC 2 K 3 V ICP 1 mA VQ 6 V Storage temperature TStg Junction temperature Temperature difference junction to case3). -40 PLL CP Crystal oscillator pin XTAL VCP IQ Bus input/output SDA VSDA Bus output current SDA ISDA(L) Bus input SCL VSCL Chip address switch AS VCO tuning output (loop filter) Wireless Components -0.3 -5 -0.3 mA 6 V 10 mA -0.3 6 V VAS -0.3 6 V VVT -0.3 35 V 5 - 27 open collector Specification, July 2001 TUA6030, TUA6032 Reference Table 5-1 Absolute Maximum Ratings, ambient temperature TAMB = - 10°C ... + 85°C (continued) Parameter 1.) Symbol Limit Values Unit Remarks min max -0.3 6 V NPN port output voltage VP4, 5, 7 open collector NPN port output current IP4, 5, 7(L) -1 10 mA P6/ADC input/output voltage VP6/ADC -0.3 6 V NPN port output current IP6/ADC(L) -1 10 mA PNP port output voltage VP0, 1, 2, 3 -0.3 6 V PNP port output current IP1(L) +1 -25 mA open collector, tmax = 0.1 sec. at 5.5 V PNP port output current IP0(L) +1 -10 mA open collector, tmax = 0.1 sec. at 5.5 V PNP port output current IP2, 3(L) +1 -5 mA open collector, tmax = 0.1 sec. at 5.5 V Total port output current of NPN ports ΣIP(L) 40 mA tmax = 0.1 sec. at 5.5 V Total port output current of PNP ports ΣIP(L) -40 mA tmax = 0.1 sec. at 5.5 V 3 V 2 V -5 6 mA -0.3 3 V LOW, MID and HIGH band oscillators LOW, MID and HIGH band oscillators open collector, tmax = 0.1 sec. at 5.5 V open collector, tmax = 0.1 sec. at 5.5 V open collector Mixer-Oscillator Mix inputs LOW band VLOW Mix inputs MID/HIGH band VMID/HIGH IMID/HIGH -0.3 VCO base voltage VB VCO collector voltage VC 6 V VESD 2 kV ESD-Protection 4). all pins 1). All values are referred to ground (pin), unless stated otherwise. Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin. 2). The maximum ambient temperature depends on the mounting conditions of the package. Any application mounting must guarantee not to exceed the maximum junction temperature of 125 °C. As reference the temperature difference junction to case is given. 3). Referred to top center of package. 4). According to EIA/JESD22-A114-B (HBM in-circuit test), as a single device in-circuit contact discharge test. Wireless Components 5 - 28 Specification, July 2001 TUA6030, TUA6032 Reference 5.1.2 Operating Range Within the operational range the IC operates as described in the circuit description. The AC / DC characteristic limits are not guaranteed. Table 5-2 Operating Range Parameter Symbol Limit Values min max Unit Supply voltage VCC +4.5 +5.5 Programmable divider factor N 256 32767 LOW mixer input frequency range fMIXV 30 200 MHz MID and HIGH band mixer input frequency range fMIXU 130 900 MHz LOW oscillator frequency range fOH 65 250 MHz MID band oscillator frequency range fOU 165 530 MHz HIGH band oscillator frequency range fOU 400 950 MHz Ambient temperature TAMB -10 TAmax °C Test Conditions L Item V 1). 1). see 5.1.1 Absolute Maximum Ratings on page 27 Wireless Components 5 - 29 Specification, July 2001 TUA6030, TUA6032 Reference 5.1.3 AC/DC Characteristics Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V Symbol Limit Values Unit min typ max 4.5 5 5.5 Test Conditions L Item Supply Supply voltage VCC Current consumption IVCC 73 mA LOW band IVCC 75 mA MID band - 66 mA HIGH band 4.0 4.48 MHz series resonance 300 Ω series resonance -1200 Ω fXTAL = 4 MHz IVCC V Digital Part PLL Crystal oscillator connections XTAL Crystal frequency fXTAL 3.2 Crystal resistance RQ 25 Input impedance ZQ -1000 Charge pump output CP High-level output current ICPH ±280 µA CP = 1, VCP = 2 V Low-level output current ICPL ±60 µA CP = 0, VCP = 2 V Tristate current ICPZ +1 nA T2, T1, T0 = 0, 1, 0, VCP = 2 V Output voltage VCP 2.5 V loop closed 10 µA VTH = 33 V, OS = 1 OS=0, RLoad = 33 kΩ, tuning supply = 33 V 1.0 Tuning voltage output VT (open collector) Leakage current ITH Output voltage when the loop is closed, (test mode in normal operation) VTL 0.4 32.7 V High-level input voltage VIH 2.3 5.5 V Low-level input voltage VIL 0 1.5 V High-level input current IIH 10 µA Vbus = 5.5 V, VCC = 0 V IIH 10 µA Vbus = 5.5 V, VCC = 5.5 V I2C-Bus Bus inputs SCL, SDA Wireless Components 5 - 30 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V (continued) Symbol Limit Values min Low-level input current typ IIL IIL Unit Test Conditions µA Vbus = 1.5 V, VCC = 0 V µA Vbus = 0 V, VCC = 5.5 V L Item max 10 -10 Bus output SDA (open collector) Leakage current IOH 10 µA VOH = 5.5 V Low-level output voltage VOL 0.4 V IOL = 3 mA Low-level output voltage VOL 0.6 V IOL = 6 mA at 400 kHz Rise time tr 300 ns Fall time tf 300 ns 400 kHz Edge speed SCL,SDA Clock timing SCL Frequency fSCL 0 100 High pulse width tH 0.6 µs Low pulse width tL 1.3 µs Set-up time tsusta 0.6 µs Hold time thsta 0.6 µs Set up time tsusto 0.6 µs Bus free tbuf 1.3 µs Set-up time tsudat 0.1 µs Hold time thdat 0 µs Input hysteresis SCL, SDA Vhys Pulse width of spikes which are suppressed tsp Capacitive load for each bus line CL Start condition Stop condition Data transfer 200 0 mV 50 ns 400 pF -10 µA VCC = 5.5 V PNP port outputs P0, P1, P2, P3 (open collector) Output leakage current IPOH0to3 Output saturation voltage port 0 VPL0 0.25 0.4 V IPOL0 = 10 mA Output saturation voltage port 1 VPL1 0.25 0.4 V IPOL1 = 15 mA Wireless Components 5 - 31 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V (continued) Symbol Limit Values min Output saturation voltage ports 2, 3 VPL2 ,3 Unit Test Conditions typ max 0.25 0.4 V IPOL2, 3 = 5 mA 10 µA VCC = 5.5, VPn4to7 = 6 V 0.4 V IPOL4to7 = 5 mA 5.5 V 10 µA L Item NPN port outputs P4, P5, P6, P7 (open collector) Output leakage current IPOH4to7 Output saturation voltage VPL04to7 0.25 ADC input ADC input voltage VADC High-level input current IADCH Low-level input current IADCL 0 -10 µA Address selection input AS High-level input current IASH Low-level input current IASL 50 -50 µA VASH = 5.5 V µA VASL = 0 V Analog Part LOW band mixer mode (P0 = 1, P1 =0, including IF amplifier) RF frequency fRF 44.25 Voltage gain GV 23.5 GV 23.5 170.25 MHz 26 28.5 dB fRF = 44.25 MHz, see 5.5.1 on page 46 26 28.5 dB fRF = 170.25 MHz, see 5.5.1 on page 46 8 10 dB fRF = 50 MHz, see 5.5.4 on page 47, see 5.5.3 on page 47 picture carrier 1). Noise figure NF Output voltage causing 0.3% of crossmodulation in channel VO 108 111 dBµV fRF = 44.25 MHz, see 5.5.6 on page 48 VO 108 111 dBµV fRF = 170.25 MHz, see 5.5.6 on page 48 Output voltage causing 1.1 kHz incidental FM VO 108 111 dBµV fRF = 44.25 MHz 2). VO 108 111 dBµV fRF = 170.25 MHz 2.) kHz fRF = 170.25 MHz 3). dBµV fRF = 154.25 MHz 4). Local oscillator FM FMI2C 2.12 2 caused by I C communication 750 Hz Pulling Vi 88 Channel S02 beat INTS02 57 60 dBc VRFpix = 115 dBµV at IF output 5). Wireless Components 5 - 32 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V (continued) Symbol Channel A-5 beat INTA-5 Limit Values min typ 57 60 Unit Test Conditions L Item max dBc VRFpix = 115 dBµV at IF output 6). Channel CH6 color beat INTCH6 63 66 dBc VRFpix = 80 dBµV VRFsnd = 80 dBµV7). RF input level without lock-out Vi Input conductance gi 1 mS fRF = 44.25 MHz, see 5.4.1 on page 43 gi 1 mS fRF = 170.25 MHz, see 5.4.1 on page 43 CMixV 1 pF fRF = 44.25 to 170.25 MHz, see 5.4.1 on page 43 Input capacitance 120 dBµV 8). Mid band mixer mode (P0 = 0, P1 =1, including IF amplifier) RF frequency fRF 154.25 Voltage gain GV 33 36 39 dB fRF = 154.25 MHz, see 5.5.2 on page 46 GV 33 36 39 dB fRF = 454.25 MHz, see 5.5.2 on page 46 NF 6 8 dB fRF = 154.25 MHz, see 5.5.5 on page 48 NF 6 8 dB fRF = 300 MHz, see 5.5.5 on page 48 Noise figure (not corrected for image) Output voltage causing 0.3% of crossmodulation in channel Output voltage causing 1.1 kHz incidental FM Local oscillator FM 454.25 picture carrier 1.) VO 108 111 dBµV fRF = 154.25 MHz, see 5.5.7 on page 49 VO 108 111 dBµV fRF = 454.25 MHz, see 5.5.7 on page 49 VO 108 111 dBµV fRF = 154.25 MHz 2.) VO 108 111 dBµV fRF = 454.25 MHz 2.) kHz fRF = 454.25 MHz 3.) dBµV fRFw = 359.25 MHz, fOSC = 398.15 MHz, FMI2C 2.12 2 caused by I C communication N+5 - 1 MHz pulling N+5 - 1 MHz 77 80 fRFu = 399.25 MHz 9). Wireless Components 5 - 33 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V (continued) Symbol Limit Values min typ Unit Test Conditions L Item max 750 Hz Pulling Vi 78 RF input level without lock-out Vi Input impedance Zi = (Rs + jωLs) Rs 35 Ω fRF = 154.25.25 MHz, see 5.4.2 on page 43 Rs 30 Ω fRF = 454.25 MHz, see 5.4.2 on page 43 Ls 5 nH fRF = 154.25.25 MHz, see 5.4.2 on page 43 Ls 4.5 nH fRF = 454.25 MHz, see 5.4.2 on page 43 120 dBµV fRF = 439.25 MHz 4.) dBµV 8.) HIGH band mixer mode (P0 = 0, P1 = 0, including IF amplifier) RF frequency fRF 399.25 Voltage gain GV 33 36 39 dB fRF = 407.25 MHz, see 5.5.2 on page 46 GV 33 36 39 dB fRF = 863.25 MHz, see 5.5.2 on page 46 NF 6 8 dB fRF = 407.25 MHz, see 5.5.5 on page 48 NF 7 9 dB fRF = 863.25 MHz, see 5.5.5 on page 48 Noise figure (not corrected for image) Output voltage causing 0.3% of crossmodulation in channel Output voltage causing 1.1 kHz incidental FM 863.25 picture carrier 1.) VO 108 111 dBµV fRF = 407.25 MHz, see 5.5.7 on page 49 VO 108 111 dBµV fRF = 863.25 MHz, see 5.5.7 on page 49 VO 108 111 dBµV fRF = 407.25 MHz 2.) VO 108 111 dBµV fRF = 454.25 MHz 2.) kHz fRF = 863.25 MHz 3.) dBµV fRFw = 823.25 MHz, fOSC = 862.15 MHz, Local oscillator FM caused by I2C communication FMI2C N+5 - 1 MHz pulling N+5 - 1 MHz 2.12 77 80 fRFu =862.25 MHz 9.) 750 Hz Pulling Wireless Components Vi 78 dBµV 5 - 34 fRF = 855.25 MHz 4.) Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V (continued) Symbol Limit Values min typ Unit Test Conditions L Item max RF input level without lock-out Vi 120 dBµV 8.) Input impedance Zi = (Rs + jωLs) Rs 35 Ω fRF = 407.25 MHz, see 5.4.3 on page 44 Rs 30 Ω fRF = 863.25 MHz, see 5.4.3 on page 44 Ls 5 nH fRF = 407.25 MHz, see 5.4.3 on page 44 Ls 4.5 nH fRF = 863.25 MHz, see 5.4.3 on page 44 LOW band oscillator, Chapter 4 Oscillator frequency fOSC Oscillator frequency shift ∆fOSC(V) 20 ∆fOSC(V) 110 ∆fOSC(T) 300 Oscillator frequency drift 80 210 MHz 10). 70 kHz ∆VCC = 5 % 11). kHz ∆VCC = 10 % 11.) kHz ∆T = 25 °C, with compensation 500 12). Oscillator frequency drift ∆fOSC(t) 150 250 kHz 5 s to 15 min after switch on 13). Phase noise, carrier to noise sideband ΦOSC 88 92 dBc/ Hz ±10 kHz frequency offset, worst case in frequency range Ripple susceptibility of VP RSC 15 20 mV 4.75 V < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz 14). MID band oscillator, Chapter 4 Oscillator frequency fOSC Oscillator frequency shift ∆fOSC(V) 20 ∆fOSC(V) 110 ∆fOSC(T) 500 Oscillator frequency drift 201 493 MHz 10.) 70 kHz ∆VCC = 5 % 11.) kHz ∆VCC = 10 % 11.) kHz ∆T = 25 °C; with com- 750 pensation 12.) Oscillator frequency drift ∆fOSC(t) Phase noise, carrier to noise sideband ΦOSC Wireless Components 250 86 92 5 - 35 500 kHz 5 s to 15 min after switch on 13.) dBc/ Hz ±10 kHz frequency offset, worst case in frequency range Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5V (continued) Symbol Ripple susceptibility of VP RSC Limit Values min typ 15 20 Unit Test Conditions mV 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz L Item max 14.) HIGH band oscillator, Chapter 4 Oscillator frequency fOSC Oscillator frequency shift ∆fOSC(V) 20 ∆fOSC(V) 300 ∆fOSC(T) 600 Oscillator frequency drift 435 905 MHz 10.) 70 kHz ∆VCC = 5 % 11.) kHz ∆VCC = 10 % 11.) kHz ∆T = 25 °C; with com- 1000 pensation 12.) Oscillator frequency drift ∆fOSC(t) 250 500 kHz 5 s to 15 min after switch on 13). Phase noise, carrier to noise sideband ΦOSC 86 90 dBc/ Hz ±10 kHz frequency offset, worst case in frequency range Ripple susceptibility of VP RSC 15 20 mV 4.75 < VP < 5.25 V, worst case in frequency range, ripple frequency 500 kHz 14.) IF amplifier Mixer output impedance Yo= Gs+ jωCs IF amplifier output impedance Zo = Rs + jωLs Gp 3 mS at 36 MHz, see 5.4.4 on page 44 Cp 4 pF at 36 MHz, see 5.4.4 on page 44 RS 65 Ω at 36 MHz, see 5.4.5 on page 45 LS 20 nH at 36 MHz, see 5.4.5 on page 45 Rejection at the IF outputs Level of divider interferences in the IF signal INTDIV Crystal oscillator interferences rejection INTXTAL 20 60 66 dBµV dBc 15). , worst case VIF = 100 dBµV, worst case in frequency range16). Reference frequency rejection INTREF 60 66 dBc VIF = 100 dBµV, worst case in frequency range 17). AGC output AGC take-over point Wireless Components AGCTOP 111 112 5 - 36 113 dBµV AL2, AL1, AL0 = 0, 1,0 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-3 AC/DC Characteristics with TAMB = 25 °C, VCC = 5VC (continued) Symbol Limit Values Unit min typ max Test Conditions Source current 1 AGCfast 7.2 9.0 10.8 µA Source current 2 AGCslow 185 220 264 nA Peak sink to ground AGCpeak 80 100 120 µA AGC output voltage VAGCmax 3.3 3.5 3.7 V maximum level AGC output voltage VAGCmin 0 0.25 V minimum level RF voltage range to switch the AGC from active to inactive mode AGCSLIP 0.5 dB AGC output voltage AGCRML 0 2.9 V AGC bit high or AGC active AGC output voltage AGCRMH 3 VCC0.5 or 4 V AGC bit low or AGC inactive AGC leakage current AGCLEAK -50 50 nA AL2, AL1, AL0 = 1,1,0 0 < VAGC < VCC AGC output voltage AGCOFF 3.3 VCC0.5 or 4 V AL2, AL1, AL0 = 1,1,1 AGC is disabled 3.5 3.5 L Item ■ This value is only guaranteed in lab. 1). The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF). 2). This is the level of the RF unwanted signal (50% amplitude modulated with 1kHz) that causes a 1.1 kHz FM modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBµV; funwanted = fwanted + 5.5 MHz. 3). Local oscillator FM modulation resulting from I2C communication is measured at the IF output using a modulation analyser with a peak to peak detector ((P+ +P-)/2) and a post detection filter 30 Hz - 200 kHz. The I2C messages are sent to the tuner in such a way that the tuner is addressed but the content of the PLL registers are not altered. The refresh interval between each data set shall be 20 ms to 1s. 4). This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency deviation on the oscillator signal producing sidebands 30 dB below the level of the oscillator signal. 5). Channel S02 beat is the interfering product of fRFpix, fIF and fOSC of channel S02, fBEAT = 37.35 MHz. The possible mechanisms are fOSC - 2 x fIF or 2 x fRFpix - fOSC. 6). Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-5; fBEAT= 45.5 MHz. The possible mechanisms are: fOSC - 2 x fIF or 2 x fRFpix - fOSC. 7). Channel 6 beat is the interfering product of fRFpix + fRFsnd - fOSC of channel 6 at 42 MHz. 8). The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBµV. 9). N+5 -1 MHz is defined as the input level of channel N+5, at frequency 1 MHz lower, causing FM sidebands 30 dB below the wanted carrier. 10). Limits are related to the tank circuit used in the application board (Chapter 4). Frequency bands may be adjusted by the choice of external components. 11). The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement. 12). The frequency drift is defined as a change in oscillator frequency if the ambient temperature varies from Tamb = 25 to 50 °C or from Tamb = 25 to 0 °C. The oscillator is free running during this measurement. Wireless Components 5 - 37 Specification, July 2001 TUA6030, TUA6032 Reference 13). The switch-on drift is defined as a change in oscillator frequency between 5 s and 15 min after switch-on. The oscillator is free running during this measurement. 14). The supply ripple susceptibility is measured in the application board (Chapter 4), using a spectrum analyser connected to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave signal with a frequency of 500 kHz is superposed onto the supply voltage (see 5.5.8 on page 49). The amplitude of this ripple is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of 53.5 dBc referred to the carrier. 15). This is the level of divider interferences close to the IF frequency. For example channel S3: fOSC = 158.15 MHz, 1/4 fOSC = 39.5375 MHz. Divider interference is measured with the application board (Chapter 4). All ground pins are connected to a single ground plane under the IC. The LOWIN input must be left open (i.e. not connected to any load or cable). The MIDIN and HIGHIN inputs are connected to a hybrid. The measured level of divider interference are influenced by layout, grounding and port decoupling. The measurement results between various applications and the reference board could vary as much as 10 dB. 16). Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be greater than 60 dB for an IF output of 100 dBµV. 17). The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the carrier. The rejection has to be greater than 60 dB for an IF output of 100 dBµV. Wireless Components 5 - 38 Specification, July 2001 TUA6030, TUA6032 Reference 5.2 Programming Table 5-4 Bit Allocation Read / Write Byte Name Bits Ack MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB Write Data Address Byte ADB 1 1 0 0 0 MA1 MA0 R/ W=0 A Divider Byte 1 DB1 0 N14 N13 N12 N11 N10 N9 N8 A Divider Byte 2 DB2 N7 N6 N5 N4 N3 N2 N1 N0 A Control byte CB 1 CP T2 T1 T0 RSA RSB OS A Bandswitch byte BB P7 P6 P5 P4 P3 P2 P1 P0 A Auxiliary byte 1). AB ATC AL2 AL1 AL0 0 0 0 0 A 1 1 0 0 0 MA1 MA0 R/ W=1 A POR FL 1 1 AGC A2 A1 A0 A Read data Address byte ADB Status byte SB 1). AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 5-7 Test modes on page 40 Table 5-5 Description of Symbols Description Symbol A Acknowledge MA0, MA1 Address selection bits, see Table 5-6 Address selection on page 40 N14 to N0 programmable divider bits: N = 214 x N14 + 213 x N13 + ..... + 23 x N3 + 22 x N2 + 21 xN1 + N0 CP charge pump current bit: bit = 0: charge pump current = 60 µA bit = 1: charge pump current = 280µA (default) T0, T1, T2 test bits, see Table 5-7 Test modes on page 40 RSA, RSB reference divider bits, see Table 5-8 Reference divider ratios on page 40 OS tuning amplifier control bit: bit = 0: enable VT bit = 1: disable VT (default) P0, P1, P2, P3 PNP ports control bits bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCC-VCESAT P4, P5, P6, P7 NPN ports control bits bit = 0: Port is inactive, high impedance state (default) bit = 1: Port is active, VOUT= VCESAT ATC AGC time constant bit bit = 0: IAGC=220nA; ∆t=2s with C=160nF (default) bit = 1: IAGC=9µA; ∆t=50ms with C=160nF Wireless Components 5 - 39 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-5 Description of Symbols AL0, AL1, AL2 AGC take-over point bits POR Power-on reset flag; POR =1 at power-on FL PLL lock flag bit = 1: loop is locked AGC internal AGC flag. AGC=1 when internal AGC is active (level below 3V) A0, A1, A2 digital output of the 5-level ADC Table 5-6 Address selection Voltage at AS MA1 MA0 (0 to 0.1) * VCC 0 0 open circuit 0 1 (0.4 to 0.6) * VCC 1 0 (0.9 to 1) * VCC 1 1 Table 5-7 Test modes Mode T2 T1 T0 Normal operation 0 0 0 Normal operation (default) 0 0 1 CP is in high-impedance state 0 1 0 byte AB will follow (otherwise byte BB will follow) 0 1 1 P4 = fdiv output, P5 = fref output 1 0 0 not in use 1 0 1 not in use 1 1 0 not in use 1 1 1 fref1). RSA RSB 80 50 kHz 0 0 128 31.25 kHz 0 1 24 166.7 kHz 1 0 64 62.5 kHz 1 1 AL2 AL1 AL0 115 dBµV 0 0 0 115 dBµV 0 0 1 0 1 0 109 dBµV 0 1 1 106 dBµV 1 0 0 Table 5-8 Reference divider ratios Reference divider ratio 1). With a 4 MHz quartz Table 5-9 AGC take-over point IF output level, symmetrical mode 112 dBµV Wireless Components Remark default mode at POR 5 - 40 Specification, July 2001 TUA6030, TUA6032 Reference Table 5-9 AGC take-over point 103 dBµV 1 0 1 IAGC = 0 External AGC 1). 1 1 0 3.5 V Disabled 2). 1 1 1 1). The AGC detector is disabled. Both the sinking and sourcing current from the IC is disabled. The AGC output goes into a high impedance state and an external AGC source can be connected in parallel and will not be influenced. 2). The AGC detector is disabled and IAGC = 9 µA. Table 5-10 A to D converter levels 1). Voltage at ADC A2 A1 A0 (0 to 0.15) * VCC 0 0 0 (0.15 to 0.3) * VCC 0 0 1 (0.3 to 0.45) * VCC 0 1 0 (0.45 to 0.6) * VCC 0 1 1 (0.6 to 1) * VCC 1 0 0 1). No erratic codes in the transition Table 5-11 Defaults at power-on reset Name Byte Bits MSB bit6 bit5 bit4 bit3 bit2 bit1 LSB Write Data Address Byte ADB 1 1 0 0 0 MA1 MA0 R/W=0 Divider byte 1 DB1 0 X X X X X X X Divider byte 2 DB2 X X X X X X X X Control byte CB 1 1 0 0 1 X X 1 Bandswitch byte BB 0 0 0 0 0 0 0 0 Auxiliary byte AB 0 0 1 0 Table 5-12 Internal band selection Band Mixer LOW P0.P1 1). Oscillator MID P1.P0 P1.P0 HIGH 2). P0.P1 P0.P1 P0.P1 1). Means: (P0 AND NOT P1); that is: LOW mixer is switched on if (P0=1 and P1=0) 2). The HIGH band is selected by default Wireless Components 5 - 41 Specification, July 2001 Wireless Components Stop Ack. Addressing 1 1 0 0 0 1st Byte Ack. 2nd Byte Ack. 3rd Byte Ack. MA1 MA0 R/W 5 - 42 Start-ADB-DB1-DB2-CB-BB-Stop Start= start condition Start-ADB-DB1-DB2-CB-AB-Stop ADB= address byte Start-ADB-CB-BB-DB1-DB2-Stop DB1= prog. divider byte 1 Start-ADB-CB-AB-DB1-DB2-Stop DB2= prog. divider byte 2 Start-ADB-DB1-DB2-DB1-DB2-Stop CB= Control byte Start-ADB-DB1-DB2-Stop BB= Bandswitch byte Start-ADB-CB-BB-Stop AB= Auxiliary byte Start-ADB-CB-AB-Stop Stop= stop condition Start-ADB-CB-BB-CB-AB-Stop Start-ADB-CB-AB-CB-BB-Stop TUA6030, TUA6032 Abbreviations: Ack. Reference Specification, July 2001 Telegram examples: 4th Byte 5.3 I2C Bus Timing Diagram Start TUA6030, TUA6032 Reference 5.4 Electrical Diagrams 5.4.1 Input admittance (S11) of the LOW band mixer (40 to 140 MHz) 0.8 2 0.5 0.6 0.7 1 1.5 0.9 Y0 = 20mS 0.4 3 0.3 4 0.2 5 0.1 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1 0.9 0.8 1.5 2 3 4 5 10 20 20 140MHz 0 20 10 0.1 5 0.2 4 0.3 3 0.7 0.8 0.9 1 1.5 0.6 2 0.5 0.4 5.4.2 Input impedance (S11) of the MID band mixer (150 to 455 MHz) 1.5 1 0.9 0.8 0.5 2 0.6 0.7 Z0 = 50 Ω 0.4 3 0.3 4 5 0.2 10 455 MHz 20 10 5 4 3 2 0.8 0.9 1 1.5 20 150 MHz 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.1 0 20 0.1 10 0.2 5 4 0 .3 3 Wireless Components 5 - 43 1.5 1 0.8 0.9 0.7 0.6 2 0.5 0.4 Specification, July 2001 TUA6030, TUA6032 Reference 5.4.3 Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) 1.5 1 0.9 0.8 0.5 2 0.6 0.7 Z0 = 50 Ω 0.4 3 0.3 4 5 0.2 865 MHz 10 450 MHz 0.1 20 10 5 4 3 2 1.5 0.8 0.9 1 0.7 0.6 0.5 0.4 0.3 0.2 0.1 20 0 20 0.1 10 0.2 5 4 0.3 3 5.4.4 1.5 1 0.9 0.8 0.7 0.6 2 0.5 0.4 Output admittance (S22) of the of the Mixer output (30 to 50 MHz) 2 0.5 0.6 0.7 0.8 1 1.5 0.9 Y0 = 20mS 0.4 3 0.3 4 0.2 5 0.1 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1 0.9 0.8 1.5 2 3 4 5 10 20 20 Rdiff 38.9 MHz 0 20 10 0.1 5 0.2 4 0.3 3 5 - 44 0.7 0.8 0.9 1 1.5 0.6 2 0.5 0.4 Wireless Components Specification, July 2001 TUA6030, TUA6032 Reference 5.4.5 Output impedance (S22) of the IF amplifier (30 to 50 MHz) 1.5 1 0.9 0.8 0 .5 2 0.6 0.7 Z0 = 50 Ω 0.4 3 0.3 4 5 0.2 10 0.1 20 20 10 5 4 3 2 1.5 0.8 0.9 1 0.7 0.6 0.5 0.4 0.3 0 0.2 0.1 38.9 MHz 20 0.1 10 0.2 5 4 0.3 3 Wireless Components 5 - 45 1.5 1 0.9 0.8 0.7 0.6 2 0 .5 0.4 Specification, July 2001 TUA6030, TUA6032 Reference 5.5 Measurement Circuits 5.5.1 Gain (GV) measurement in LOW band LOWIN IFOUT 50 Ω Vmeas 50 Ω V RMS Votmeter Device under Test Vi Transformer N1 N2 50 Ω spectrum analyser V0 C V'meas IFOUT N1 : N2 = 10 : 2 turns GVHF 5.5.2 ■ Zi >> 50 Ω => Vi = 2 x Vmeas = 80 dBµV ■ Vi = Vmeas + 6dB = 80 dBµV ■ V0 = V’meas + 16 dB (transformer ratio N1:N2 and transformer loss ■ Gv = 20 log(V0 / Vi) Gain (GV) measurement in MID and HIGH bands MIDIN IFOUT HIGHIN 50 Ω Vmeas RMS Votmeter V 50 Ω Vi Balun 1:1 Device under Test Transformer N1 N2 V0 C V'meas MIDIN IFOUT HIGHIN 50 Ω spectrum analyser N1 : N2 = 10 : 2 turns GUHF3 Wireless Components ■ Vi = Vmeas = 70 dBµV ■ V0 = V’meas + 16 dB (transformer ratio N1:N2 and transformer loss ■ Gv = 20 log(V0 / Vi) + 1 dB (1 dB = insertion loss of balun) 5 - 46 Specification, July 2001 TUA6030, TUA6032 Reference 5.5.3 Matching circuit for optimum noise figure in LOW band 22p 15p 1n In 1n In Out Out 7 turns wire ⍪ 0.5 mm coil ⍪ 5.5 mm 22p 50 τ semi rigid cable 300 mm long 96 pF/m 33dB/100m 22p NFM For fRF = 150 MHz For fRF = 50 MHz ■ loss = 0 dB ■ loss = 1.3 dB ■ image suppression = 16 dB ■ image suppression = 13 dB 5.5.4 Noise Source Noise figure (NF) measurement in LOW band IN OUT Matching Circuit LOWIN IFOUT Transformer Device under Test N1 N2 Noise Figure Meter C IFOUT N1 : N2 = 10 : 2 turns NF = NFmeas - loss of matching circuit (dB) NFVHF Wireless Components 5 - 47 Specification, July 2001 TUA6030, TUA6032 Reference 5.5.5 Noise figure (NF) measurement in MID and HIGH bands Noise Source MIDIN IFOUT HIGHIN Device under Test Balun 1:1 Noise Figure Meter Transformer N1 N2 C MIDIN IFOUT HIGHIN N1 : N2 = 10 : 2 turns loss of balun = 1 dB NF = NFmeas - loss of balun (dB) NFUHF3 5.5.6 Cross modulation measurement in LOW band Vmeas 50 Ω RMS Votmeter unwanted signal source AM = 30 % A LOWIN IFOUT C 50 Ω Hybrid 50 Ω B wanted signal source V D Vi Device under Test Transformer N1 18 dB attenuator N2 38.9 MHz V0 C V V'meas IFOUT N1 : N2 = 10 : 2 turns 50 Ω 50 Ω modulation analyser RMS Votmeter XVHF Wireless Components ■ Zi >> 50 Ω => Vi = 2 x Vmeas ■ V’meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss) ■ wanted output signal at fpix, Vo = 100 dBµV ■ unwanted output signal at fsnd 5 - 48 Specification, July 2001 TUA6030, TUA6032 Reference 5.5.7 Cross modulation measurement in MID and HIGH bands Vmeas 50 Ω V RMS Votmeter unwanted signal source AM = 30 % A MIDIN IFOUT HIGHIN C 50 Ω Hybrid Vi Device under Test Balun 1:1 50 Ω B Transformer N1 N2 38.9 MHz V0 C V V'meas MIDIN IFOUT HIGHIN D N1 : N2 = 10 : 2 turns wanted signal source 18 dB attenuator 50 Ω 50 Ω modulation analyser RMS Votmeter XUHF3 5.5.8 ■ V’meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss) ■ wanted output signal at fpix, Vo = 100 dBµV ■ unwanted output signal at fsnd Ripple susceptibility measurement Vsupply 10 µF 6k8 50 τ BC847B to application board 10 µF 500 kHz sine Vripple 50=τ VCC + V ripple Circuit to superimpose a 500 kHz ripple on VCC RIP Wireless Components 5 - 49 Specification, July 2001